CD74HCT4543E [TI]
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER; BCD至7段锁存器/解码器/驱动器
| 型号： | CD74HCT4543E |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER |
| 文件： | 总10页 (文件大小：240K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
CD74HCT4543
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER
SCHS281A – REVISED MAY 2003
E PACKAGE
(TOP VIEW)
4.5-V to 5.5-V V
Operation
CC
Input Latches for BCD Code Storage
Blanking Capability
V
f
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
LD
D2
CC
Phase Input for Complementing Outputs
g
e
d
c
b
a
D1
BCD
Inputs
Fanout (Over Temperature Range)
– Standard Outputs – 10 LSTTL Loads
D3
7-Segment
Outputs
D0
Balanced Propagation Delay and Transition
Times
PH
BI
Significant Power Reduction, Compared to
LSTTL Logic ICs
GND
Direct LSTTL Input Logic Compatibility,
DISPLAY
V
= 0.8 V Maximum, V = 2 V Minimum
IL
IH
CMOS Input Compatibility, I ≤ 1 µA at V
,
I
OL
V
OH
0
1
2
3
4
5
6
7
8
9
a
f
g
b
e
c
d
description/ordering information
The CD74HCT4543 high-speed silicon-gate is a BCD-to-7 segment latch/decoder/driver designed primarily for
directly driving liquid-crystal displays. While the latch enable (LD) is low, the latches are enabled to store the
BCD inputs. When the latch enable is high, the latches are disabled, making the outputs transparent to the BCD
inputs. The device has an active-high blanking input (BI) and a phase input (PH) to which a square wave is
applied for liquid-crystal applications. This square wave also is applied to the backplane of the liquid-crystal
display.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
–55°C to 125°C
PDIP – E Tube
CD74HCT4543E
CD74HCT4543E
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB
design guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HCT4543
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER
SCHS281A – REVISED MAY 2003
FUNCTION TABLE
LD BI PH
D
D
D
D
0
a
L
b
L
c
L
d
L
e
L
H
L
H
L
L
L
H
L
H
L
L
L
L
L
L
L
f
g
L
Display
3
2
1
X
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
X
X
X
X
L
H
L
L
L
H
H
H
L
H
H
L
L
L
L
L
L
Blank
L
L
L
L
L
L
L
H
L
H
L
H
H
H
H
H
L
H
H
L
H
L
L
0
L
1
L
L
H
H
L
H
H
L
H
H
L
H
H
H
H
H
L
2
L
L
H
L
H
H
H
H
H
H
L
3
4
L
H
H
H
H
L
L
L
H
L
H
H
H
H
H
L
H
H
L
5
L
H
H
L
L
6
L
H
L
H
H
H
L
7
H
H
H
H
H
H
H
H
X
H
H
L
H
H
L
8
L
L
H
L
9
L
H
H
L
L
Blank
Blank
Blank
Blank
Blank
L
H
L
L
L
L
L
L
H
H
H
H
X
L
L
L
L
L
L
H
L
L
L
L
L
L
H
H
X
L
L
L
L
L
H
X
L
L
L
L
L
Blank
†
†
As above
As above
Inverse of above
As above
†
Depends on BCD code previously applied when LD = high.
functional diagram
PH
6
9
10
11
12
13
a
b
c
d
e
5
3
2
D0
D1
7-Segment
Outputs
BCD
Inputs
D2
D3
LD
15
14
f
g
4
1
7
BI
GND = 8
= 16
V
CC
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HCT4543
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER
SCHS281A – REVISED MAY 2003
logic diagram
7
BI
9
a
5
D0
D0 Q0
Latch
10
b
Q0
LD
LD
LD
LD
11
c
3
D1
D
Q1
Latch
12
d
Q1
LD
LD
LD
LD
LD
Q
n
D
n
Q
Q
n
n
P
n
D
n
≡
Q
n
2
D2
LD
D2
Q2
LD
LD
Latch
LD
13
P
n
Q2
LD
LD
LD
LD
LD
e
4
Q3
D3
D3
Latch
15
14
f
Q3
LD
LD
LD
LD
1
LD
LD
LD
g
6
PH
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HCT4543
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER
SCHS281A – REVISED MAY 2003
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
I
Input diode current, I (V < –0.5 V or V > V + 0.5 V) ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
IK
I
CC
O
Output diode current, I
(V < –0.5 V or V > V
+ 0.5V) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . ±20 mA
CC
OK
O
Continuous output source or sink current per output, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
O
O
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
CC
JA
At distance 1/16 ± 1/32 in. (1.59 ± 0.79 mm) from case for 10 s maximum . . . . . . . . . . . . . . . . . . . . . 265°C
Unit inserted into a PC board (min. thickness 1/16 in., 1.59 mm)
with solder contacting lead tips only . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300°C
Storage temperature, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65 to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
T
= –55°C
T = –40°C
A
TO 85°C
A
T
A
= 25°C
TO 125°C
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
5.5
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
0.8
0.8
0.8
V
V
V
V
V
V
V
V
CC
CC
CC
Output voltage
V
O
CC
CC
CC
t
t
Input transition (rise and fall) time
500
500
500
ns
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= –55°C
T = –40°C
A
TO 85°C
A
T
A
= 25°C
TO 125°C
PARAMETER
TEST CONDITIONS
V
CC
UNIT
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= –20 µA
= –4 mA
= 20 µA
= 4 mA
OH
OH
OL
OL
V
V
V = V or V
IH
4.5 V
4.5 V
V
V
OH
I
IL
IL
3.98
3.7
3.84
0.1
0.26
±0.1
8
0.1
0.4
±1
0.1
0.33
±1
V = V or V
OL
I
IH
I
I
V = V
to GND
or 0,
5.5 V
5.5 V
µA
µA
I
I
CC
CC
V = V
I
I
O
= 0
160
80
CC
One input at V
Other inputs at 0 or V
CC
– 2.1 V,
CC
‡
4.5 V to 5.5 V
100
360
490
450
µA
∆I
CC
C
10
10
10
pF
i
‡
Additional quiescent supply current per input pin, TTL inputs high, 1 unit load. For dual-supply systems, theoretical worst-case
(V = 2.4 V, V = 5.5 V) specification is 1.8 mA.
I
CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HCT4543
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER
SCHS281A – REVISED MAY 2003
HCT INPUT LOADING TABLE
†
INPUT
D0, D1, D2
D3, BI
PH
UNIT LOADS
1
0.5
1.25
1.5
LD
†
Unit Load is ∆I
CC
limit specified in electrical
characteristics table, e.g., 360 µA maximum
at 25°C.
timing requirements over recommended operating free-air temperature range V
otherwise noted) (see Figure 1)
= 4.5 V (unless
CC
T
= –55°C
T
= –40°C
TO 85°C
A
A
T
A
= 25°C
TO 125°C
UNIT
MIN
10
12
8
MAX
MIN
15
MAX
MIN
13
MAX
t
w
t
su
t
h
Pulse duration, LD high
ns
ns
ns
Setup time, BCD inputs before LD↓
Hold time, BCD inputs before LD↓
18
15
12
10
switching characteristics over recommended operating free-air temperature range (unless
otherwise noted) (see Figure 2)
T
= –55°C
T = –40°C
A
A
T
A
= 25°C
FROM
(INPUT)
TO
LOAD
TO 125°C
TO 85°C
PARAMETER
V
CC
UNIT
(OUTPUT) CAPACITANCE
MIN
TYP
MAX
MIN MAX
MIN
MAX
C
C
C
C
C
C
C
C
C
= 50 pF
= 15 pF
= 50 pF
= 15 pF
= 50 pF
= 15 pF
= 50 pF
= 15 pF
= 50 pF
4.5 V
5 V
80
120
116
99
100
L
L
L
L
L
L
L
L
L
D
Output
Output
Output
n
33
32
27
27
4.5 V
5 V
77
66
66
50
96
83
83
63
LD
BI
t
t
ns
ns
pd
4.5 V
5 V
4.5 V
5 V
99
PH
Output
Any
4.5 V
75
t
operating characteristics, V
= 5 V, T = 25°C
CC
A
PARAMETER
TYP
UNIT
‡
C
Power dissipation capacitance
54
pF
pd
‡
C
is used to determine the dynamic power consumption, per package.
pd
2
2
f
P
D
= C
V
f + ∑ C
i
V
pd CC
L
CC
o
where: f = input frequency
i
o
C
f
= output frequency
= output load capacitance
= supply voltage
L
V
CC
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HCT4543
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER
SCHS281A – REVISED MAY 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
PARAMETER
S1
S2
t
Open
Closed
Open
Closed
Open
PZH
S1
S2
Test
Point
t
en
t
t
t
R
= 1 kΩ
PZL
PHZ
PLZ
L
From Output
Under Test
Closed
t
t
dis
pd
C
L
Closed
Open
Open
Open
(see Note A)
or t
t
t
w
LOAD CIRCUIT
V
CC
Input
50% V
50% V
CC
CC
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
V
CC
Reference
Input
V
CC
50% V
CC
CLR
Input
50% V
CC
0 V
0 V
t
t
h
su
t
rec
V
CC
CC
0 V
Data
Input
90%
90%
V
CC
50%
10%
50% V
10%
50% V
CC
CC
CLK
t
t
f
0 V
r
VOLTAGE WAVEFORMS
RECOVERY TIME
VOLTAGE WAVEFORMS
SETUP AND HOLD AND INPUT RISE AND FALL TIMES
V
CC
V
CC
Input
50% V
50% V
CC
Output
Control
50% V
50% V
CC
CC
0 V
0 V
t
t
PLH
PHL
90%
t
t
PLZ
PZL
V
OH
In-Phase
Output
90%
≈V
Output
Waveform 1
(see Note B)
CC
50%
10%
50% V
10%
CC
V
50% V
CC
10%
OL
V
OL
t
t
f
r
t
t
PHL
90%
PLH
t
t
PZH
PHZ
V
V
OH
90%
Out-of-Phase
Output
50% V
10%
50%
10%
Output
Waveform 2
(see Note B)
V
OH
CC
90%
50% V
OL
CC
t
f
t
≈0 V
r
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
VOLTAGE WAVEFORMS
OUTPUT ENABLE AND DISABLE TIMES
NOTES: A. includes probe and test-fixture capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
O
r
f
D. For clock inputs, f
is measured with the input duty cycle at 50%.
max
E. The outputs are measured one at a time with one input transition per measurement.
F.
G.
H.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
.
.
PLZ
PZL
PLH
PHZ
PZH
PHL
dis
en
pd
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CD74HCT4543
BCD-TO-7 SEGMENT LATCH/DECODER/DRIVER
SCHS281A – REVISED MAY 2003
APPLICATION CIRCUITS
Appropriate
Voltage
HCT4543
Output
PH
HCT4543
Output
One of Seven
Segments
Common
Backplane
PH
GND
Square Wave:
GND to V
CC
Figure 3. Connection to Incandescent
Display
Figure 2. Connection to Liquid-Crystal
Display (LCD)
Appropriate
Voltage
HCT4543
Output
HCT4543
Output
To Filament
Supply
PH
GND
PH
GND
GND or Appropriate
Voltage Below GND
Figure 4. Connection to Gas-Discharge
Display
Figure 5. Connection to Fluorescent Display
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
PACKAGING INFORMATION
Orderable Device
CD74HCT4543E
CD74HCT4543EE4
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PDIP
N
16
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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