BQ51013 [TI]
INTEGRATED WIRELESS POWER SUPPLY RECEIVER; 集成无线电源接收器
| 型号： | BQ51013 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | INTEGRATED WIRELESS POWER SUPPLY RECEIVER |
| 文件： | 总30页 (文件大小：2944K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
bq51010
bq51011
bq51013
www.ti.com
SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
INTEGRATED WIRELESS POWER SUPPLY RECEIVER,
Qi (WIRELESS POWER CONSORTIUM) COMPLIANT
Check for Samples: bq51010, bq51011, bq51013
1
FEATURES
•
Integrated Wireless Power Receiver Solution
with a 5V Regulated Supply
•
•
•
Digital Cameras
Portable Media Players
Hand-held Devices
–
–
–
93% Overall Peak AC-DC Efficiency
Full Synchronous Rectifier
DESCRIPTION
WPC v1.0 Compliant Communication
Control
The bq5101x is an advanced, integrated, receiver IC
for wireless power transfer in portable applications.
The device provides the AC/DC power conversion
while integrating the digital control required to comply
with the Qi v1.0 communication protocol. Together
with the bq500210 transmitter controller, the bq5101x
–
–
Output Voltage Conditioning
Only IC Required Between RX coil and 5V
DC Output Voltage
•
Dynamic Rectifier Control for Improved Load
Transient Response
enables
a complete contact-less power transfer
system for a wireless power supply solution. By
utilizing near-field inductive power transfer, the
receiver coil embedded in the portable device
receives the power transmitted by the transmitter coil
via mutually coupled inductors. The AC signal from
the receiver coil is then rectified and regulated to be
used as a power supply for down-system electronics.
Global feedback is established from the secondary to
the transmitter in order to stabilize the power transfer
process via back-scatter modulation. This feedback is
established by using the Qi v1.0 communication
protocol supporting up to 5W applications.
•
•
Supports 20-V Maximum Input
Low-power Dissipative Rectifier Overvoltage
Clamp (VOVP = 15V)
•
•
Thermal Shutdown
Single NTC/Control Pin for Optimal Safety and
I/O Between Host
•
•
Stand-alone Digital Controller
1.9 x 3mm DSBG or 4.5 x 3.5mm QFN Package
APPLICATIONS
The device integrates
a
low-impedance full
•
•
•
WPC Compliant Receivers
Cell Phones, Smart Phones
Headsets
synchronous rectifier, low-dropout regulator, digital
control, and accurate voltage and current loops. The
entire power stage (rectifier and LDO) utilize low
resistive NMOS FET’s to ensures high efficiency and
low power dissipation.
bqTESLA150LP: Receiver Integration 1/5th of the Area Savings
Power
bq5101x
Voltage
Conditioning
AC to DC
Drivers
Rectification
Load
Communication
Controller
V/I
Sense
Controller
bq500210
Transmitter
Receiver
Figure 1. Wireless Power Consortium (WPC or Qi) Inductive Power System
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
bq51010
bq51011
bq51013
SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ORDERING INFORMATION
Ordering Number
Part NO
Marking
Function
Package
Quantity
(Tape and Reel)
bq51013YFFR
bq51013YFFT
bq51013RHLR
bq51013RHLT
bq51011YFFR
bq51011YFFT
bq51010YFFR
bq51010YFFT
3000
250
bq51013
DSBGA-YFF
bq51013
5V Regulated Power Supply
3000
250
WAES
bq51011
bq51010
QFN-RHL(1)
DSBGA-YFF
DSBGA-YFF
3000
250
bq51011
Current Limited Power Supply
3000
250
7V Regulated Power Supply for
Switch-Mode Charger Systems
bq51010(1)
(1) Product Preview
AVAILABLE OPTIONS
Communication
Current Limit
Device
bq51013
bq51011
bq51010
Function
VAD_OVP
VRECT-OVP
VRECT(REG)
VOUT(REG)
5V Power Supply
15V
15V
15V
Dynamic
Tracks VOUT
Dynamic
5V
5V
7V
None
5V Current Limited
Power Supply
400mA + Dynamic
ILim
none
7V Power Supply
None
ABSOLUTE MAXIMUM RATINGS(1)(2)
over operating free-air temperature range (unless otherwise noted)
VALUES
PARAMETER
PIN
UNITS
MIN
MAX
AC1, AC2, RECT, COMM1, COMM2, OUT,
CHG
V
-0.3
20
Input Voltage
AD, AD-EN
BOOT1, BOOT2
AC1, AC2
OUT
-0.3
-0.3
30
26
1
V
V
A(RMS)
A
Input Current
Output Current
1.5
15
1
CHG
mA
A
Output Sink Current
COMM1, COMM2
Junction temperature, TJ
-40
-65
150
150
°C
Storage temperature, TSTG
ESD Rating (HBM) (100pF, 1.5KΩ)
°C
All
2KV
(1) All voltages are with respect to the VSS terminal, unless otherwise noted.
(2) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
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SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
THERMAL INFORMATION
RHL
20 PiNS
37.7
YFF
28 PINS
58.9
0.2
THERMAL METRIC(1)
UNITS
θJA
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
θJCtop
θJB
35.5
13.6
9.1
°C/W
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.5
1.4
ψJB
13.5
8.9
θJCbot
2.7
n/a
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
PARAMETER
Input voltage range, VIN
PINS
RECT
RECT
OUT
MIN
MAX
10
UNITS
V
4
Input current, IIN
1.5
1.5
1
A
Output current, IOUT
Sink current, IAD-EN
A
AD-EN
COMM
mA
mA
ºC
COMM sink current, ICOMM
Junction Temperature, TJ
500
125
0
TYPICAL APPLICATION SCHEMATICS
bq5101x
System
Load
AD-EN
AD
OUT
CCOMM1
C4
COMM1
BOOT1
AC1
CBOOT1
D1
RECT
VTSB
C1
R4
C3
R2
COIL
C2
TS/CTRL
AC2
R3
NTC
BOOT2
COMM2
CBOOT2
HOST
CHG
3-State
CCOMM2
CCLAMP2
CCLAMP1
CLAMP2
CLAMP1
ILIM
EN1
EN2
Bi-State
Bi-State
PGND
R1
Figure 2. bq5101x Used as a Wireless Power Receiver and Power Supply for System Loads
Copyright © 2011, Texas Instruments Incorporated
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SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
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System
Load
Q1
USB or
AC Adapter
Input
bq5101x
AD-EN
AD
OUT
CCOMM1
CBOOT1
C4
COMM1
BOOT1
AC1
C5
D1
RECT
VTSB
C1
R4
C3
R2
COIL
C2
TS/CTRL
AC2
R3
NTC
BOOT2
COMM2
CBOOT2
HOST
CHG
3-State
CCOMM2
CCLAMP2
CCLAMP1
CLAMP2
CLAMP1
ILIM
EN1
EN2
Bi-State
Bi-State
PGND
R1
Figure 3. bq5101x Used as a Wireless Power Receiver and Power Supply for System Loads With Adapter
Power-Path Multiplexing
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range, 0°C to 125°C (unless otherwise noted)
PARAMETER
Undervoltage lock-out
Hysteresis on UVLO
Hysteresis on OVP
TEST CONDITIONS
VRECT: 0V → 3V
VRECT: 3V → 2V
VRECT: 16V → 5V
VRECT: 5V → 16V
MIN
TYP
2.7
MAX
UNIT
V
UVLO
VHYS
2.6
2.8
250
150
15
mV
mV
V
VRECT
Input overvoltage threshold
14.5
15.5
bq51011,
bq51013
7.08
9.05
6.28
8.25
5.53
7.50
5.11
7.08
40
Dynamic VRECT Threshold 1
Dynamic VRECT Threshold 2
Dynamic VRECT Threshold 3
Dynamic VRECT Threshold 4
ILOAD < 100 mA (ILOAD rising)
bq51010
bq51011,
bq51013
100 mA < ILOAD < 200 mA
(ILOAD rising)
bq51010
V
(1)
VRECT-REG
bq51011,
bq51013
200 mA < ILOAD < 400 mA
(ILOAD rising)
bq51010
bq51011,
bq51013
ILOAD > 400 mA (ILOAD rising)
bq51010
ILOAD Hysteresis for dynamic VRECT
thresholds
ILOAD
VRECT-TRACK
ILOAD falling
mA
mV
Tracking VRECT regulation
above VOUT
VOUT = 3.5 V, IOUT = KILIM
RILIM > 250mA
/
bq51011
250
(1) For the bq51011, VRECT-REG only applies when VRECT-TRACK is not active.
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SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range, 0°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Percentage of ILIM at which
VRECT(REG) begins to track VOUT
bq51011 ILOAD rising
60%
IRECT-REG
Hysteresis percentage of ILOAD
at which VRECT(REG) halts
tracking VOUT
bq51011 ILOAD falling
20%
Rectifier undervoltage protection, restricts
IOUT at VRECT-DPM
VRECT-DPM
VRECT-REV
3
3.1
9
3.2
8
V
V
Rectifier reverse voltage protection when a VRECT-REV = VOUT - VRECT
supply is present at VOUT
,
VOUT = 10V
Quiescent Current
ILOAD = 0mA, 0°C ≤ TJ ≤ 85°C
8
2
10
mA
mA
Active chip quiescent current consumption
from RECT
IRECT
ILOAD = 300mA, 0°C ≤ TJ ≤
85°C
2.5
Quiescent current at the output when
wireless power is disabled (Standby)
IOUT
VOUT = 5V, 0°C ≤ TJ ≤ 85°C
20
35
µA
ILIM Short Circuit
Highest value of ILIM resistor considered a
fault (short). Monitored for IOUT > 100 mA
RILIM: 200Ω → 50Ω. IOUT
latches off, cycle power to reset
RILIM
120
Ω
Deglitch time transition from ILIM short to
IOUT disable
tDGL
1
ms
ILIM-SHORT,OK enables the ILIM short
comparator when IOUT is greater than this
value
ILIM_SC
ILOAD: 0 → 200mA
90
105
125
2.4
mA
A
Maximum ILOAD that will be
delivered for 1 ms when ILIM is
shorted
IOUT
Maximum output current limit, CL
OUTPUT
ILOAD = 1000 mA
ILOAD = 1 mA
4.85
4.95
6.9
4.95
5
5
5.05
7.1
bq51011,
bq51013
VOUT-REG
Regulated output voltage
V
bq51010 ILOAD = 1 mA
ILOAD = 1A
7
VDO
KILIM
IILIM
Drop-out voltage, RECT to OUT
Current programming factor
110
300
190
mV
AΩ
mA
RLIM = KILIM / IILIM, ILOAD = 1 A
280
0.7
320
Current limit programming range
1500
OUT pin short-circuit
detection/pre-charge threshold
bq51011 VOUT: 3 V → 0.5 V, no deglitch
bq51011 VOUT: 0.5 V → 3 V
bq51011 ILOAD = IILIM
0.8
100
390
0.9
V
VOUT_SC
VOUT_SC hysteresis
mV
mA
Current limit during WPC
communication
(2)
ICOMM
365
2.1
420
25
Source current to OUT pin
during short-circuit detection
IOUT_SC
TS / CTRL
VTS
bq51011 VOUT = 0V, 0°C ≤ TJ ≤ 85°C
15
mA
ITS-Bias < 100µA (periodically
TS Bias Voltage
2.2
2.3
V
driven see tTS/CTRL-Meas)
ITS
TS-Bias Short circuit protection
Rising threshold
VTS-Bias = 0V
1
3
mA
VTS: 50% → 60%
54
56
1
58
VCOLD
Falling hysteresis
VTS: 60% → 50%
%VTS-Bias
Falling threshold
VTS: 20% → 15%
17
18
1
19
VHOT
Rising hysteresis
VTS: 15% → 20%
CTRL pin threshold for a high
CTRL pin threshold for a low
VTS/CTRL: 50 → 150mV
VTS/CTRL: 150 → 50mV
80
50
100
80
130
100
mV
mV
VCTRL
(2) Dynamic communication current limit enables the 400mA current limit only when the output current is equal to the programmed current
limit (IILIM) for the bq51011.
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SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
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ELECTRICAL CHARACTERISTICS (continued)
over operating free-air temperature range, 0°C to 125°C (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
24
MAX
UNIT
ms
Time VTS-Bias is active when TS
measurements occur
Synchronous to the
communication period
tTS/CTRL
tTS
Deglitch time for all TS comparators
10
ms
THERMAL PROTECTION
Thermal shutdown temperature
Thermal shutdown hysteresis
OUTPUT LOGIC LEVELS ON /CH
155
20
°C
°C
TJ
VOL
Open drain CHG pin
ISINK = 5mA
500
1
mV
IOFF
CHG leakage current when disabled
VCHG = 20 V, 0°C ≤ TJ ≤ 85°C
µA
COMM PIN
RDS(ON)
fCOMM
Comm1 and Comm2
VRECT = 4V
1.5
Ω
Signaling frequency on COMM pin
Comm pin leakage current
2.00
Kb/s
µA
IOFF
VCOMM1 = 20V, VCOMM2 = 20V
1
CLAMP PIN
RDS(ON)
Adapter Enable
Clamp1 and Clamp2
0.5
Ω
VAD Rising threshold voltage. EN-UVLO
VAD-EN hysteresis, EN-HYS
VAD 0 → 5 V
VAD 5 → 0 V
3.5
3.6
3.8
V
VAD-EN
IAD
400
mV
VRECT = 0V, VAD = 5V, 0°C ≤ TJ
≤ 85°C
Input leakage current
55
μA
Pull-up resistance from AD-EN to OUT
when adapter mode is disabled and VOUT
VAD, EN-OUT
RAD
>
VAD = 0, VOUT = 5
200
350
Ω
Voltage difference between VAD and
VAD-EN when adapter mode is enabled,
EN-ON
VAD = 5V, 0°C ≤ TJ ≤ 85°C
VAD = 9V, 0°C ≤ TJ ≤ 85°C
3
3
4.5
6
5
7
VAD
V
Synchronous Rectifier
IOUT at which the synchronous rectifier
ILOAD 300 → 200mA
ILOAD 200 → 300mA
IAC-VRECT = 250mA
200
225
40
250
mA
mA
V
enters half synchronous mode, SYNC_EN
IOUT
Hysteresis for IOUT,RECT-EN
(full-synchronous mode enabled)
High-side diode drop when the rectifier is in
half synchronous mode
VHS-DIODE
0.7
EN1 and EN2
VIL
Input low threshold for EN1 and EN2
Input high threshold for EN1 and EN2
EN1 and EN2 pull down resistance
0.4
V
V
VIH
1.3
RPD
ADC
VRECT
200
kΩ
Rectified power measurement
0W – 5W of rectified power
±6%
6
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bq51010
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SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
DEVICE INFORMATION
SIMPLIFIED BLOCK DIAGRAM
RECT
I
OUT
VOUT,FB
VREF,ILIM
_
+
_
VILIM
+
VOUT,REG
VREF,IABS
+
_
VIABS,FB
ILIM
VIN,FB
VIN,DPM
+
_
AD
+
_
VREFAD,OVP
BOOT2
BOOT1
_
+
VREFAD,UVLO
AD-EN
VTSB
AC1
AC2
Sync
Rectifier
Control
VREF,TS-BIAS
+
_
COMM1
COMM2
+
_
TS_COLD
TS_HOT
VBG,REF
VIN,FB
VOUT,FB
+
_
DATA_
OUT
VILIM
VIABS,FB
ADC
TS/CTRL
CLAMP1
CLAMP2
VIABS,REF
VIC,TEMP
+
_
TS_DETECT
VREF_100MV
Digital Control
VRECT
VOVP,REF
+
_
OVP
CHG
EN1
EN2
200kW
200kW
PGND
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SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
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YFF Package
(TOP VIEW)
RHL Package
(TOP VIEW)
PGND
PGND
20
1
A1
A2
A3
A4
AC1
2
AC2
19
PGND
PGND
PGND
PGND
BOOT1
3
RECT
18
B1
B2
B3
B4
AC2
AC2
AC1
AC1
OUT
4
BOOT2
17
C1
C2
C3
C4
BOOT2
BOOT1
RECT
RECT
CLMP1
5
CLMP2
16
D1
D2
D3
D4
OUT
OUT
OUT
OUT
COM1
6
COM2
15
E1
E2
E3
E4
/CHG
7
VTSB
14
CLMP2
CLMP1
COM2
COM1
TS/
CTRL
13
F1
TS/CTRL
F2
F3
F4
/AD-EN
8
VTSB
AD-EN
CHG
AD
9
ILIM
12
G1
G2
G3
G4
AD
ILIM
EN2
EN1
EN1
10
EN2
11
PIN FUNCTIONS
NAME
AC1
YFF
RHL
I/O
DESCRIPTION
B3, B4
B1, B2
C4
2
19
3
I
I
AC input power from receiver coil antenna.
AC2
BOOT1
O
Bootstrap capacitors for driving the high-side FETs of the synchronous
rectifier. Connect a 10nF ceramic capacitor from BOOT1 to AC1 and from
BOOT2 to AC2.
BOOT2
C1
17
O
Filter capacitor for the internal synchronous rectifier. Connect a ceramic
capacitor to PGND. Depending on the power levels, the value may be
4.7μF to 22μF.
RECT
OUT
C2, C3
18
4
O
O
D1, D2, D3, D4
Output pin, delivers power to the load.
Open-drain output used to communicate with primary by varying reflected
impedance. Connect through a capacitor to either AC1 or AC2 for
capacitive load modulation (COM2 must be connected to the alternate
AC1 or AC2 pin). For resistive modulation connect COM1 and COM2 to
RECT via a single resistor; connect through separate capacitors for
capacitive load modulation.
COM1
COM2
E4
E1
6
O
Open-drain output used to communicate with primary by varying reflected
impedance. Connect through a capacitor to either AC1 or AC2 for
capacitive load modulation (COM1 must be connected to the alternate
AC1 or AC2 pin). For resistive modulation connect COM1 and COM2 to
RECT via a single resistor; connect through separate capacitors for
capacitive load modulation.
15
O
O
Open drain FETs which are utilized for a non-power dissipative
over-voltage AC clamp protection. When the RECT voltage goes above
15 V, both switches will be turned on and the capacitors will act as a low
impedance to protect the IC from damage. If used, CLMP1 is required to
be connected to AC1, and CLMP2 is required to be connected to AC2 via
0.47µF capacitors.
CLMP1,
CLMP2
E2,
E3
5
16
PGND
A1, A2, A3, A4
1, 20
Power ground
8
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SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
PIN FUNCTIONS (continued)
NAME
YFF
RHL
I/O
DESCRIPTION
I/O
Programming pin for the over current limit. Connect external resistor to
VSS. Size RILIM with the following equation: RILIM = 300 / I( max) where
I(max) is the desired current limit for the power supply.
ILIM
G1
12
Connect this pin to the wired adapter input. When a voltage is applied to
this pin wireless charging is disabled and AD-EN is driven low. Connect to
GND through a 1µF capacitor. If unused, capacitor is not required and
should be grounded directly.
AD
G4
F3
9
8
I
Push-pull driver for external PFET connecting AD and OUT. This node is
pulled to the higher of OUT and AD when turning off the external FET.
This voltage tracks approximately 4V below AD when voltage is present
at AD and provides a regulated VSG bias for the external FET. Float this
pin if unused.
AD-EN
O
Must be connected to ground and pulled up to VTSB via two series
resistors. If an NTC function is not desired, size R2 to be twice that of R3.
As a CTRL pin pull to ground to send End Power/Temperature Fault
message to the transmitter, pull-up to send End Power/Termination
message to the transmitter.
TS/CTRL
F1
13
I
EN1
EN2
G3
G2
10
11
I
I
Inputs that allow user to enable/disable wireless and wired charging <EN1
EN2>
<00> wireless charging is enabled unless the AD voltage is > 3.6 V.
<01> AD mode is disabled, wireless charging enabled.
<10> AD-EN pulled low, wireless charging disabled.
<11> wired and wireless charging disabled.
2.2V LDO that periodically biases the TS/CTRL resistor network. Connect
to TS/CTRL via a resistor
VTSB
CHG
F2
F4
14
7
O
O
Open-drain output – active when output current is being delivered to the
load (i.e. when the output of the supply is enabled).
Spacer
TYPICAL CHARACTERISTICS
100.0
100.0
90.0
80.0
70.0
60.0
90.0
Full Sync Mode Enabled
80.0
70.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
1.0
2.0
3.0
4.0
5.0
Output Power (W)
Output Power (W)
Figure 4. Rectifier Efficiency
Figure 5. IC Efficiency from AC Input to DC Output
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TYPICAL CHARACTERISTICS (continued)
7.5
7.0
6.5
6.0
5.5
5.0
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Falling
Rising
RILIM=250
RILIM=400
RILIM=700
RILIM=300
0.2
0.4
0.6
0.8
1.0
1.0
2.0
3.0
4.0
5.0
Load Current (A)
Output Voltage (V)
Figure 6. VRECT vs. ILOAD
Figure 7. VOUT Sweep (I-V Curve)(1)
100.0
90.0
80.0
70.0
60.0
50.0
40.0
30.0
5.01
5.00
4.99
4.98
4.97
4.96
4.95
0.2
0.4
0.6
0.8
1.0
1.2
0.0
0.2
0.4
0.6
0.8
1.0
Load Current (A)
Load Current (A)
Figure 8. ILOAD Sweep (I-V Curve)
Figure 9. Output Ripple vs. ILOAD (COUT = 1µF)
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TYPICAL CHARACTERISTICS (continued)
5.004
5.002
5.000
4.998
0
20
40
60
80
100
120
Temperature (°C)
Figure 10. VOUT vs Temperature
Figure 11. 1A Instantaneous Load Step(2)
VRECT
VOUT
Figure 12. 1A Instantaneous Load Dump(2)
Figure 13. 1A Load Step Full System Response
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TYPICAL CHARACTERISTICS (continued)
VRECT
VRECT
VOUT
VOUT
Figure 14. 1A Load Dump Full System Response
Figure 15. Rectifier Overvoltage Clamp (fop = 110kHz)
VTS/CTRL
VRECT
VRECT
VOUT
Figure 16. TS Fault
Figure 17. Adapter Insertion (VAD = 10V)
VAD
VRECT
VRECT
VOUT
Figure 18. Adapter Insertion (VAD = 10V) Illustrating
Break-Before-Make Operation
Figure 19. On the Go Enabled (VOTG = 3.5V)(3)
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TYPICAL CHARACTERISTICS (continued)
IOUT
IOUT
VRECT
VRECT
VOUT
VOUT
Figure 20. bq51013 and bq51010 Typical Startup with a 1A
System Load
Figure 21. bq51011 Step Response with VOUT = 4.8V and
ILOAD = IILIM
IOUT
VRECT
VRECT
VOUT
VOUT
Figure 22. bq51011 Output Voltage Transition
(VOUT = 4.8V -> 3.5V) Illustrating VRECT-TRACK
Figure 23. bq51011 Output Current Transition (ILOAD < IILIM
≥ ILOAD = IILIM) lIlustrating Dynamic Communication
Current Limit
(1) Curves illustrates the resulting ILIM current by sweeping the output voltage at different RILIM settings. ILIM current collapses due to the
increasing power dissipation as the voltage at the output is decreased—thermal shutdown is occurring.
(2) Total droop experienced at the output is dependent on receiver coil design. The output impedance must be low enough at that particular
operating frequency in order to not collapse the rectifier below 5V.
(3) On the go mode is enabled by driving EN1 high. In this test the external PMOS is connected between the output of the bq5101x IC and
the AD pin, therefore any voltage source on the output is supplied to the AD pin.
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PRINCIPLE OF OPERATION
bqTESLA150LP: Receiver Integration 1/5th of the Area Savings
Power
bq5101x
Voltage
Conditioning
AC to DC
Drivers
Rectification
Load
Communication
Controller
V/I
Sense
Controller
bq500210
Transmitter
Receiver
Figure 24. WPC Wireless Power System Indicating the Functional Integration of the bq5101x
A Brief Description of the Wireless System:
A wireless system consists of a charging pad (transmitter or primary) and the secondary-side equipment
(receiver or secondary). There are coils in the charging pad and in the secondary equipment which are
magnetically coupled to each other when the equipment is placed on the portable device. Power is then
transferred from the transmitter to the receiver via coupled inductors (e.g. an air-core transformer). Controlling
the amount of power transferred is achieved by sending feedback (error signal) communication to the primary
(e.g. to increase or decrease power).
The receiver communicates with the transmitter by changing the load seen by the transmitter. This load variation
results in a change in the transmitter coil current, which is measured and interpreted by a processor in the
charging pad. The communication is digital - packets are transferred from the receiver to the transmitter.
Differential Bi-phase encoding is used for the packets. The bit rate is 2-kbps.
Various types of communication packets have been defined. These include identification and authentication
packets, error packets, control packets, end power packets, and power usage packets.
The transmitter coil stays powered off most of the time. It occasionally wakes up to see if a receiver is present.
When a receiver authenticates itself to the transmitter, the transmiter will remain powered on. The receiver
maintains full control over the power transfer using communication packets.
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Using the bq5101x as a Wireless Power Supply: (See Figure 3)
Figure 3 is the schematic of a system which uses the bq5101x as power supply while power multiplexing the
wired (adapter) port.
When the system shown in Figure 3 is placed on the charging pad, the receiver coil is inductively coupled to the
magnetic flux generated by the coil in the charging pad which consequently induces a voltage in the receiver coil.
The internal synchronous rectifier feeds this voltage to the RECT pin which has the filter capacitor C3.
The bq5101x identifies and authenticates itself to the primary using the COM pins by switching on and off the
COM FETs and hence switching in and out CCOMM. If the authentication is successful, the transmitter will remain
powered on. The bq5101x measures the voltage at the RECT pin, calculates the difference between the actual
voltage and the desired voltage VRECT-REG, (~7V for the bq51013 at no load) and sends back error packets to the
primary. This process goes on until the input voltage settles at VIN-REG. During a load transient, the dynamic
rectifier algorithm will set the targets specified by VRECT-REG thresholds 1, 2, 3, and 4. This algorithm enhances
the transient response of the power supply.
During power-up, the LDO is held off until the VRECT-REG threshold 1 converges. The voltage control loop ensures
that the output voltage is maintained at VOUT-REG (~5V for the bq51013) to power the system. The bq5101x
meanwhile continues to monitor the input voltage, and maintains sending error packets to the primary every
250ms. If a large transient occurs, the feedback to the primary speeds up to every 32ms in order to converge on
an operating point in less time.
Input Overvoltage
If the input voltage suddenly increases in potential (e.g. a change in position of the equipment on the charging
pad), the voltage-control loop inside the bq5101x becomes active, and prevents the output from going beyond
VOUT-REG. The receiver then starts sending back error packets to the transmitter every 30ms until the input
voltage comes back to the VRECT-REG target, and then maintains the error communication every 250ms.
If the input voltage increases in potential beyond VOVP, the IC switches off the LDO and communicates to the
primary to bring the voltage back to VRECT -REG. In addition, a proprietary voltage protection circuit is activated by
means of CCLAMP1 and CCLAMP2 that protects the IC from voltages beyond the maximum rating of the IC (e.g.
20V).
Adapter Enable Functionality and Enable1/Enable2 Control
Figure 3 is an example application that shows the bq5101x used as a wireless power receiver that can power
mutliplex between wired or wireless power for the down-system electronics. In the default operating mode pins
EN1 and EN2 are low, which activates the adapter enable functionality. In this mode, if an adapter is not present
the AD pin will be low, and AD-EN pin will be pulled to the higher of the OUT and AD pins so that the PMOS
between OUT and AD will be turned off. If an adapter is plugged in and the voltage at the AD pin goes above 3.6
V then wireless charging is disabled and the AD-EN pin will be pulled approximately 4 V below the AD pin to
connect AD to the secondary charger. The difference between AD and AD-EN is regulated to a maximum of 7V
to ensure the VGS of the external PMOS is protected.
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The EN1 and EN2 pins include internal 200kΩ pull-down resistors, so that if these pins are not connected
bq5101x defaults to AD-EN control mode. However, these pins can be pulled high to enable other operating
modes as described in Table 1:
Table 1.
EN1
EN2
Result
0
0
Adapter control enabled. If adapter is present then secondary charger will
be powered by adapter, otherwise wireless charging will be enabled when
wireless power is available.
0
1
1
1
0
1
Adapter is disabled. Wireless charging will be enabled when wireless
power is present.
AD-EN is pulled low, whether or not adapter voltage is present. This feature
can be used, e.g., for USB OTG applications.
Adapter and wireless charging are disabled, i.e., power will never be
delivered by the OUT pin in this mode.
As described in Table 1, pulling EN2 high disables the adapter mode and only allows wireless charging. In this
mode the adapter voltage will always be blocked from the OUT pin. An application example where this mode is
useful is when USB power is present at AD, but the USB is in suspend mode so that no power can be taken from
the USB supply. Pulling EN1 high enables the off-chip PMOS regardless of the presence of a voltage. This
function can be used in USB OTG mode to allow a charger connected to the OUT pin to power the AD pin.
Finally, pulling both EN1 and EN2 high disables both wired and wireless charging.
NOTE
It is required to connect a back-to-back PMOS between AD and OUT so that voltage is
blocked in both directions. Also, when AD mode is enabled no load can be pulled from the
RECT pin as this could cause an internal device overvoltage in bq5101x.
End Power Transfer Packet (WPC Header 0x02)
The WPC allows for a special command for the receiver to terminate power transfer from the trasmitter termed
End Power Transfer (EPT) packet. Table 2 specifies the v1.0 Reasons columb and their responding data field
value. The Condition column corresponds to the values sent by the bq5101x for a given reason.
Table 2.
Reason
Unknown
Value
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
Condition
AD > 3.6V
TS/CTRL = 1, or EN1 = 1, or <EN1 EN2> = <11>
TJ > 150°C or RILIM < 100Ω
TS < VHOT, TS > VCOLD, or TS/CTRL < 100mV
Not Sent
Charge Complete
Internal Fault
Over Temperature
Over Voltage
Over Current
Battery Failure
Reconfigure
Not Sent
Not Sent
Not Sent
No Response
VRECT target doesn't converge
Status Outputs
bq5101x has one status output, CHG. This output is an open-drain NMOS device that is rated to 20V. The
open-drain FET connected to the CHG pin will be turned on whenever the output of the power supply is enabled.
Please note, the output of the power supply will not be enabled if the VRECT-REG does not converge at the no-load
target voltage.
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Communication
bq5101x provides two identical, integrated communication FETs which are connected to the pins COMM1 and
COMM2. These FETs are used for modulating the secondary load current which allows bq5101x to communicate
error control and configuration information to the transmitter. Figure 25 below shows how the COMM pins can be
used for resistive load modulation. Each COMM pin can handle at most a 24Ω communication resistor.
Therefore, if a COMM resistor between 12Ω and 24Ω is required COM1 and COM2 pins must be connected in
parallel. bq5101x does not support a COMM resistor less than 12Ω.
RECTIFIER
24W
24W
COMM1
COMM2
COMM_DRIVE
Figure 25. Resistive Load Modulation
In addition to resistive load modulation, the bq5101x is also capable of capacitive load modulation as shown in
Figure 26 below. In this case, a capacitor is connected from COMM1 to AC1 and from COMM2 to AC2. When
the COMM switches are closed there is effectively a 22nF capacitor connected between AC1 and AC2.
Connecting a capacitor in between AC1 and AC2 modulates the impedance seen by the coil, which will be
reflected in the primary as a change in current.
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AC1
AC2
22nF
22nF
COMM1
COMM2
COMM_DRIVE
Figure 26. Capacitive Load Modulation
Synchronous Rectification
The bq5101x provides an integrated, self-driven synchronous rectifier that enables high-efficiency AC to DC
power conversion. The rectifier consists of an all NMOS H-Bridge driver where the backgates of the diodes are
configured to be the rectifier when the synchronous rectifier is disabled. During the initial startup of the WPC
system the synchronous rectifier is not enabled. At this operating point, the DC rectifier voltage is provided by the
diode rectifier. Once VRECT is greater than UVLO, half synchronous mode will be enabled until the load current
surpasses 250mA. Above 250mA the synchronous rectifier will stay enabled until the load current drops back
below 250mA where half synchronous mode will be enabled instead.
Rectifier Tracking Mode (Fold-Back)
The bq51011 is a 5V power supply intended to run efficiently in current limit. In order to optimize the efficiency
and power dissipation, the rectifier must track the output voltage within 250mV. This feature is termed
VRECT-TRACK where the bq51011 monitors the status of the programmed current limit and the output voltage value.
When the output current breaches the current limit of the power supply the controller sets the rectifier target
voltage to the output voltage plus 250mV. This feature is illustrated in Figure 22. When the output current is
equal to the current limit and the output voltage is transitioned from 4.8V to 3.5V the rectifier voltage will follow
the transition. This is possible via the WPC system control loop where the bq51011 communicates to the Tx to
adjust the operating point. This feature ensures that the internal LDO is always running near dropout for
optimized efficiency when the output current is equal to the current limit of the power supply
Communication Current Limit (Comm. ILIM
)
The bq51011 employs a 400mA current limit during the time it takes to send a communication packet to the Tx.
This feature adds robustness to communication link between the Tx and Rx when the rectifier is in fold-back
mode. Communication can be compromised while in fold-back mode because of less headroom (gain) across the
internal LDO. When the current limit is reduced at a fixed operating frequency, the rectifier voltage increases (see
Figure 22 where the output current reduces from the power supply current limit). This will increase the headroom
across the LDO adding more gain between the output and the rectifier; therefore, increasing immunity to
communication failure.
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Dynamic Communication Current Limit (Dynamic ILIM
)
The bq51011 employs the dynamic communication current limit feature in order to enable the communication
current limit only when the power supply is operating in current limit mode (IOUT = IILIM). This is illustrated in
Figure 23 where the output current is transitioned from IOUT < IILIM to IOUT = IILIM. This allows for systems to
startup without the current limit enabled in order to provide better system performance (e.g. during a dead battery
condition). The current limit is used during rectifier tracking mode to ensure stability of the communication back to
the WPC transmitter. This adds robustness to the communication link.
Temperature Sense Resistor Network (TS)
bq5101x includes a ratiometric external temperature sense function. The temperature sense function has two
ratiometric thresholds which represent a hot and cold condition. An external temperature sensor is recommended
in order to provide safe operating conditions for the receiver product. This pin is best utilized for monitoring the
surface that can be exposed to the end user (e.g. place the NTC resistor closest to the user).
Figure 27 allows for any NTC resistor to be used with the given VHOT and VCOLD thresholds.
VTSB
R2
TS /CTRL
R3
NTC
Figure 27. NTC Circuit Used for Safe Operation of the Wireless Receiver Power Supply
The resistors R2 and R3 can be solved by resolving the system of equations at the desired temperature
thresholds. The two equations are:
æ
ç
ç
ç
ö
÷
÷
÷
R3 RNTC
TCOLD
÷
çR3 + R
÷
è
TCOLD ø
NTC
%VCOLD
=
× 100
æ
ç
ç
ç
ö
R3 RNTC
÷
TCOLD
÷
+ R2
÷
÷
÷
çR3 + R
è
TCOLD ø
NTC
(1)
æ
ö
R3 RNTC
÷
ç
THOT
÷
ç
÷
THOT ø
ç
÷
çR3 + R
÷
è
NTC
%VHOT
=
× 100
æ
ç
ç
ç
ö
÷
÷
R3 RNTC
THOT
+ R2
÷
÷
çR3 + R
÷
è
THOT ø
NTC
(2)
(3)
Where:
1
1
-
β
(
)
TCOLD To
RNTC
= ROe
= ROe
TCOLD
THOT
1
1
β
-
)
(
THOT To
RNTC
where, TCOLD and THOT are the desired temperature thresholds in degrees Kelvin. Ro is the nominal resistance
and β is the temperature coefficient of the NTC resistor. An example solution for an NTC resistor with RO = 10KΩ
and β = 4500 is:
•
R2 = 7.81kΩ
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•
R3 = 13.98kΩ
where:
•
•
•
•
TCOLD = 0°C
THOT = 60°C
β = 4500
RO = 10kΩ
The plot of the percent VTSB vs. temperature is shown in Figure 28:
55
50
45
40
35
30
25
20
0
10
20
30
40
50
60
Temperature (°C)
Figure 28. Example Solution for an NTC resistor with RO = 10KΩ and β = 4500
Figure 29 illustrates the periodic biasing scheme used for measuring the TS state. The TS_READ signal enables
the TS bias voltage for 24ms. During this period the TS comparators are read (each comparator has a 10 ms
deglitch) and appropriate action is taken based on the temperature measurement. After this 24ms period has
elapsed, the TS_READ signal goes low, which causes the TS-Bias pin to become high impedance. During the
next 35ms (priority packet period) or 235ms (standard packet period), the TS voltage is monitored and compared
to 100mV. If the TS voltage is greater than 100mV then a secondary device is driving the TS/CTRL pin and a
CTRL = ‘1’ is detected.
24ms
TS_READ
35 or 235ms
10ms deglitch on all TS
Hold TS comps in reset.
Read TS_DRIVEN with
10-ms deglitch.
comps – read for TS
fault. Hold TS_OPEN
comp in reset.
Figure 29. Timing Diagram for TS Detection Circuit
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Thermal Protection
The bq5101x includes a thermal shutdown protection. If the die temperature reaches TJ(OFF), the LDO is shut
off to prevent any further power dissipation.
Series and Parallel Resonant Capacitor Selection
Shown in Figure 2, the capacitors C1 (series) and C2 (parallel) make up the dual resonant circuit with the
receiver coil. These two capacitors must be sized correctly per the WPC v1.0 specification. Figure 30 illustrates
the equivalent circuit of the dual resonant circuit:
C1
Ls’
C2
Figure 30. Dual Resonant Circuit with the Receiver Coil
Section 4.2 (Power Receiver Design Requirements) in volume 1 of the WPC v1.0 specification highlights in detail
the sizing requirements. To summarize, the receiver designer will be required take inductance measurements
with a fixed test fixture. The test fixture is shown in Figure 31:
Figure 31. WPC v1.0 Receiver Coil Test Fixture for the Inductance Measurement Ls’
(copied from System Description Wireless Power Transfer, volume 1: Low Power, Part 1 Interface
Definition, Version 1.0.1, Figure 4-4)
The primary shield is to be 50mm x 50mm x 1mm of Ferrite material PC44 from TDK Corp. The gap dZ is to be
3.4mm. The receiver coil, as it will be placed in the final system (e.g. the back cover and battery must be
included if the system calls for this), is to be placed on top of this surface and the inductance is to be measured
at 1-V RMS and a frequency of 100 kHz. This measurement is termed Ls’. The same measurement is to be
repeated without the test fixture shown in Figure 9. This measurement is termed Ls or the free-space inductance.
Each capacitor can then be calculated using Equation 4:
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ù-1
2
)
'
C1 = f × 2p × LS
é
ë
(
S
ê
ú
û
é
ù-1
ú
2
1
ê
C2 = f × 2p × L -
(
)
D
S
ê
ú
C1
(4)
(5)
Where fS is 100 kHz +5/-10% and fD is 1 MHz ±10%. C1 must be chosen first prior to calculating C2.
The quality factor must be greater than 77 and can be determined by Equation 5:
2p × fD × LS
Q =
R
where R is the DC resistance of the receiver coil. All other constants are defined above.
Receiver Coil Load-Line Analysis
When choosing a receiver coil, it is recommend to analyze the transformer characteristics between the primary
coil and receiver coil via load-line analysis. This will capture two important conditions in the WPC system:
1. Operating point characteristics in the closed loop of the WPC system.
2. Instantaneous transient response prior to the convergence of the new operating point.
An example test configuration for conducting this analysis is shown in Figure 32:
CP
CS
VIN
LP
LS C
D
CB
RL
V
Figure 32. Load-Line Analysis Test Bench
Where:
•
•
•
•
•
•
•
VIN is a square-wave power source that should have a peak-to-peak operation of 19V.
CP is the primary series resonant capacitor (i.e. 100nF for Type A1 coil).
LP is the primary coil of interest (i.e. Type A1).
LS is the secondary coil of interest.
CS is the series resonant capacitor chosen for the receiver coil under test.
CD is the parallel resonant capacitor chosen for the receiver coil under test.
CB is the bulk capacitor of the diode bridge (voltage rating should be at least 25V and capacitance value of at
least 10µF)
•
•
•
V is a Kelvin connected voltage meter
A is a series ammeter
RL is the load of interest
It is recommended that the diode bridge be constructed of Schottky diodes.
The test procedure is as follows
•
•
•
Supply a 19V AC signal to LP starting at a frequency of 210kHz
Measure the resulting rectified voltage from no load to the expected full load
Repeat the above steps for lower frequencies (stopping at 110kHz)
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An example load-line analysis for the Vishay IWAS-4832FF-50 receiver coil is shown in Figure 33:
Fs=175
Fs=160
10
Fs=150
Fs=140
Fs=135
8
Fs=130
Fs=125
6
4
0.2
0.4
0.6
0.8
1.0
Load Current (A)
1A Load Step Droop
Ping Voltage
1A Load Operating Point
Figure 33. Vishay IWAS-4832FF-50 Load-Line Results
What this plot conveys about the operating point is that a specific load and rectifier target condition consequently
results in a specific operating frequency (for the type A1 TX). For example, at 1A the dynamic rectifier target is
5.15V. Therefore, the operating frequency will be between 150kHz and 160kHz in the above example. This is an
acceptable operating point. If the operating point ever falls outside the WPC frequency range (110kHz –
205kHz), the system will never converge and will become unstable.
In regards to transient analysis, there are two major points of interest:
1. Rectifier voltage at the ping frequency (175kHz).
2. Rectifier voltage droop from no load to full load at the constant operating point.
In this example, the ping voltage will be ~5V. This is above the UVLO of the bq5101x and; therefore, startup in
the WPC system can be ensured. If the voltage is near or below the UVLO at this frequency, then startup in the
WPC system may not occur.
If the max load step is 1A, the droop in this example will be ~1V with a voltage at 1A of ~5.5V (140kHz load-line).
To analyze the droop locate the load-line that starts at 7V at no-load. Follow this load-line to the max load
expected and take the difference between the 7V no-load voltage and the full-load voltage at that constant
frequency. Ensure that the full-load voltage at this constant frequency is above 5V. If it descends below 5V, the
output of the power supply will also droop to this level. This type of transient response analysis is necessary due
to the slow feedback response of the WPC system. This simulates the step response prior to the WPC system
adjusting the operating point.
NOTE
Coupling between the primary and secondary coils will worsen with misalignment of the
secondary coil. Therefore, it is recommended to re-analyze the load-lines at multiple
misalignments to determine where, in planar space, the receiver will discontinue operation.
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bq51010
bq51011
bq51013
SLVSAT9B –APRIL 2011–REVISED AUGUST 2011
www.ti.com
REVISION HISTORY
Changes from Original (April 2011) to Revision A
Page
•
•
•
•
•
Added device numbers bq51010 and bq51011 .................................................................................................................... 1
Added Figure 20 through Figure 23 ...................................................................................................................................... 9
Added section - Rectifier Tracking Mode (Fold-Back) ........................................................................................................ 18
Added section - Communication Current Limit (Comm. ILIM ............................................................................................... 18
Added section - Dynamic Communication Current Limit (Dynamic ILIM) ............................................................................ 19
Changes from Revision A (May 2011) to Revision B
Page
•
•
•
Changed text in the DESCRIPTION From: Together with the bq500110 To: Together with the bq500210 ........................ 1
Changed Figure 1 ................................................................................................................................................................. 1
Changed Figure 24 ............................................................................................................................................................. 14
24
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Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s): bq51010 bq51011 bq51013
PACKAGE OPTION ADDENDUM
www.ti.com
11-Aug-2011
PACKAGING INFORMATION
Status (1)
Eco Plan (2)
MSL Peak Temp (3)
Samples
Orderable Device
Package Type Package
Drawing
Pins
Package Qty
Lead/
Ball Finish
(Requires Login)
BQ51010YFFR
BQ51010YFFT
BQ51011YFFR
PREVIEW
PREVIEW
ACTIVE
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
28
28
28
3000
250
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
3000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
BQ51011YFFT
BQ51013YFFR
BQ51013YFFT
ACTIVE
ACTIVE
ACTIVE
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
28
28
28
250
3000
250
Green (RoHS
& no Sb/Br)
Call TI
Call TI
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Aug-2011
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ51011YFFR
BQ51013YFFR
BQ51013YFFT
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
28
28
28
3000
3000
250
180.0
180.0
180.0
8.4
8.4
8.4
2.01
2.01
2.01
3.14
3.14
3.14
0.81
0.81
0.81
4.0
4.0
4.0
8.0
8.0
8.0
Q1
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Aug-2011
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
BQ51011YFFR
BQ51013YFFR
BQ51013YFFT
DSBGA
DSBGA
DSBGA
YFF
YFF
YFF
28
28
28
3000
3000
250
210.0
210.0
210.0
185.0
185.0
185.0
35.0
35.0
35.0
Pack Materials-Page 2
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