BQ34110PWR [TI]

集成了极少放电型模块的多化合物高电池节数电池电量监测计 | PW | 14 | -40 to 85;
BQ34110PWR
型号: BQ34110PWR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

集成了极少放电型模块的多化合物高电池节数电池电量监测计 | PW | 14 | -40 to 85

电池 PC 光电二极管
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中文:  中文翻译
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bq34110  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
bq34110 适用于极少放电型应用的多化合物 CEDV 电池电量 监测计  
1 特性  
3 说明  
1
精准的放电结束 (EOS) 确定功能,适用于极少放电  
型应用中的 电池  
bq34110 CEDV 电池电量监测计可为单节和多节电池  
提供 CEDV 电量监测和放电结束 (EOS) 确定功能。该  
器件配有增强型 特性, 从而 为 各类备用系统中常用  
的始终保持满电量且极少放电的电池提供支持。  
Bq34110 电量监测计支持多种电池化学成分,包括锂  
离子、磷酸铁锂、铅酸 (PbA)、镍氢 (NiMH) 和镍铬  
(NiCd)。  
补偿放电结束电压 (CEDV) 电池电量监测计,适用  
于单节和多节电池,可提供  
充电状态 (SOC)  
续航时间 (TTE)  
健康状况 (SOH)  
基于瓦时的充电终止  
该电量监测计使用补偿放电结束电压 (CEDV) 技术获  
取电压、电流和温度数据,并借此提供充电状态  
(SOC) 和健康状况 (SOH) 数据。这款电量监测计还整  
合了放电结束 (EOS) 确定功能,可在电池电量不足和  
即将完全放电时发出警报。  
最高支持 65V 电压、32Ah 电容和 32 A 电流 - 可  
使用调节特性扩展这些参数级别  
支持锂离子、磷酸铁锂、铅酸 (PbA)、镍氢和镍铬  
等化学成分  
双路可配置主机中断或 GPO  
寿命数据记录选项  
监测计中的数据可由主机通过 400kHz I2C 总线读取。  
另外,还有两个 ALERT 输出可供使用,例如向主机发  
出中断或者实现其他功能,具体根据配置选项来决定。  
精确的库伦计数器、电压和温度测量  
电源使能控制  
通过 I2C™与主机通信  
器件信息(1)  
累加充电库伦计数和可配置中断  
安全散列算法 (SHA-1) 认证  
器件型号  
bq34110  
封装  
封装尺寸(标称值)  
TSSOP (14)  
5.00mm x 4.40mm  
2 应用  
(1) 要了解所有可用封装,请见数据表末尾的可订购产品附录。  
不间断电源 (UPS) 备用系统  
简化电路原理图  
远程信息处理备用系统  
应急电池供电模块  
能量存储系统  
资产跟踪  
PACK+  
Learning  
Divider Network  
Load  
楼宇安全系统  
视频监控  
BAT  
VEN  
电子智能锁  
SDA  
SCL  
LEN  
远程和应急照明  
服务器供电系统  
机器人  
REG25  
ALERT1  
ALERT2  
10k NTC  
TS  
玩具  
SRP  
R
SENSE  
CHIP ENABLE  
CE  
SRN  
VSS  
PACK–  
Copyright ©2016,Texas Instruments Incorporated  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
English Data Sheet: SLUSCI1  
 
 
 
bq34110  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
www.ti.com.cn  
目录  
6.14 Electrical Characteristics: Data Flash Memory ....... 7  
6.15 Timing Requirements: I2C-Compatible Interface  
Timing Characteristics................................................ 7  
1
2
3
4
5
6
特性.......................................................................... 1  
应用.......................................................................... 1  
说明.......................................................................... 1  
修订历史记录 ........................................................... 2  
Pin Configuration and Functions......................... 3  
Specifications......................................................... 4  
6.1 Absolute Maximum Ratings ...................................... 4  
6.2 ESD Ratings ............................................................ 4  
6.3 Recommended Operating Conditions....................... 4  
6.4 Thermal Information.................................................. 4  
6.5 Electrical Characteristics: Supply Current................. 5  
6.16 Typical Characteristics ........................................... 8  
Detailed Description .............................................. 9  
7.1 Overview ................................................................... 9  
7.2 Functional Block Diagram ......................................... 9  
7.3 Feature Description................................................... 9  
7.4 Device Functional Modes........................................ 12  
Application and Implementation ........................ 12  
8.1 Application Information............................................ 12  
8.2 Typical Applications ............................................... 13  
Power Supply Recommendations...................... 16  
7
8
9
6.6 Electrical Characteristics: Digital Input and Output DC  
Characteristics ........................................................... 5  
10 Layout................................................................... 17  
10.1 Layout Guidelines ................................................. 17  
10.2 Layout Example .................................................... 18  
11 器件和文档支持 ..................................................... 20  
11.1 文档支持................................................................ 20  
11.2 接收文档更新通知 ................................................. 20  
11.3 社区资源................................................................ 20  
11.4 ....................................................................... 20  
11.5 静电放电警告......................................................... 20  
11.6 Glossary................................................................ 20  
12 机械、封装和可订购信息....................................... 20  
6.7 Electrical Characteristics: Power-On Reset.............. 5  
6.8 Electrical Characteristics: LDO Regulator................. 5  
6.9 Electrical Characteristics: Internal Temperature  
Sensor........................................................................ 6  
6.10 Electrical Characteristics: Low-Frequency Clock  
Oscillator .................................................................... 6  
6.11 Electrical Characteristics: High-Frequency Clock  
Oscillator .................................................................... 6  
6.12 Electrical Characteristics: Integrating ADC  
(Coulomb Counter) .................................................... 6  
6.13 Electrical Characteristics: ADC (Temperature and  
Voltage Measurements)............................................. 7  
4 修订历史记录  
日期  
修订版本  
注释  
2016 11 月  
B
产品预览至量产数据  
2
Copyright © 2016, Texas Instruments Incorporated  
 
bq34110  
www.ti.com.cn  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
5 Pin Configuration and Functions  
14-Pin TSSOP (PW)  
Top View  
V !"#$%&  
*, -.1  
, !  
1
+
/
'
2
4
6
1'  
1/  
1+  
11  
13  
5
()*  
(0,  
*, -.+  
.(  
ꢀ*.  
0  
(-!  
(-$  
V((  
- #%!  
- #+2  
7
!89 98 :;<=>  
Pin Functions  
PIN  
TYPE  
DESCRIPTION  
NAME  
NUMBER  
Active High Voltage Translation Enable. This signal is used optionally to switch the input voltage  
divider on/off to reduce the power consumption (typ 45 μA) of the divider network. It can also be  
used as a general purpose output.  
VEN/GPIO  
1
O(1)  
ALERT1  
LEN  
2
3
4
5
6
7
8
O
O
P
I
Open drain output for use as system alert or charger control. Pull-up voltage limited  
Push-pull external voltage divider control output  
BAT  
Voltage measurement input  
CE  
Chip enable. Internal LDO is powered down when driven low.  
REGIN  
REG25  
VSS  
P
P
P
Internal integrated LDO input. Decouple with 0.1-µF ceramic capacitor to VSS.  
2.5-V output voltage of the internal integrated LDO. Decouple with 1-µF ceramic capacitor to VSS  
.
Device ground  
Analog input pin connected to the internal coulomb-counter peripheral for integrating a small  
voltage between SRP and SRN, where SRP is nearest the BAT– connection.  
SRP  
SRN  
9
I
I
Analog input pin connected to the internal coulomb-counter peripheral for integrating a small  
voltage between SRP and SRN, where SRN is nearest the PACK– connection.  
10  
TS  
11  
12  
I
Pack thermistor voltage sense (use 103AT-type thermistor)  
ALERT2  
O
Open drain output for use as system alert or charger control  
Open drain slave I2C serial communication clock input. Use with an external 10-kΩ pull-up resistor  
(typical).  
Open drain slave I2C serial communication data line. Use with an external 10-kΩ pull-up resistor  
(typical).  
SCL  
SDA  
13  
14  
I
I/O  
(1) AI = Analog Input, O = Output, I = Input, P = Power, I/O = Input/Output  
Copyright © 2016, Texas Instruments Incorporated  
3
bq34110  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
www.ti.com.cn  
6 Specifications  
6.1 Absolute Maximum Ratings  
Over operating free-air temperature range (unless otherwise noted)(1)  
MIN  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–0.3  
–40  
–40  
–40  
–65  
–40  
MAX  
UNIT  
V
VREGIN Regulator input range  
5.5  
VREGIN + 0.3  
2.75  
VCE  
CE input pin  
V
VREG25 Supply voltage range  
V
VIOD  
VBAT  
VI  
Open-drain I/O pins (SDA, SCL, ALERT2)  
5.5  
V
BAT input pin  
5.5  
V
Input voltage range to all other pins (SRP, SRN, TS, ALERT1, VEN/GPIO, LEN)  
Operating free-air temperature range  
Operating junction temperature range  
Functional temperature range  
VREG25 + 0.3  
85  
V
TA  
°C  
°C  
°C  
°C  
°C  
TJ  
100  
TF  
100  
Storage temperature range  
150  
TSTG  
Lead temperature (soldering, 10 s)  
100  
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings  
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended  
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
6.2 ESD Ratings  
VALUE  
±1500  
±2000  
±500  
UNIT  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, BAT pin(1)  
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001, all other pins(1)  
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)  
Electrostatic  
discharge  
V(ESD)  
V
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.  
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.  
6.3 Recommended Operating Conditions  
TA= –40°C to 85°C, VREGIN = VBAT = 3.6 V (unless otherwise noted)  
MIN  
2.7  
NOM  
MAX UNIT  
No operating restrictions  
No FLASH writes  
4.5  
2.7  
V
V
VREGIN  
Supply Voltage  
2.45  
External input capacitor for  
internal LDO between REGIN  
and VSS  
Nominal capacitor values specified.  
Recommend a 10% ceramic X5R type  
capacitor located close to the device.  
CREGIN  
0.1  
µF  
External output capacitor for  
internal LDO between VCC  
CREG25  
tPUCD  
0.47  
1
µF  
Power-up communication  
250  
ms  
6.4 Thermal Information  
bq34110  
THERMAL METRIC(1)  
TSSOP (PW)  
14 PINS  
103.8  
31.9  
UNIT  
RθJA  
Junction-to-ambient thermal resistance  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
RθJC(top)  
RθJB  
Junction-to-case (top) thermal resistance  
Junction-to-board thermal resistance  
46.6  
ψJT  
Junction-to-top characterization parameter  
Junction-to-board characterization parameter  
Junction-to-case (bottom) thermal resistance  
2.0  
ψJB  
45.9  
RθJC(bot)  
N/A  
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application  
report, SPRA953.  
4
Copyright © 2016, Texas Instruments Incorporated  
bq34110  
www.ti.com.cn  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
6.5 Electrical Characteristics: Supply Current  
TA= –40°C to 85°C, VREGIN = VBAT = 3.6 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
Device in NORMAL mode, ILOAD > Sleep  
Current  
ICC_NORMAL  
Normal operating current  
133  
µA  
Sleep+ operation mode  
current  
Device in SNOOZE mode, ILOAD < Sleep  
Current  
(1)  
ISNOOZE  
53  
22  
µA  
µA  
µA  
Low-power SLEEP mode  
current  
(1)  
ISLEEP  
Device in SLEEP mode, ILOAD < Sleep Current  
SHUTDOWN mode  
current  
Fuel gauge in SHUTDOWN mode, CE pin <  
VIL(CE) max  
ISHUTDOWN  
0.01  
(1) Specified by design. Not production tested.  
6.6 Electrical Characteristics: Digital Input and Output DC Characteristics  
TA= –40°C to 85°C, VREGIN = VBAT = 3.6 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX UNIT  
Output voltage, low (SCL,  
SDA, VEN, LEN, ALERT1, IOL = 3 mA  
ALERT2 pins)  
VOL  
0.4  
V
V
V
VOH(PP)  
VOH(OD)  
Output voltage, high  
IOH = –1 mA  
VREG25 – 0.5  
Output voltage, high (SDA,  
SCL, ALERT1, ALERT2  
pins)  
External pull-up resistor connected to VREG25  
VREG25 – 0.5  
Input voltage, high  
(ALERT1 pin)  
VIH(ALERT1)  
1.2  
VREG25 + 0.3  
V
VIL  
Input voltage, low  
–0.3  
0.6  
0.8  
V
V
VIL(CE)  
Input voltage, low (CE pin) VREGIN = 2.7 to 4.5 V  
Input voltage, high (CE  
VREGIN = 2.7 to 4.5 V  
pin)  
VIH(CE)  
VIH(OD)  
ILKG  
2.65  
1.2  
V
V
Input voltage, high (SDA,  
SCL, ALERT2 pins)  
5.5  
0.3  
Input leakage current (I/O  
pins)  
µA  
6.7 Electrical Characteristics: Power-On Reset  
TA = –40°C to 85°C; typical values at TA = 25°C and VREGIN = 3.6 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
Positive-going battery  
voltage input at REGIN  
VIT+  
2.20  
115  
VHYS  
Power-on reset hysteresis  
mV  
6.8 Electrical Characteristics: LDO Regulator  
TA = 25°C, CREG25 = 1.0 μF, VREGIN = 3.6 V (unless otherwise noted)(1)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
2.7 V VREGIN 4.5 V, IOUT 16 mA  
TA = –40°C to 85°C  
2.3  
2.3  
2.5  
2.7  
V
VREG25  
Regulator output voltage  
2.45 V VREGIN < 2.7 V, IOUT 3 mA  
TA = –40°C to 85°C  
VREG25 = 0 V  
TA = –40°C to 85°C  
(2)  
ISHORT  
Short circuit current limit  
250  
mA  
(1) LDO output current, IOUT, is the total load current. Use the LDO regulator to power the internal fuel gauge only.  
(2) Specified by design. Not production tested.  
Copyright © 2016, Texas Instruments Incorporated  
5
bq34110  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
www.ti.com.cn  
6.9 Electrical Characteristics: Internal Temperature Sensor  
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
Internal temperature  
sensor voltage gain  
GTEMP  
–2  
mV/°C  
6.10 Electrical Characteristics: Low-Frequency Clock Oscillator  
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)  
PARAMETER  
Operating frequency  
TEST CONDITIONS  
MIN  
TYP  
32.768  
0.25%  
0.25%  
0.25%  
500  
MAX UNIT  
f(LOSC)  
kHz  
1.5%  
TA = 0°C to 60°C  
–1.5%  
–2.5%  
–4%  
f(EIO)  
Frequency error(1)(2)  
Start-up time(3)  
TA = –20°C to 70°C  
TA = –40°C to 85°C  
2.5%  
4%  
t(SXO)  
µs  
(1) The frequency drift is included and measured from the trimmed frequency at VREG25 = 2.5 V, TA = 25°C.  
(2) The frequency error is measured from 32.768 kHz.  
(3) The start-up time is defined as the time it takes for the oscillator output frequency to be ±3%.  
6.11 Electrical Characteristics: High-Frequency Clock Oscillator  
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
8.389  
MAX UNIT  
MHz  
f(LOSC)  
Operating frequency  
TA = 0°C to 60°C  
–2%  
–3%  
0.38%  
0.38%  
0.38%  
2%  
f(EIO)  
Frequency error(1)(2)  
Start-up time(3)  
TA = –20°C to 70°C  
TA = –40°C to 85°C  
3%  
–4.5%  
4.5%  
t(SXO)  
5
ms  
(1) The frequency drift is included and measured from the trimmed frequency at VREG25 = 2.5 V, TA = 25°C.  
(2) The frequency error is measured from 8.389 MHz.  
(3) The start-up time is defined as the time it takes for the oscillator output frequency to be ±3%.  
6.12 Electrical Characteristics: Integrating ADC (Coulomb Counter)  
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
Differential input  
voltage range  
V(SR)  
V(SR) = V(SRP) – V(SRN)  
–0.125  
0.125  
V
Input voltage range,  
V(SRP) and V(SRN)  
V(SRP), V(SRN)  
–0.125  
14  
0.125  
15  
V
Conversion time  
Resolution  
Single conversion  
1
s
tSR_CONV  
bits  
µV  
VOS(SR)  
INL  
Input offset  
10  
Integral nonlinearity  
error  
±0.007%  
FSR(1)  
Effective input  
resistance(2)  
ZIN(SR)  
2.5  
MΩ  
ILKG(SR)  
Input leakage current(2)  
0.3  
µA  
(1) Full-scale reference  
(2) Specified by design. Not tested in production.  
6
Copyright © 2016, Texas Instruments Incorporated  
bq34110  
www.ti.com.cn  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
6.13 Electrical Characteristics: ADC (Temperature and Voltage Measurements)  
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
0.05  
0.05  
TYP  
MAX UNIT  
Internal voltage divider inactive, internal VREF  
Internal voltage divider activated, internal VREF  
1
V
V
ADC input voltage range  
for BAT measurement  
4.5  
VIN((ADC)  
ADC input voltage for TS  
pin measurement  
0
VREG25  
V
Conversion time  
Resolution  
125  
15  
ms  
bits  
mV  
(1)  
tADC_CONV  
VOS(ADC)  
Single conversion  
14  
Input offset  
1
5
Effective input resistance  
(TS with internal pull-  
down activated)(1)  
ZADC_TS  
kΩ  
When not measuring cell voltage (internal  
voltage divider inactive)  
8
MΩ  
Effective input resistance  
(BAT)(1)  
ZADC_BAT  
During measurement of cell voltage using  
internal divider (internal voltage divider active)  
100  
kΩ  
ILKG(ADC)  
Input leakage current(1)  
0.3  
µA  
(1) Specified by design. Not tested in production.  
6.14 Electrical Characteristics: Data Flash Memory  
TA = –40°C to 85°C, 2.4 V < VREG25 < 2.6 V; typical values at TA = 25°C and VREG25 = 2.5 V (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
Data retention(1)  
10  
Years  
tDR  
Flash –programming  
write cycles(1)  
20,000  
Cycles  
Word programming  
time(1)  
tWORDPROG  
ICCPROG  
2
ms  
Flash-write supply  
current(1)  
5
10  
mA  
(1) Specified by design. Not tested in production.  
6.15 Timing Requirements: I2C-Compatible Interface Timing Characteristics  
TA = –40°C to 85°C, 2.4 V < VREGIN = VBAT < 5 V; typical values at TA = 25°C and VREGIN = VBAT = 3.6 V (unless otherwise  
noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
NOM  
MAX  
300  
UNIT  
ns  
tR  
SCL/SDA rise time  
SCL/SDA fall time  
tF  
300  
ns  
tW(H)  
tW(L)  
tSU(STA)  
SCL pulse width (high)  
SCL pulse width (low)  
Setup for repeated start  
600  
1.3  
ns  
µs  
600  
ns  
Start to first falling edge  
of SCL  
td(STA)  
600  
ns  
tSU(DAT)  
th(DAT)  
Data setup time  
Data hold time  
100  
0
ns  
ns  
ns  
tSU(STOP)  
Setup time for stop  
600  
Bus free time between  
stop and start  
tBUF  
fSCL  
66  
µs  
Clock frequency  
400  
kHz  
Copyright © 2016, Texas Instruments Incorporated  
7
bq34110  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
www.ti.com.cn  
Figure 1. I2C-Compatible Interface Timing Diagram  
6.16 Typical Characteristics  
15  
10  
5
200  
160  
120  
80  
40  
0
0
-5  
-40  
-80  
-120  
-160  
-200  
-10  
-15  
-40èC  
-20èC  
25èC  
65èC  
85èC  
-40°C  
-20°C  
25°C  
65°C  
85°C  
-20  
2800 3000 3200 3400 3600 3800 4000 4200 4400  
25.2  
27  
28.8 30.6 32.4 34.2  
Battery Voltage (V)  
36  
37.8 39.6  
Battery Voltage (mV)  
D001  
D002  
Figure 2. V(Err) Across VIN (0 mA)  
Figure 3. V(Err) Across VIN (0 mA) for a 9-Series  
Configuration  
2
1
25  
20  
15  
10  
5
0
-1  
-2  
-3  
-4  
-5  
-6  
-7  
-8  
0
-5  
-10  
-15  
-20  
-25  
-40èC  
-20èC  
25èC  
65èC  
85èC  
-9  
-3000  
-2000  
-1000  
0
1000  
2000  
3000  
-40  
-20  
0
20  
40  
60  
80  
100  
Current (mA)  
Temperature (èC)  
D003  
D004  
Figure 4. I(Err)  
Figure 5. T(Err)  
8
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7 Detailed Description  
7.1 Overview  
The bq34110 device incorporates multiple capabilities to provide detailed and sophisticated information on  
single-cell and multi-cell battery packs. Several different battery chemistries are supported, including Li-Ion,  
LiFePO4, lead-acid (PbA), Nickel Metal Hydride (NiMH), and Nickel Cadmium (NiCd). The device integrates a  
gas gauge for monitoring battery charge level, an End-Of-Service (EOS) Determination function to evaluate when  
a battery is nearing the end of its usable life, a specialized WHr Charge Termination function to enable battery  
charging to a targeted energy capacity, a charge control scheme using direct pin control, SHA-1/HMAC-based  
authentication, and lifetime data logging functionality.  
NOTE  
Formatting Conventions in This Document:  
Commands: italics with parentheses and no breaking spaces; for example, Control()  
Data Flash: italics, bold, and breaking spaces; for example, Design Capacity  
Register Bits and Flags: brackets only; for example, [TDA]  
Data Flash Bits: italic and bold; for example, [XYZ1]  
Modes and States: ALL CAPITALS; for example, UNSEALED mode  
7.2 Functional Block Diagram  
CE REGIN  
VSS REG25  
BAT  
TS  
Analog Peripherals  
Clock Generator  
Power Control  
POWER-ON RESET  
SRP  
Reference  
SRN  
ADC  
CC  
ALERT1  
ALERT2  
Analog  
Interface  
&
RAM  
Memory  
CPU  
I/O Control  
Digital Peripherals  
I2C TIMER  
SDA  
SCL  
LEN  
Flash  
Memory  
ROM  
Memory  
INTERRUPTS  
VEN/GPIO  
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7.3 Feature Description  
The bq34110 gas gauge uses Compensated End-of-Discharge Voltage (CEDV) technology to accurately predict  
the battery capacity and other operational characteristics of the battery, and can be interrogated by a host  
processor to provide cell information, such as remaining capacity, full charge capacity, and average current.  
The integrated End-Of-Service (EOS) Determination function is specifically intended for applications where the  
battery is rarely discharged, such as in uninterruptible power supplies (UPS), enterprise server backup systems,  
and telecommunications backup modules. In such systems, the battery may remain in a fully (or near-fully)  
charged state for much of its lifetime, with it rarely or never undergoing a significant discharge. If the health of the  
battery in such a system is not monitored regularly, then it may degrade beyond the level required for a system  
backup/discharge event, and thus fail precisely at the time when it is needed most.  
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Feature Description (continued)  
The EOS Determination function monitors the health of the battery through the use of infrequent Learning  
Phases, which involves a controlled discharge of ~1% capacity, and provides an alert to the system when the  
battery is approaching the end of its usable service. By coordinating battery charging with the Learning Phases,  
the battery capacity available to the system can be maintained above a preselected level to avoid compromising  
the ability for the battery to support a system discharge event.  
The bq34110 device can support multi-cell battery configurations with maximum voltage up to 65 V through the  
use of external and internal resistive divider networks to reduce the voltage to an acceptable range for the  
device’s integrated ADC. These resistive dividers are actively controlled to avoid unnecessary power dissipation  
when not needed. The device integrates an internal temperature sensor as well as support for an external NTC  
thermistor, such as a Semitec 103AT or Mitsubishi BN35-3H103FB-50.  
The battery current is monitored by measuring the voltage across a series resistor, RSENSE, which is placed in  
series with the battery pack and has a typical value of 5 mΩ to 20 mΩ. The bq34110 device integrates two  
ADCs, one of which is dedicated to current measurement, and the second used for measurement of several  
other parameters, including temperature and voltage.  
Communication with the device is provided through an I2C interface, supporting rates up to 400 kHz. Dual  
ALERT pins are provided with programmable configuration, which enables them to be used for such functions as  
a host interrupt/alert or controlling the battery charger.  
To minimize power consumption, the bq34110 gauge has several power modes: NORMAL, SNOOZE, and  
SLEEP, which are under register or algorithm control. In addition, a separate chip enable (CE) pin is provided to  
control the internal LDO, which powers the bq34110 internal circuitry, and can put the device into SHUTDOWN  
mode.  
Information is accessed through a series of commands called Data Commands, which are indicated by the  
general format Command(). These commands are used to read and write information in the bq34110 device’s  
control and status registers, as well as its data flash locations.  
Commands are sent from the host to the bq34110 device via I2C and can be executed during application  
development, pack manufacture, or end-equipment operation. Cell information is stored in the bq34110 device in  
non-volatile flash memory. Many of the data flash locations are accessible during application development and  
pack manufacture. They cannot, generally, be accessed directly during end-equipment operation. Access to  
these locations is achieved by using the bq34110 device’s companion evaluation software, through individual  
commands, or through a sequence of data flash access commands. To access a desired data flash location, the  
correct data flash subclass and offset must be known.  
The bq34110 device provides 32 bytes of user-programmable data flash memory. This data space is accessed  
through a data flash interface. For specifics on accessing the data flash, see the bq34110 Technical Reference  
Manual (SLUUBF7).  
A SHA-1/HMAC-based battery pack authentication feature is also implemented on the bq34110 device. When  
the device is in UNSEALED mode, authentication keys can be (re)assigned. A scratch pad area is used to  
receive challenge information from a host and to export SHA-1/HMAC encrypted responses. For more  
information on authentication, see the bq34110 Technical Reference Manual (SLUUBF7).  
7.3.1 Communications  
7.3.1.1 I2C Interface  
The bq34110 device supports the standard I2C read, incremental read, one-byte write quick read, and functions.  
The 7-bit device address (ADDR) is the most significant 7 bits of the hex address and is fixed as 1010101. The  
8-bit device address is therefore 0xAA or 0xAB for write or read, respectively.  
10  
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Feature Description (continued)  
Host Generated  
Fuel Gauge Generated  
S
ADDR[6:0]  
0
A
CMD[7:0]  
A
DATA[7:0]  
A
P
S
ADDR[6:0]  
1
A
DATA[7:0]  
N P  
(a) 1-byte write  
(b) quick read  
DATA[7:0]  
N
CMD[7:0]  
ADDR[6:0]  
1
A
ADDR[6:0]  
S
0
A
P
A
Sr  
(c) 1-byte read  
A
Sr  
1
A
ADDR[6:0]  
A
N P  
S
ADDR[6:0]  
0
A
CMD[7:0]  
DATA[7:0]  
DATA[7:0]  
. . .  
(d) incremental read  
Figure 6. Supported I2C formats: (a) 1-byte write, (b) quick read, (c) 1 byte-read, and (d) incremental read  
(S = Start, Sr = Repeated Start, A = Acknowledge, N = No Acknowledge, and P = Stop).  
The “quick read” returns data at the address indicated by the address pointer. The address pointer, a register  
internal to the I2C communication engine, increments whenever data is acknowledged by the device or the I2C  
master. “Quick writes” function in the same manner and are a convenient means of sending multiple bytes to  
consecutive command locations (such as 2-byte commands that require two bytes of data).  
S
ADDR[6:0]  
0
A
CMD[7:0]  
A
DATA[7:0]  
A
P
Figure 7. Attempt to Write a Read-Only Address (Nack After Data Sent By Master)  
CMD[7:0]  
S
ADDR[6:0]  
0
A
N P  
Figure 8. Attempt to Read an Address Above 0x7F (NACK Command)  
CMD[7:0]  
DATA[7:0]  
A
DATA[7:0]  
ADDR[6:0]  
S
0
A
N
P
A
N
. . .  
Figure 9. Attempt at Incremental Writes (Nack All Extra Data Bytes Sent)  
A
Sr  
1
A
ADDR[6:0]  
A
N P  
S
ADDR[6:0]  
0
A
CMD[7:0]  
DATA[7:0]  
DATA[7:0]  
. . .  
Address  
0x7F  
Data From  
addr 0x7F  
Data From  
addr 0x00  
Figure 10. Incremental Read at the Maximum Allowed Read Address  
7.3.1.2 I2C Time Out  
The I2C engine releases both SDA and SCL if the I2C bus is held low for a time programmed in data flash. If the  
device were holding the lines, releasing them frees the master to drive the lines.  
Detailed examples of I2C transactions accessing gauge data can be found in the Using I2C Communication with  
the bq275xx Series of Fuel Gauges Application Report (SLUA467).  
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7.4 Device Functional Modes  
The bq34110 device has four functional power modes: NORMAL, SNOOZE, SLEEP, and SHUTDOWN, based  
on firmware and/or host control.  
In NORMAL mode, the device is fully powered and can execute any allowable task.  
In SNOOZE mode, the device periodically wakes to take data measurements and updates the data set, after  
which it then returns directly to SNOOZE.  
In SLEEP mode, the device maintains the low-frequency oscillator but turns off the high-frequency oscillator  
and exists in a reduced-power state, periodically taking measurements and performing calculations.  
In SHUTDOWN mode, the device is fully powered down and can only be awakened using the chip enable  
(CE) pin.  
8 Application and Implementation  
NOTE  
Information in the following applications sections is not part of the TI component  
specification, and TI does not warrant its accuracy or completeness. TI’s customers are  
responsible for determining suitability of components for their purposes. Customers should  
validate and test their design implementation to confirm system functionality.  
8.1 Application Information  
The bq34110 gas gauge is a highly configurable device with multiple features that can be used individually or  
simultaneously (with some restrictions). The CEDV gas gauging function together with its support for an external  
voltage divider allows gauging of high voltage, multi-cell battery configurations of various chemistries. The EOS  
Determination function is intended for rarely discharged applications and evaluates the condition of the battery  
without requiring conventional maintenance cycles. These and additional features are described in detail in the  
bq34110 Technical Reference Manual (SLUUBF7).  
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8.2 Typical Applications  
Figure 11 is a simplified schematic of the bq34110 system used in a multi-cell configuration.  
PACK+  
B
RLEN  
C
REGIN  
I2C CLK  
10k 10k  
100  
100  
I2C DATA  
100  
100  
/ALERT2  
/ALERT1  
1
2
3
4
5
6
7
VEN  
SDA 14  
SCL 13  
ALERT1  
LEN  
REG25  
ALERT2 12  
TS 11  
10k NTC  
0.1  
µF  
BAT  
CHIP ENABLE  
CE  
SRN 10  
.01  
75 ppm  
100  
0.1 µF  
REGIN  
REG25  
REGIN  
REG25  
SRP  
VSS  
9
8
A
100  
0.1 µF  
0.1 µF  
0.1 µF  
1 µF  
PACK–  
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If power control of the gauge is not required by the system, then CE should be  
connected directly to REGIN.  
A
B
C
Required for applications of more than one-series cell; otherwise, REGIN can connect  
directly to single-cell BAT+ or an alternative power source.  
Required for applications of more than one-series cell; otherwise, BAT connects  
directly to single-cell BAT+ and VEN can be left unconnected.  
Figure 11. bq34110 Simplified System Diagram  
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Typical Applications (continued)  
Figure 12 shows the schematic of the bq34110 EVM, and depicts how the device can be used in the system.  
REGIN  
REGIN  
R1  
10k  
R2  
100k  
1
2
3
4
5
6
7
8
<=5V  
<=5V  
>5V  
Q1  
2N7002-7-F  
R3  
10.0k  
R4  
10.0k  
1
1
Q2  
BSS84W-7-F  
2008-07-09  
R5  
165k  
J1  
R6  
4
3
2
1
>5V  
SDA  
SCL  
100  
R7  
SDA  
SCL  
GND  
J2  
D1  
BZT52C5V6T-7  
5.6V  
100  
R8  
16.5k  
22-05-3041  
R9  
300k  
1
REG25  
REGIN  
GND  
Q3  
BSS138W-7-F  
U2  
U3  
R10 R11  
100k 100k  
GND  
GND  
R12  
300k  
J3  
1
3
5
2
4
6
GND  
BAT+  
R13  
300k  
J4  
PEC02SAAN  
J5  
GND  
GND  
C1  
3300pF  
U1  
BAT  
GND  
J6  
R14  
1.0k  
4
2
5
4
3
2
1
ALERT1  
ALERT1  
ALERT2  
VEN  
LEN  
R15  
1.0k  
13  
14  
12  
SCL  
SDA  
ALERT2  
R16  
J7  
R17  
1.0k  
1
2
3
1
100  
VEN/GPIO  
BAT+  
BAT-  
PACK-  
GND  
R18  
0.01  
BAT-  
9
SRP  
SRN  
R19  
1.0k  
C2  
0.1µF  
10  
3
ED555/5DS  
LEN  
PACK-  
R20  
100  
39357-0003  
6
7
11  
REGIN  
REG25  
TS  
REG25  
RT1  
GND  
REGIN  
REG25  
REG25  
BAT+  
t°  
10.0k ohm  
C3  
0.1µF  
C4  
0.1µF  
NT1  
Net-Tie  
5
8
CE  
VSS  
J8  
REGIN  
GND  
GND  
GND  
PEC02SAAN  
J9  
C5  
0.1µF  
C6  
1µF  
R21  
20  
R22  
1.0M  
J10  
39357-0002  
GND  
GND  
GND  
PEC02SAAN  
Q4  
CSD17313Q2  
3
PACK-  
Copyright © 2016 Texas Instruments Incorporated  
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Figure 12. bq34110 EVM Schematic  
8.2.1 Design Requirements  
The bq34110 device supports several circuit configuration options that can be decided upon during the system  
design phase. Using the device with a single-cell battery versus a multi-cell configuration determines if there is a  
need for a battery divider and associated control using the VEN pin (as shown in Figure 11). The functions used  
within the bq34110 device also determine the pin usage, with the device incorporating flexibility to reuse pins for  
other purposes if the system configuration permits. For example, if a single-cell configuration is selected, then the  
VEN pin can be used as part of a direct charge control scheme. Similarly, the LEN, ALERT1, and/or ALERT2  
pins can also be repurposed to support direct charge control. For additional design guidelines, refer to the  
bq34110 EVM User’s Guide (SLUUBI1).  
8.2.2 Detailed Design Procedure  
8.2.2.1 BAT Voltage Sense Input  
A ceramic capacitor at the input to the BAT pin is used to bypass AC voltage ripple to ground, greatly reducing  
its influence on battery voltage measurements. It proves most effective in applications with load profiles that  
exhibit high-frequency current pulses (that is, cell phones) but is recommended for use in all applications to  
reduce noise on this sensitive high-impedance measurement node. If the device is used in a multi-cell  
configuration with an external resistive voltage divider, it is recommended that the resistors used therein be  
selected with temperature coefficient of resistance (TCR) of 75-ppm or below. More detail on the design of the  
voltage divider network is discussed in the bq34110 Technical Reference Manual (SLUUBF7).  
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Typical Applications (continued)  
8.2.2.2 SRP and SRN Current Sense Inputs  
The filter network at the input to the coulomb counter is intended to improve differential mode rejection of voltage  
measured across the sense resistor. These components should be placed as close as possible to the coulomb  
counter inputs, and the routing of the differential traces length-matched to best minimize impedance mismatch-  
induced measurement errors.  
8.2.2.3 Sense Resistor Selection  
Any variation encountered in the resistance present between the SRP and SRN pins of the fuel gauge will affect  
the resulting differential voltage, and derived current, it senses. As such, it is recommended to select a sense  
resistor with minimal tolerance and temperature coefficient of resistance (TCR) characteristics. The standard  
recommendation based on the best compromise between performance and price is a 1% tolerance, 75-ppm drift  
sense resistor with a 1-W power rating.  
8.2.2.4 TS Temperature Sense Input  
Similar to the BAT pin, a ceramic decoupling capacitor for the TS pin is used to bypass AC voltage ripple away  
from the high-impedance ADC input, minimizing measurement error. It should be placed as close as possible to  
the respective input pin for optimal filtering performance.  
8.2.2.5 Thermistor Selection  
The fuel gauge temperature sensing circuitry is designed to work with a negative temperature coefficient-type  
(NTC) thermistor with a characteristic 10-kΩ resistance at room temperature (25°C). The default curve-fitting  
coefficients configured in the fuel gauge specifically assume a 103AT-2 type thermistor profile and so that is the  
default recommendation for thermistor selection purposes. Moving to a separate thermistor resistance profile (for  
example, JT-2 or others) requires an update to the default thermistor coefficients in data flash to ensure highest  
accuracy temperature measurement performance.  
8.2.2.6 REGIN Power Supply Input Filtering  
A ceramic capacitor is placed at the input to the fuel gauge internal LDO to increase power supply rejection  
(PSR) and improve effective line regulation. It ensures that voltage ripple is rejected to ground instead of  
coupling into the internal supply rails of the fuel gauge.  
8.2.2.7 REG25 LDO Output Filtering  
A ceramic capacitor is also needed at the output of the internal LDO to provide a current reservoir for fuel gauge  
load peaks during high peripheral utilization. It acts to stabilize the regulator output and reduce core voltage  
ripple inside the fuel gauge.  
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Typical Applications (continued)  
8.2.3 Application Curves  
8.8  
8.7  
8.6  
8.5  
8.4  
8.3  
8.2  
8.1  
8
2.65  
VREGIN = 2.7 V  
VREGIN = 4.5 V  
2.6  
2.55  
2.5  
2.45  
2.4  
2.35  
-40  
-20  
0
20  
40  
60  
80  
100  
-40  
-20  
0
20  
40  
60  
80  
Temperature (èC)  
Temperature (C)  
D002  
D001  
Figure 14. High-Frequency Oscillator Frequency vs.  
Temperature  
Figure 13. Regulator Output Voltage vs. Temperature  
34  
5
4
33.5  
33  
3
2
32.5  
32  
1
0
-1  
-2  
-3  
-4  
-5  
31.5  
31  
30.5  
30  
-40  
-20  
0
20  
40  
60  
80  
100  
-30  
-20  
-10  
0
10  
20  
30  
40  
50  
60  
Temperature (èC)  
Temperature (èC)  
D003  
D004  
Figure 15. Low-Frequency Oscillator Frequency vs.  
Temperature  
Figure 16. Reported Internal Temperature Measurement  
vs. Temperature  
9 Power Supply Recommendations  
Power supply requirements for the bq34110 device are simplified due to the presence of the internal LDO-  
voltage regulation. The REGIN pin accepts any voltage level between 2.7 V and 4.5 V, which is optimum for a  
single-cell Li-Ion application. For higher battery voltage applications, a simple preregulator can be provided to  
power the bq34110 device. Decoupling the REGIN pin should be done with a 0.1-μF 10% ceramic X5R capacitor  
placed close to the device. While the preregulator circuit is not critical, special attention should be paid to its  
quiescent current and power dissipation. The input voltage should handle the maximum battery stack voltage.  
The output voltage can be centered within the 2.7-V to 4.5-V range as recommended for the REGIN pin.  
For high stack count applications, a commercially available LDO is often the best quality solution, but comes with  
a cost tradeoff. To lower the BOM cost, the following approaches are recommended.  
In Figure 17, Q1 is used to drop the battery stack voltage to roughly 4 V to power the bq34110 device's REGIN  
pin. To avoid unwanted quiescent current consumption, R1 should be set as high as is practical. It is  
recommended to use a low-current Zener diode.  
16  
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From Battery Stack +  
R1  
Q1  
~4 V  
D1  
5.6 V  
To REGIN  
Figure 17. Q1 Dropping Battery Stack Voltage to 4 V  
Alternatively, if the range of a high-voltage battery stack can be well-defined, a simple source follower based on  
a resistive divider can be used to lower the BOM cost and the quiescent current. For example:  
From Battery Stack +  
R1  
Q1  
2.7 V ~ 4.5 V  
R2  
To REGIN  
Figure 18. Source Follower on a Resistive Divider  
10 Layout  
10.1 Layout Guidelines  
Attention to layout is critical to the success of any battery management circuit board. The mixture of high-current  
paths with an ultralow-current microcontroller creates the potential for design issues that are not always trivial to  
solve. Some of the key areas of concern are described in the following sections and can help to enable success.  
10.1.1 Power Supply Decoupling Capacitor  
Power supply decoupling from REG25 to ground is important for optimal operation of the gas gauge. To keep the  
loop area small, place this capacitor next to the IC and use the shortest possible traces. A large loop area  
renders the capacitor useless and forms a small-loop antenna for noise pickup. Ideally, the traces on each side  
of the capacitor should be the same length and run in the same direction to avoid differential noise during ESD. If  
possible, place a via near the VSS pin to a ground plane layer.  
10.1.2 Capacitors  
Power supply decoupling for the gas gauge requires 0.1-μF ceramic capacitors for the BAT and REGIN pins.  
These should be placed reasonably close to the IC without using long traces back to VSS. The LDO voltage  
regulator, whether external or internal to the main IC, requires a 1-μF ceramic capacitor to be placed fairly close  
to the regulation output pin (REG25). This capacitor is for amplifier loop stabilization and as an energy well for  
the 2.5-V supply.  
10.1.3 Communication Line Protection Components  
5.6-V Zener diodes are included on the I2C lines to protect the communication pins of the gas gauge from ESD.  
These diodes should be located as close as possible to the pack connector. The grounded end of these Zener  
diodes should be returned to the PACK(–) node rather than to the low-current digital ground system. This way,  
ESD is diverted away from the sensitive electronics as much as possible.  
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10.2 Layout Example  
10.2.1 Ground System  
The gas gauge requires a low-current ground system separate from the high-current PACK(–) path. ESD ground  
is defined along the high-current path from the PACK(–) terminal to the sense resistor. It is important that the  
low-current ground systems only connect to the PACK(–) path at the sense resistor Kelvin pick-off point. It is  
recommended to use an optional inner layer ground plane for the low-current ground system.  
In Figure 19, the green area shows an example of using the low-current ground as a shield for the gas gauge  
circuit. Notice how it is kept separate from the high-current ground, which is shown in red. The high current path  
is joined with the low-current path only at one point, shown with the small blue connection between the two  
planes.  
Figure 19. High-Current Versus Low-Current Ground Layout  
10.2.2 Kelvin Connections  
Kelvin voltage sensing is very important to accurately measure current and cell voltage. Note that in Figure 19  
the differential connections at the sense resistor do not add any voltage drop across the copper etch that carries  
the high current path through the sense resistor.  
10.2.3 Board Offset Considerations  
Although the most important component for board offset reduction is the decoupling capacitor for REGIN,  
additional benefit is possible by using this recommended pattern for the coulomb counter differential low-pass  
filter network.  
Maintain the symmetrical placement pattern shown for optimum current offset performance. Use symmetrical  
shielded differential traces, if possible, from the sense resistor to the 100-Ω resistors, as shown in Figure 20.  
18  
Copyright © 2016, Texas Instruments Incorporated  
 
bq34110  
www.ti.com.cn  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
Layout Example (continued)  
Figure 20. Differential Connection Between SRP and SRN Pins with Sense Resistor  
10.2.4 ESD Spark Gap  
Protect the communication lines from ESD with a spark gap at the connector. Figure 21 shows the recommended  
pattern with its 0.2-mm spacing between the points.  
Figure 21. Recommended Spark-Gap Pattern Helps Protect Communication Lines from ESD  
版权 © 2016, Texas Instruments Incorporated  
19  
 
bq34110  
ZHCSFQ8B AUGUST 2016REVISED NOVEMBER 2016  
www.ti.com.cn  
11 器件和文档支持  
11.1 文档支持  
11.1.1 相关文档ꢀ  
bq34110 技术参考手册》(文献编号:SLUUBF7)  
bq34110 EVM 用户指南》(文献编号:SLUUBI1)  
《使用 I2C bq275xx 系列电量监测计通信应用报告》(文献编号:SLUA467)  
11.2 接收文档更新通知  
如需接收文档更新通知,请访问 www.ti.com.cn 网站上的器件产品文件夹。点击右上角的提醒我 (Alert me) 注册  
后,即可每周定期收到已更改的产品信息。有关更改的详细信息,请查阅已修订文档中包含的修订历史记录。  
11.3 社区资源  
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective  
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of  
Use.  
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration  
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help  
solve problems with fellow engineers.  
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and  
contact information for technical support.  
11.4 商标  
E2E is a trademark of Texas Instruments.  
通过 I2C is a trademark of NXP B.V. Corporation.  
All other trademarks are the property of their respective owners.  
11.5 静电放电警告  
这些装置包含有限的内置 ESD 保护。 存储或装卸时,应将导线一起截短或将装置放置于导电泡棉中,以防止 MOS 门极遭受静电损  
伤。  
11.6 Glossary  
SLYZ022 TI Glossary.  
This glossary lists and explains terms, acronyms, and definitions.  
12 机械、封装和可订购信息  
以下页中包括机械、封装和可订购信息。这些信息是针对指定器件可提供的最新数据。这些数据会在无通知且不对  
本文档进行修订的情况下发生改变。欲获得该数据表的浏览器版本,请查阅左侧的导航栏。  
20  
版权 © 2016, Texas Instruments Incorporated  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
PACKAGING INFORMATION  
Orderable Device  
Status Package Type Package Pins Package  
Eco Plan  
Lead finish/  
Ball material  
MSL Peak Temp  
Op Temp (°C)  
Device Marking  
Samples  
Drawing  
Qty  
(1)  
(2)  
(3)  
(4/5)  
(6)  
BQ34110PW  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
PW  
PW  
14  
14  
90  
RoHS & Green  
NIPDAU  
Level-2-260C-1 YEAR  
Level-2-260C-1 YEAR  
-40 to 85  
-40 to 85  
BQ34110  
BQ34110  
BQ34110PWR  
2000 RoHS & Green  
NIPDAU  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance  
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may  
reference these types of products as "Pb-Free".  
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.  
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based  
flame retardants must also meet the <=1000ppm threshold requirement.  
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.  
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation  
of the previous line and the two combined represent the entire Device Marking for that device.  
(6)  
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two  
lines if the finish value exceeds the maximum column width.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
10-Dec-2020  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
BQ34110PWR  
TSSOP  
PW  
14  
2000  
330.0  
12.4  
6.9  
5.6  
1.6  
8.0  
12.0  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
TSSOP PW 14  
SPQ  
Length (mm) Width (mm) Height (mm)  
367.0 367.0 38.0  
BQ34110PWR  
2000  
Pack Materials-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
5-Jan-2022  
TUBE  
*All dimensions are nominal  
Device  
Package Name Package Type  
PW TSSOP  
Pins  
SPQ  
L (mm)  
W (mm)  
T (µm)  
B (mm)  
BQ34110PW  
14  
90  
530  
10.2  
3600  
3.5  
Pack Materials-Page 3  
重要声明和免责声明  
TI“按原样提供技术和可靠性数据(包括数据表)、设计资源(包括参考设计)、应用或其他设计建议、网络工具、安全信息和其他资源,  
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保。  
这些资源可供使用 TI 产品进行设计的熟练开发人员使用。您将自行承担以下全部责任:(1) 针对您的应用选择合适的 TI 产品,(2) 设计、验  
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Copyright © 2022,德州仪器 (TI) 公司  

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