BQ25172 [TI]
采用 QFN 封装的 0.8A、1 至 6 节镍氢电池独立线性充电器;型号: | BQ25172 |
厂家: | TEXAS INSTRUMENTS |
描述: | 采用 QFN 封装的 0.8A、1 至 6 节镍氢电池独立线性充电器 电池 |
文件: | 总28页 (文件大小:2402K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
BQ25172
ZHCSPT0 –JUNE 2022
BQ25172:适用于1 至6 节镍氢电池的800mA 线性电池充电器
1 特性
3 说明
• 可承受高达30V 的输入电压
• 自动睡眠模式,可降低功耗
BQ25172 是一款集成 800mA 线性充电器,适用于工
业和医疗应用的 1 节至 6 节镍氢电池。 该器件具有为
电池充电的单电源输出。只要安全计时器期间内平均系
统负载不会妨碍电池充满电,就可以使系统负载与电池
并联。当系统负载与电池并联时,充电电流会由系统和
电池共享。
– 350nA 电池泄漏电流
– 禁用充电时,输入泄漏电流为85µA
• 通过间歇性充电功能支持1 节至6 节镍氢电池
• 操作可使用外部电阻器进行编程
– VSET 用于设置镍氢电池节数(1 节至6 节)
– 用于设置10mA 至800mA 充电电流的ISET
– TMR 用于设置充电安全计时器时间
(4 小时至22 小时)
该器件仅在恒流模式下为镍氢电池充电,并在可编程计
时器到期或电池电压超过 VOUT_OVP 阈值时终止充电周
期。 在所有充电阶段,内部控制环路监控 IC 结温,并
在其超过内部温度阈值TREG 时降低充电电流。
• 高精度
充电器功率级和充电电流感测功能均完全集成。该充电
器具有高精度电流、充电状态显示和基于计时器的充电
终止功能。可通过外部电阻器对串联电池数、充电电流
和充电计时器进行编程。间歇充电允许镍氢电池在其电
压低于再充电阈值时自动再充电,以缩短计时器持续时
间。
– 充电电压精度为±0.5%
– 充电电流精度为±10%
• 充电特性
– NTC 热敏电阻输入用于监控电池温度
– 禁用低温和高温充电
– VOUT_OVP 在低温下降低
器件信息
封装(1)
– TS 引脚用于充电功能控制
– 用于状态和故障指示的开漏输出
• 集成故障保护
封装尺寸(标称值)
器件型号
BQ25172
WSON (8)
2.0mm x 2.0mm
– 18V 输入过压保护
– 基于VSET 的输出过压保护
– 1000mA 过流保护
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
VIN: 3.0V œ 18V
IN
OUT
1s œ 6s NiMH
– 125°C 热调节;150°C 热关断保护
– OUT 短路保护
– VSET、ISET、TMR 引脚短路/开路保护
VREF
VSET
ISET
GND
STAT
TS
2 应用
TMR
BQ25172
• 车队管理、资产跟踪
• 气体检测仪
• 电子销售点(ePOS)
• 美容美发
简化版原理图
• 电动牙刷
• 脉搏血氧仪
• 血糖监控
• 红外温度计
本文档旨在为方便起见,提供有关TI 产品中文版本的信息,以确认产品的概要。有关适用的官方英文版本的最新信息,请访问
www.ti.com,其内容始终优先。TI 不保证翻译的准确性和有效性。在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SLUSDY5
BQ25172
ZHCSPT0 –JUNE 2022
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Table of Contents
7.4 Device Functional Modes..........................................16
8 Application and Implementation..................................17
8.1 Application Information............................................. 17
8.2 Typical Applications.................................................. 17
9 Power Supply Recommendations................................20
10 Layout...........................................................................20
10.1 Layout Guidelines................................................... 20
10.2 Layout Example...................................................... 20
11 Device and Documentation Support..........................21
11.1 Device Support........................................................21
11.2 接收文档更新通知................................................... 21
11.3 支持资源..................................................................21
11.4 Trademarks............................................................. 21
11.5 Electrostatic Discharge Caution..............................21
11.6 术语表..................................................................... 21
12 Mechanical, Packaging, and Orderable
1 特性................................................................................... 1
2 应用................................................................................... 1
3 说明................................................................................... 1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 4
6.1 Absolute Maximum Ratings........................................ 4
6.2 ESD Ratings............................................................... 4
6.3 Recommended Operating Conditions.........................4
6.4 Thermal Information....................................................5
6.5 Electrical Characteristics.............................................6
6.6 Timing Requirements..................................................7
6.7 Typical Characteristics................................................8
7 Detailed Description........................................................9
7.1 Overview.....................................................................9
7.2 Functional Block Diagram.........................................10
7.3 Feature Description...................................................11
Information.................................................................... 22
4 Revision History
注:以前版本的页码可能与当前版本的页码不同
DATE
REVISION
NOTES
June 2022
*
Initial Release
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5 Pin Configuration and Functions
IN
ISET
TS
1
2
3
4
8
7
6
5
OUT
BQ25172
VSET
TMR
STAT
Thermal Pad
GND
图5-1. DSG Package WSON 8-Pin Top View
表5-1. Pin Functions
PIN
I/O
DESCRIPTION
NAME
NUMBER
IN
1
P
Input power, connected to external DC supply. Bypass IN with a ≥1-μF capacitor to GND, placed
close to the IC.
ISET
TS
2
3
I
I
Programs the device charge current. External resistor from ISET to GND defines charge current
value. Expected range is 30 kΩ (10 mA) to 375 Ω (800 mA). ICHG = KISET / RISET
.
Temperature qualification voltage input. Connect a negative temperature coefficient (NTC)
thermistor directly from TS to GND (AT103-2 recommended). Charge suspends when the TS pin
voltage is out of range. VOUT_OVP is reduced in cool region. If TS function is not needed, connect
an external 10-kΩresistor from this pin to GND. Pulling VTS < VTS_ENZ disables the charger.
GND
STAT
4
5
Ground pin
–
O
Open drain charge status indication output. Connect to the pullup rail via a 10-kΩresistor. LOW
indicates charge in progress. HIGH indicates charge complete or charge disabled. When a fault
condition is detected, the STAT pin blinks at 1 Hz.
TMR
6
7
I
I
Connect to a pulldown resistor to program charge safety timer duration. Valid resistor range is 3.6
kΩto 36 kΩ. Refer to 节7.3.1.2.
VSET
Programs the number of series NiMH cells. Valid resistor range is 3.6 kΩto 62 kΩ. Recommend
using a ±1% tolerance resistor with <200 ppm/ºC temperature coefficient. Refer to 节7.3.1.3.
OUT
8
P
—
Battery connection. System load may be connected in parallel to the battery. Bypass OUT with a
≥1-μF capacitor to GND, placed close to the IC.
Thermal Pad
Exposed pad beneath the IC for heat dissipation. Solder thermal pad to the board with vias
connecting to solid GND plane.
—
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
–0.3
–0.3
–0.3
MAX
30
UNIT
V
Voltage
IN
Voltage
OUT
13
V
Voltage
ISET, STAT, TMR, TS, VSET
STAT
5.5
5
V
Output Sink Current
Junction temperature, TJ
Storage temperature, Tstg
mA
°C
°C
150
150
–40
–65
(1) Operation outside the Absolute Maximum Ratings may cause permanent device damage. Absolute maximum
ratings do not imply functional operation of the device at these or any other conditions beyond those listed under Recommended
Operating Conditions. If briefly operating outside the Recommended Operating Conditions but
within the Absolute Maximum Ratings, the device may not sustain damage, but it may not be fully functional.
Operating the device in this manner may affect device reliability, functionality, performance, and shorten the
device lifetime.
6.2 ESD Ratings
VALUE
UNIT
Human body model (HBM), per ANSI/ESDA/
JEDEC JS-001, all pins(1)
±2500
V(ESD)
Electrostatic discharge
V
Charged device model (CDM), per JEDEC
specification JESD22-C101, all pins(2)
±1500
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
MIN
NOM
MAX
18
UNIT
V
VIN
Input voltage
3.0
VOUT
Output voltage
10.5
0.8
V
IOUT
Output current
A
TJ
Junction temperature
IN capacitor
125
°C
–40
1
CIN
µF
COUT
OUT capacitor
1
µF
RTMR
TMR resistor
3.6
3.6
-1
36
62
1
kΩ
kΩ
%
RVSET
VSET resistor
RTMR_VSET_TOL
RTMR_VSET_TEMPCO
RISET
Tolerance for TMR, and VSET resistors
Temperature coefficient for TMR, and VSET resistors
ISET resistor
200
30
ppm/℃
kΩ
kΩ
0.375
RTS
TS thermistor resistor (recommend 103AT-2)
10
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6.4 Thermal Information
BQ25172
DSG(WSON)
8 PINS
75.2
THERMAL METRIC(1)
UNIT
RθJA
Junction-to-ambient thermal resistance (JEDEC(1)
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
)
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
93.4
41.8
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
3.8
ΨJT
41.7
ΨJB
RθJC(bot)
17.0
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
3.0V < VIN < 18V and VIN > VOUT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
QUIESCENT CURRENTS
OUT= 4.2V, IN floating or IN = 0V - 5V,
Charge Disabled, TJ = 25 °C
0.350
0.350
0.8
0.6 µA
0.8 µA
1.2 µA
1.5 µA
110 µA
µA
IQ_OUT
Quiescent output current (OUT)
Quiescent output current (OUT)
OUT= 4.2V, IN floating or IN = 0V - 5V,
Charge Disabled, TJ < 105 °C
OUT = 8.4V, IN floating or IN = 0V - 14V,
Charge Disabled, TJ = 25 °C
IQ_OUT
OUT = 8.4V, IN floating or IN = 0V - 14V,
Charge Disabled, TJ < 105 °C
0.8
Shutdown input current (IN) with
charge disabled via TS pin
IN = 5V, Charge Disabled (VTS < VTS_ENZ),
no battery
ISD_IN_TS
ISTANDBY_IN
ISTANDBY_IN
IQ_IN
80
Standby input current (IN) with charge
terminated
IN = 5V, Charge Enabled, charge terminated
190
230
0.45
0.45
Standby input current (IN) with charge IN = 14V, Charge Enabled, charge
µA
terminated
terminated
IN = 5V, OUT = 3.8V, Charge Enabled,
ICHG = 0A
Quiescent input current (IN)
0.6 mA
0.6 mA
IN = 14V, OUT = 7.6V, Charge Enabled,
ICHG = 0A
IQ_IN
Quiescent input current (IN)
INPUT
VIN_OP
IN operating range
3.0
3.05
2.80
95
18
3.15
3.10
V
V
V
VIN_LOWV
VIN_LOWV
VSLEEPZ
VSLEEP
VIN_OV
IN voltage to start charging
IN voltage to stop charging
Exit sleep mode threshold
Sleep mode threshold hysteresis
VIN overvoltage rising threshold
VIN overvoltage falling threshold
IN rising
3.09
2.95
135
80
IN falling
IN rising, VIN - VOUT, OUT = 4V
IN falling, VIN - VOUT, OUT = 4V
IN rising
175 mV
mV
18.1
18.4
18.2
18.7
V
V
VIN_OVZ
IN falling
CONFIGURATION PINS SHORT/OPEN PROTECTION
RISET below this at startup, charger does not
initiate charge, power cycle or TS toggle to
reset
RISET_SHORT
RVSET_SHORT
RVSET_OPEN
Resistor value considered short
Resistor value considered short
Resistor value considered open
350
2.8
Ω
RVSET below this at startup, charger does
not initiate charge, power cycle or toggle to
reset
kΩ
kΩ
RVSET above this at startup, charger does
not initiate charge, power cycle or toggle to
reset
80
45
RTMR below this at startup, charger latches
off, power cycle or TS toggle to reset
RTMR_SHORT
RTMR_OPEN
Resistor value considered short
Resistor value considered open
2.8
kΩ
kΩ
RTMR above this at startup, charger latches
off, power cycle or TS toggle to reset
BATTERY CHARGER
Typical charge current regulation
ICHG_RANGE
10
800 mA
330
range
Charge current setting factor, ICHG
KISET / RISET
=
KISET
10mA < ICHG < 800mA
270
300
AΩ
720
450
90
800
500
100
10
880 mA
550 mA
110 mA
11 mA
RISET = 375Ω, OUT = 3.8V
RISET = 600Ω, OUT = 3.8V
RISET = 3.0kΩ, OUT = 3.8V
RISET = 30kΩ, OUT = 3.8V
ICHG_ACC
Charge current accuracy
9
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6.5 Electrical Characteristics (continued)
3.0V < VIN < 18V and VIN > VOUT + VSLEEP, TJ = -40°C to +125°C, and TJ = 25°C for typical values (unless otherwise noted)
PARAMETER
TEST CONDITIONS
OUT falling, VSET configured for 2-cell
IOUT = 400mA, TJ = 25°C
MIN
TYP
1.330
845
MAX UNIT
VRECHG
RON
Battery recharge threshold, per cell
1.305
1.355
1000
1450
V
mΩ
mΩ
Charging path FET on-resistance
IOUT = 400mA, TJ = -40 - 125°C
845
BATTERY CHARGER PROTECTION
OUT overvoltage rising threshold, per
cell
VOUT_OVP
VOUT rising, TS normal
VOUT falling, TS normal
VOUT rising, TS in cool range
1.65
1.40
1.45
1.70
1.45
1.50
1.75
1.50
1.55
V
V
V
OUT overvoltage falling threshold, per
cell
VOUT_OVP
OUT overvoltage rising threshold, per
cell
VOUT_OVP_TSCOOL
OUT overvoltage falling threshold, per
cell
VOUT_OVP_TSCOOL
IOUT_OCP
VOUT falling, TS in cool range
IOUT rising
1.30
0.9
1.35
1
1.40
1.1
V
A
Output current limit threshold
TEMPERATURE REGULATION AND TEMPERATURE SHUTDOWN
Typical junction temperature
regulation
TREG
125
°C
Thermal shutdown rising threshold
Thermal shutdown falling threshold
Temperature increasing
150
135
°C
°C
TSHUT
Temperature decreasing
BATTERY-PACK NTC MONITOR
ITS_BIAS TS nominal bias current
36.5
0.99
0.83
38
1.04
0.88
39.5 µA
Cold temperature threshold
TS pin voltage rising (approx. 0°C)
TS pin voltage falling (approx. 4°C)
1.09
0.93
V
V
VCOLD
Cold temperature exit threshold
Cool temperature threshold; VOUT_OVP
reduced
TS pin voltage rising (approx. 10°C)
TS pin voltage falling (approx. 13°C)
650
580
680
610
710 mV
640 mV
VCOOL
Cool temperature exit threshold;
VOUT_OVP returns to normal
Hot temperature threshold
TS pin voltage falling (approx. 45°C)
TS pin voltage rising (approx. 40°C)
176
208
188
220
200 mV
232 mV
VHOT
Hot temperature exit threshold
Charge Disable threshold. Crossing
this threshold shall shutdown IC
VTS_ENZ
TS pin voltage falling
40
50
60 mV
85 mV
Charge Enable threshold. Crossing
this threshold shall restart IC operation
VTS_EN
TS pin voltage rising
65
75
VTS_CLAMP
TS maximum voltage clamp
TS pin open-circuit (float)
2.3
2.6
2.9
V
LOGIC OUTPUT PIN (STAT)
VOL
Output low threshold level
High-level leakage current
Sink current = 5mA
Pull up rail 3.3V
0.4
1
V
IOUT_BIAS
µA
6.6 Timing Requirements
MIN
NOM
MAX
UNIT
BATTERY CHARGER
tTS_DUTY_ON
tTS_DUTY_OFF
tOUT_OCP_DGL
tSAFETY
TS turn-on time during TS duty cycle mode
TS turn-off time during TS duty cycle mode
100
2
ms
s
Deglitch time for IOUT_OCP, IOUT rising
100
10
µs
hr
9.5
10.5
Charge safety timer accuracy, RTMR = 18kΩ
Commercial Intermittent charge safety timer (NiMH), as
percentage of tSAFETY
tINTERMITTENT
20
%
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6.7 Typical Characteristics
CIN = 1 µF, COUT = 1 µF, VIN = 5 V, VOUT = 3.8 V, Temperature = Ambient (unless otherwise specified)
10
10mA
50mA
8
100mA
200mA
6
400mA
600mA
800mA
4
2
0
-2
-4
-6
-8
-10
3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9
VOUT (V)
4
4.1
VIN = 5 V and 12 V
VOUT = 3.8 V and 7.6 V
VIN = 5 V
Temperature = 25ºC
图6-2. ICHG Accuracy vs. Temperature
图6-1. ICHG Accuracy vs. Output Voltage
图6-3. Dropout Voltage vs. Output Current
TS Pin = LOW
VOUT = 0 V
图6-4. Input Shutdown Current vs. Input Voltage
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
2
-40èC
0èC
25èC
85èC
105èC
-40èC
1.8
0èC
25èC
105èC
125èC
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
3
5
7
9
11
VIN (V)
13
15
17 18
1
2
3
4
5
VOUT (V)
6
7
8
9
10
Charge enabled
ICHG = 0 A
VIN = 0 V
图6-6. Output Quiescent Current vs. Output Voltage
图6-5. Input Quiescent Current vs. Input Voltage
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7 Detailed Description
7.1 Overview
The BQ25172 is an integrated 800-mA linear charger for 1-cell to 6-cell NiMH battery applications. The device
has a single power output that charges the battery. When the system load is placed in parallel with the battery,
the input current is shared between the system and the battery.
The device charges a NiMH battery in constant current mode only and terminates the charge cycle when the
programmable timer, tSAFETY, expires or the battery voltage exceeds the VOUT_OVP threshold. An optional
intermittent charging phase can be programmed to automatically recharge the NiMH battery for a reduced timer
duration once its voltage falls below VRECHG
.
The charger includes flexibility in programming of the charge current, charge safety timer duration, and series
cell-count. This charger is designed to work with a standard USB connection or dedicated charging adapter (DC
output).
The charger also comes with a full set of safety features: battery temperature monitoring, overvoltage protection,
charge safety timer, and configuration pin (VSET, ISET, TMR) short and open protection. Upon application of a
valid input power source, the configuration pins are checked for short and open circuits. All of these features and
more are described in detail in the following sections.
The charger is designed for a single path from the input to the output to charge the battery. Once the input
adapter has been connected, the charge current is applied and the safety timer is started. The charge current is
programmed using the ISET pin. The safety timer is programmed by the TMR pin.
Power dissipation in the IC is greatest at high charge currents and low battery voltages. If the IC temperature
reaches TREG, the IC enters thermal regulation, slows the timer clock by half, and reduces the charge current as
needed to keep the temperature from rising any further.
Further details are described in 节7.3.
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7.2 Functional Block Diagram
OUT
IN
VBAT
ICHG
VIN
+
+
VREF
VIN_OV
VSLEEPZ
VIN_UVLOZ
ICHG_REF
INPUT
MONITOR
QBLK
CNTRL
TREG
TJ
/PG
CEN
FAULT
ISET
STAT
ICHG_REF
PIN DETECT
&
REF DAC
STAT
VSET
TMR
tSAFETY
TREG
TJ
TJSHUT
TS HOT
+
+
TSHUT
VTS_CLAMP
VTS
VHOT
VTS
+
+
TS COOL
VCOOL
ITS
TS
VRECHG
VBAT
tCHARGE
VTS
RECHG
CHARGE
CONTROL
TS COLD
BATOVP
+
+
VTS
VCOLD
VBAT
+
TMR_EXP
GND
tSAFETY
VOUT_OVP
ICHG
BATOCP
STAT
+
IOUT_OCP
STATE
MONITOR
BQ25172
FAULT
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7.3 Feature Description
7.3.1 Device Power Up from Input Source
When an input source is plugged in and charge is enabled (VTS > VTS_EN), the device checks the input source
voltage to turn on all the bias circuits. It detects and sets the charge current, safety timer length, and series cell-
count before the linear regulator is started. The power-up sequence from input source is as listed:
1. ISET pin detection
2. TMR pin detection to select charge timer
3. VSET pin detection to select battery stack configuration
4. Charger power up
7.3.1.1 ISET Pin Detection
After a valid VIN is plugged in and VTS > VTS_EN, the device checks the resistor on the ISET pin for a short circuit
(RISET < RISET_SHORT). If a short condition is detected, the charger remains in the FAULT state until the input or
TS pin is toggled. If the ISET pin is open-circuit, the charger proceeds through pin detection and starts the
charger with no charge current. The ISET pin is monitored while charging and changes in RISET while the
charger is operating immediately translates to changes in charge current.
An external pulldown resistor (±1% or better is recommended to minimize charge current error) from the ISET
pin to GND sets the charge current as:
KISET
ICHG
=
RISET
(1)
where:
• ICHG is the desired charge current
• KISET is a gain factor found in the electrical characteristics
• RISET is the pulldown resistor from the ISET pin to GND
For charge currents below 50 mA, an extra RC circuit is recommended on ISET to achieve a more stable current
signal. For greater accuracy at lower currents, part of the current-sensing FET is disabled to give better
resolution.
7.3.1.2 TMR Pin Detection
The TMR pin is used to program the safety timer using a ±1% pulldown resistor. The available pulldown resistors
and corresponding timer lengths are listed in the following table.
表7-1. TMR Pin Resistor Value Table
RESISTOR
> 45 kΩ
36 kΩ
CHARGE TIMER (HR)
No charge (open-circuit)
4 hr
6 hr
27 kΩ
8 hr
24 kΩ
10 hr
12 hr
14 hr
16 hr
18 hr
20 hr
18 kΩ
15 kΩ
11 kΩ
8.2 kΩ
6.2 kΩ
4.7 kΩ
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表7-1. TMR Pin Resistor Value Table (continued)
RESISTOR
CHARGE TIMER (HR)
22 hr
3.6 kΩ
No charge (short-circuit)
< 3.0 kΩ
If either a short- or open-circuit condition is detected, the charger stops operation and remains in the FAULT
state until the input or TS pin is toggled.
Once a value has been detected, it is latched in and the pin is not continuously monitored during operation. A
change in this pin is not acknowledged by the IC until the input supply or TS pin is toggled.
7.3.1.3 VSET Pin Detection
The VSET pin is used to program the device cell configuration using a ±1% pulldown resistor. The available
pulldown resistors and corresponding cell configurations are listed in the following table.
表7-2. VSET Pin Resistor Value Table
RESISTOR
> 80 Ω
62 kΩ
CELL COUNT
No charge (open-circuit)
1-cell
1-cell + intermittent charge
2-cell
47 kΩ
36 kΩ
2-cell + intermittent charge
3-cell
27 kΩ
24 kΩ
3-cell + intermittent charge
4-cell
18 kΩ
15 kΩ
4-cell + intermittent charge
5-cell
11 kΩ
8.2 kΩ
6.2 kΩ
4.7 kΩ
3.6 kΩ
< 3.0 kΩ
5-cell + intermittent charge
6-cell
6-cell + intermittent charge
No charge (short-circuit)
If either a short- or open-circuit condition is detected, the charger stops operation and remains in the FAULT
state until the input or TS pin is toggled.
Once a valid resistor value has been detected, the corresponding cell configuration is latched in and the pin is
not continuously monitored during operation. A change in this pin is not acknowledged by the IC until the input
supply or TS pin is toggled.
7.3.1.4 Charger Power Up
After ISET, TMR, and VSET pin resistor values have been validated, the device proceeds to enable the charger.
For more info see 节7.3.2.1.
7.3.2 Battery Charging Features
When charge is enabled (VTS > VTS_EN), the device automatically completes a charging cycle according to the
settings on the ISET, TMR, and VSET pins. Charging is terminated when the charge safety timer expires or
battery voltage exceeds VOUT_OVP
.
7.3.2.1 NiMH Battery Charging Profile
The device charges NiMH batteries in constant current mode only. The charge current programmed by ISET is
the only current applied over the charging cycle, as shown in 图 7-1. The charge termination method for the
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device is timer-based. The charge safety timer, tSAFETY, sets the charging duration. Programming the charge
safety timer is done with a pulldown resistor on the TMR pin.
Intermittent charging is designed to replenish the natural self-discharge of NiMH cells by restarting a short
charge cycle (20% of tSAFETY) when the output voltage falls below the VRECHG threshold. If the intermittent
charging function is disabled and a full charge cycle has been completed (safety timer expired with VOUT above
VRECHG), the device does not start a new charge cycle automatically and requires input supply or TS pin toggle
to initiate a new charge cycle.
If battery voltage is above VRECHG at power up, the battery is considered full and the device does not charge.
Once the battery voltage falls below VRECHG, the device automatically begins charging. If the intermittent
charging function is disabled, a single charge cycle is initiated with the safety timer duration programmed by the
TMR pin. If intermittent charging is enabled, an intermittent charge cycle is initiated for 20% of the TMR
programmed value.
When the charge timer (full-length or intermittent) expires, the battery voltage is checked again. If the battery
voltage is below VRECHG, a fault is reported through the STAT pin and further charging is prevented. If the charge
timer expires with VOUT above VRECHG, the STAT pin indicates charge completed. In the case where the TS fault
is within the cool threshold, VOUT_OVP is automatically reduced to VOUT_OVP_TSCOOL voltage.
If the charger is in thermal regulation during charging, the actual charging current will be less than the
programmed value. Termination by timer is still enabled, but the charging safety timer is counted at half the clock
rate. For more information, refer to 节7.3.2.2.
OUT Over-voltage
VOUT_OVP
Battery Voltage
Charge Current
ISET
Charge Current
Constant
Timer Expire
Current CC
(Charge Done)
Charge Timer
CHM_TMR
图7-1. NiMH Battery Charging Profile with Intermittent Charging Disabled
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OUT Over-voltage
VOUT_OVP
Battery Voltage
VRECHG
Charge Current
ISET
Charge Current
Constant
Current CC
Charge
Done
Intermittent
Charge
Charge Timer
CHM_TMR
20% x TMR
图7-2. NiMH Battery Charging Profile with Intermittent Charging Enabled
7.3.2.2 Charging Safety Timers
The device has built-in safety timers to prevent an extended charging cycle due to abnormal battery conditions.
When the safety timer expires, the charge cycle ends.
During thermal regulation, the safety timer counts at half the clock rate as the actual charge current is likely to be
below the ISET setting. For example, if the charger is in thermal regulation throughout the whole charging cycle
and the safety timer is 10 hours, then the timer will expire in 20 hours.
During faults which disable charging, such as VIN OVP, BAT OVP, TSHUT, or TS faults, the timer is suspended.
If the charging cycle is stopped and started again, the timer is reset (toggle of the TS pin restarts the timer).
The safety timer restarts counting when the charging cycle stops and restarts. This can occur as a result of the
TS pin being toggled, the battery falling below the recharge threshold, or the input supply being toggled.
7.3.2.3 Battery Cold, Hot Temperature Qualification (TS Pin)
While charging, the device continuously monitors battery temperature by sensing the voltage at the TS pin. A
negative temperature coefficient (NTC) thermistor should be connected between the TS and GND pins
(recommend: 103AT-2). If temperature sensing is not required in the application, connect a fixed 10-kΩ resistor
from the TS pin to GND to allow normal operation. Battery charging is allowed when the TS pin voltage falls
between the VCOLD and VHOT thresholds (typically 0°C to 45°C).
If the TS pin indicates battery temperature is outside this range, the device stops charging and enters the
Standby state. Once battery temperature returns to normal conditions, charging resumes automatically.
In addition to battery temperature sensing, the TS pin can be used to disable the charger at any time by pulling
TS voltage below VTS_ENZ. The device disables the charger and consumes ISD_IN_TS from the input supply. In
order to minimize quiescent current, the TS current source (ITS_BIAS) is duty-cycled, with an on time of
tTS_DUTY_ON and an off time of tTS_DUTY_OFF. After the TS pin pulldown is released, the device may take up to
tTS_DUTY_OFF to turn ITS_BIAS back on. After the source is turned on, the TS pin voltage goes above VTS_EN and
reenables charger operation. The device treats this TS pin toggle as an input supply toggle, triggering a device
power up from input source (see 节7.3.1).
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7.3.3 Status Outputs (STAT)
7.3.3.1 Charging Status Indicator (STAT)
The device indicates the charging state on the open-drain STAT pin as listed in the following table. This pin can
drive an LED.
表7-3. STAT Pin States
CHARGING STATE
STAT PIN STATE
High
Charge completed (TMR_EXP), charger in Sleep mode or charge
disabled
Charge in progress (including intermittent charge active)
Low
Fault (VIN OVP, BAT OVP, BAT OCP, or VSET, ISET, TMR pin short
or open)
Blink at 1 Hz
7.3.4 Protection Features
The device closely monitors input and output voltages, as well as internal FET current and temperature for safe
linear regulator operation.
7.3.4.1 Input Overvoltage Protection (VIN OVP)
If the voltage at the IN pin exceeds VIN_OV, the device turns off, the safety timer suspends counting, and the
device enters Standby mode. Once the IN voltage recovers to a normal level, the charge cycle and the safety
timer automatically resume operation.
7.3.4.2 Output Overvoltage Protection (BAT OVP)
If the voltage at the OUT pin exceeds VOUT_OVP, the device immediately stops charging, the safety timer
suspends counting, and the device enters Standby mode. Once the OUT voltage recovers to a normal level, the
charge cycle and the safety timer resume operation.
7.3.4.3 Output Overcurrent Protection (BAT OCP)
During normal operation, the OUT current should be regulated to the ISET programmed value. However, if a
short circuit occurs on the ISET pin, the OUT current may rise to an unintended level. If the current at the OUT
pin exceeds IOUT_OCP, the device turns off after a deglitch, tOUT_OCP_DGL, the safety timer resets the count, and
the device remains latched off. An input supply or pin toggle is required to restart operation.
IOUT_OCP
ICHG
tOUT_OCP_DGL
RISET
Short Circuit
event on ISET
Charger
latched off
图7-3. Overcurrent Protection
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7.3.4.4 Thermal Regulation and Thermal Shutdown (TREG and TSHUT)
The device monitors its internal junction temperature (TJ) to avoid overheating and to limit the IC surface
temperature. When the internal junction temperature exceeds the thermal regulation limit, the device
automatically reduces the charge current to maintain the junction temperature at the thermal regulation limit
(TREG). During thermal regulation, the safety timer runs at half the clock rate and the actual charging current is
reduced below the programmed value on the ISET pin.
Additionally, the device has thermal shutdown to turn off the linear regulator when the IC junction temperature
exceeds the TSHUT threshold. The charger resumes operation when the IC die temperature decreases below
the TSHUT falling threshold.
7.4 Device Functional Modes
7.4.1 Shutdown or Undervoltage Lockout (UVLO)
The device is in the shutdown state if the IN pin voltage is less than VIN_LOWV. The internal circuitry is powered
down, all the pins are high impedance, and the device draws from the input supply. Once the IN voltage rises
above the VIN_LOWV threshold, the IC enters Sleep mode or Active mode depending on the OUT pin voltage.
7.4.2 Sleep Mode
The device is in Sleep mode when VIN_LOWV < VIN < VOUT + VSLEEPZ. The device waits for the input voltage to
rise above VOUT + VSLEEPZ to start operation.
7.4.3 Active Mode
The device is powered up and charges the battery when the TS pin is above VTS_ENZ and the IN voltage ramps
above both VIN_LOWV and VOUT + VSLEEPZ. The device draws IQ_IN from the supply to bias the internal circuitry.
For details on the device power-up sequence, refer to 节7.3.1.
7.4.3.1 Standby Mode
The device is in Standby mode if a valid input supply is present and charge is terminated or if a recoverable fault
is detected. The internal circuitry is partially biased, and the device continues to monitor for either VOUT to drop
below VRECHG or the recoverable fault to be removed.
7.4.4 Fault Mode
The fault conditions are categorized into recoverable and nonrecoverable as follows:
• Recoverable, from which the device should automatically recover once the fault condition is removed:
– VIN OVP
– BAT OVP
– TS HOT
– TS COLD
• Nonrecoverable, requiring pin or input supply toggle to resume operation:
– BAT OCP
– ISET pin short detected
– Charge timer expires with VOUT below VRECHG
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8 Application and Implementation
备注
以下应用部分中的信息不属于TI 器件规格的范围,TI 不担保其准确性和完整性。TI 的客 户应负责确定
器件是否适用于其应用。客户应验证并测试其设计,以确保系统功能。
8.1 Application Information
A typical application consists of the device configured as a standalone battery charger for a 1-cell to 6-cell NiMH
battery. The charge voltage and number of cells is configured using a pulldown resistor on the VSET pin. The
charge current is configured using a pulldown resistor on the ISET pin. A battery thermistor may be connected to
the TS pin to allow the device to monitor battery temperature and control charging. Pulling the TS pin below
VTS_ENZ disables the charging function. The safety timer is programmable through a pullown resistor on the TMR
pin. Faults are indicated through the STAT pin.
8.2 Typical Applications
8.2.1 NiMH Charger Design Example
VIN: 3.0V œ 18V
IN
OUT
1s œ 6s NiMH
VREF
VSET
ISET
GND
STAT
TS
TMR
BQ25172
图8-1. BQ25172 Simple Schematic
8.2.1.1 Design Requirements
The design requirements include the following:
• Input supply up to 18 V
• Battery: 4-cell NiMH, RVSET = 11 kΩ
• Fast charge current: ICHG = 30 mA
• Recharge voltage for intermittent cycles: VRECHG = 1.33V x 4 = 5.32 V
• Charge safety timer: RTMR = 8.2 kΩ, tSAFETY: 16 hr
• TS –Battery temperature sense = 10-kΩNTC (103AT-2)
• TS can be pulled low to disable charging
8.2.1.2 Detailed Design Procedure
The regulation voltage is set via the VSET pin to 2s NiMH, the input voltage is 5 V and the charge current is
programmed via the ISET pin to 500 mA.
RISET = [KISET / ICHG
]
from electrical characteristics table. . . KISET= 300 AΩ
RISET = [300 AΩ/0.5 A] = 600 Ω
Selecting the closest 1% resistor standard value, use a 604-Ω resistor between ISET and GND, for an expected
ICHG 497 mA.
8.2.1.3 Application Curves
CIN = 1 µF, COUT = 1 µF, VIN = 5 V, VOUT = 3.8 V (unless otherwise specified)
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OUT = open-circuit
RISET = 0.6kΩ
RISET = 0.6 kΩ
图8-2. Power Up with Battery
图8-3. Power Up without Battery
TS pulled LOW
VIN = 5 V →0 V
图8-5. Charge Disable
图8-4. Power Down with Battery
TS pin released
VIN = 5 V →10 V
图8-6. Charge Enable
图8-7. Input OVP Response
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VIN = 20 V →10 V
ISET = 0 Ω
图8-8. Input OVP Recovery
图8-9. ISET Short-Circuit Then Power Up
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9 Power Supply Recommendations
The device is designed to operate from an input voltage supply range between 3 V and 18 V (tolerant up to 30
V) and current capability of at least the maximum designed charge current. If located more than a few inches
from the IN and GND pins, a larger capacitor is recommended.
10 Layout
10.1 Layout Guidelines
To obtain optimal performance, the decoupling capacitor from the IN pin to the GND pin and the output filter
capacitor from the OUT pin to the GND pin should be placed as close as possible to the device, with short trace
runs to both IN, OUT, and GND.
• All low current GND connections should be kept separate from the high current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
• The high current charge paths into the IN pin and from the OUT pin must be sized appropriately for the
maximum charge current in order to avoid voltage drops in these traces.
10.2 Layout Example
GND
VREF
IN
GND
OUT
IN
OUT
VSET
TMR
0402
TMR
0402
STAT
ISET
TS
0402
VSET
GND
STAT
GND
图10-1. BQ25172 Layout Example
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11 Device and Documentation Support
11.1 Device Support
11.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息,不能构成与此类产品或服务或保修的适用性有关的认可,不能构成此
类产品或服务单独或与任何TI 产品或服务一起的表示或认可。
11.2 接收文档更新通知
要接收文档更新通知,请导航至 ti.com 上的器件产品文件夹。点击订阅更新 进行注册,即可每周接收产品信息更
改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
11.3 支持资源
TI E2E™ 支持论坛是工程师的重要参考资料,可直接从专家获得快速、经过验证的解答和设计帮助。搜索现有解
答或提出自己的问题可获得所需的快速设计帮助。
链接的内容由各个贡献者“按原样”提供。这些内容并不构成 TI 技术规范,并且不一定反映 TI 的观点;请参阅
TI 的《使用条款》。
11.4 Trademarks
TI E2E™ is a trademark of Texas Instruments.
所有商标均为其各自所有者的财产。
11.5 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
11.6 术语表
TI 术语表
本术语表列出并解释了术语、首字母缩略词和定义。
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12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGE OPTION ADDENDUM
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12-Apr-2023
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
BQ25172DSGR
ACTIVE
WSON
DSG
8
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 125
B172
Samples
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
GENERIC PACKAGE VIEW
DSG 8
2 x 2, 0.5 mm pitch
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
This image is a representation of the package family, actual package may vary.
Refer to the product data sheet for package details.
4224783/A
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PACKAGE OUTLINE
DSG0008A
WSON - 0.8 mm max height
SCALE 5.500
PLASTIC SMALL OUTLINE - NO LEAD
2.1
1.9
B
A
0.32
0.18
PIN 1 INDEX AREA
2.1
1.9
0.4
0.2
ALTERNATIVE TERMINAL SHAPE
TYPICAL
0.8
0.7
C
SEATING PLANE
0.05
0.00
SIDE WALL
0.08 C
METAL THICKNESS
DIM A
OPTION 1
0.1
OPTION 2
0.2
EXPOSED
THERMAL PAD
(DIM A) TYP
0.9 0.1
5
4
6X 0.5
2X
1.5
9
1.6 0.1
8
1
0.32
0.18
PIN 1 ID
(45 X 0.25)
8X
0.4
0.2
8X
0.1
C A B
C
0.05
4218900/E 08/2022
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
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EXAMPLE BOARD LAYOUT
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
(0.9)
(
0.2) VIA
8X (0.5)
TYP
1
8
8X (0.25)
(0.55)
SYMM
9
(1.6)
6X (0.5)
5
4
SYMM
(1.9)
(R0.05) TYP
LAND PATTERN EXAMPLE
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4218900/E 08/2022
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
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EXAMPLE STENCIL DESIGN
DSG0008A
WSON - 0.8 mm max height
PLASTIC SMALL OUTLINE - NO LEAD
8X (0.5)
METAL
8
SYMM
1
8X (0.25)
(0.45)
SYMM
9
(0.7)
6X (0.5)
5
4
(R0.05) TYP
(0.9)
(1.9)
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD 9:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4218900/E 08/2022
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
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