BQ24075TRGTT_技术文档

bq24075T

bq24079T

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SLUS937 –DECEMBER 2009

1.5A USB-Friendly Li-Ion Battery Charger and Power-Path Management IC

Check for Samples: bq24075T, bq24079T

1

FEATURES

Current

•

Fully Compliant USB Charger

•

Status Indication – Charging/Done, Power

Good

•

Selectable 100mA and 500mA Maximum Input

Current

Small 3 mm × 3 mm 16 Lead QFN Package

•

100mA Maximum Current Limit Ensures

Compliance to USB-IF Standard

APPLICATIONS

•

Smart Phones

PDAs

MP3 Players

Low-Power Handheld Devices

Input based Dynamic Power Management

(VIN-DPM) for Protection Against Poor USB

Sources

•

28V Input Rating with Overvoltage Protection

Integrated Dynamic Power Path Management

(DPPM) Function Simultaneously and

Independently Powers the System and

Charges the Battery

DESCRIPTION

The bq2407xT series of devices are integrated Li-ion

linear chargers and system power path management

devices

targeted

at

space-limited

portable

•

Supports up to 1.5A Charge Current with

Current Monitoring Output (ISET)

applications. The devices operate from either a USB

port or AC adapter and support charge currents up to

1.5A. The input voltage range with input overvoltage

protection supports unregulated adapters. The USB

input current limit accuracy and start up sequence

allow the bq2407xT to meet USB-IF inrush current

specification. Additionally, the input dynamic power

management (V_IN-DPM) prevents the charger from

crashing incorrectly configure USB sources.

(Description continued on next page)

Programmable Input Current Limit up to 1.5A

for Wall Adapters

Battery Disconnect Function with SYSOFF

Input

Reverse Current, Short-Circuit and Thermal

Protection

•

Flexible Voltage Based NTC Thermistor Input

Proprietary Start Up Sequence Limits Inrush

1 kW

SYSTEM

Adaptor

IN

OUT

10

11

DC

13

1mF

GND

4.7 mF

bq24075T

bq24079T

5

EN2

BAT

8

VSS

2

3

System

SYSOFF

15

4.7 mF

ON /OFF

Control

PACK+

TEMP

1

TS

PACK-

1.18 kW

1.13 kW

13 kW

10 kW

V

IN

1

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

bq24075T

bq24079T

SLUS937 –DECEMBER 2009

www.ti.com

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with

appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more

susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

DESCRIPTION (CONTINUED)

The bq2407xT features dynamic power path management (DPPM) that powers the system while simultaneously

and independently charging the battery. The DPPM circuit reduces the charge current when the input current

limit causes the system output to fall to the DPPM threshold; thus, supplying the system load at all times while

monitoring the charge current separately. This feature reduces the number of charge and discharge cycles on

the battery, allows for proper charge termination and enables the system to run with a defective or absent battery

pack.

Additionally, the regulated system input enables instant system turn-on when plugged in even with a totally

discharged battery. The power-path management architecture also permits the battery to supplement the system

current requirements when the adapter cannot deliver the peak system currents, enabling the use of a smaller

adapter.

The battery is charged in three phases: conditioning, constant current, and constant voltage. In all charge

phases, an internal control loop monitors the IC junction temperature and reduces the charge current if the

internal temperature threshold is exceeded. The charger power stage and charge current sense functions are

fully integrated. The charger function has high accuracy current and voltage regulation loops, charge status

display, and charge termination. The input current limit and charge current are programmable using external

resistors.

ORDERING INFORMATION

OPTIONAL

PART NO.^{(1) (2)}

V_OVP

V_BAT(REG)

V_OUT(REG)

V_DPPM

MARKING

FUNCTION

SYSOFF

bq24075TRGTR

bq24075TRGTT

bq24079TRGTR

bq24079TRGTT

6.6 V

4.2 V

4.1 V

5.5 V

4.3 V

OEC

OED

(1) The RGT package is available in the following options:

R – taped and reeled in quantities of 3,000 devices per reel.

T – taped and reeled in quantities of 250 devices per reel.

(2) This product is RoHS compatible, including a lead concentration that does not exceed 0.1% of total product weight and is suitable for

use in specified lead-free soldering processes. In addition, this product uses package materials that do not contain halogens, including

bromine (BR) or antimony (Sb) above 0.1% of total product weight.

2

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SLUS937 –DECEMBER 2009

ABSOLUTE MAXIMUM RATINGS^{(1) (2)}

over operating free-air temperature range (unless otherwise noted)

VALUE / UNIT

–0.3 to 28 V

–0.3V to 5V

IN (with respect to VSS)

BAT (with respect to VSS)

Input voltage

OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, VREF, ITERM, SYSOFF, TD

(with respect to VSS)

–0.3 TO 7 V

Input current

IN

1.6 A

5A

OUT

Output current

(Continuous)

BAT (Discharge mode)

BAT (Charging mode)

CHG, PGOOD

5A

1.5A

Output sink current

15 mA

Junction temperature, T_J

Storage temperature, T_STG

–40°C to 150°C

–65°C to 150°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating

conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces

charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge

current may not be reached.

DISSIPATION RATINGS

T_A< 25°C

POWER RATING

DERATING FACTOR

ABOVE T_A= 25°C

PACKAGE

R_θJA

R_θJC

QFN-16 RGT

39.47 °C/W

2.4°C/W

2.3 W

225 mW

RECOMMENDED OPERATING CONDITIONS

over operating free-air temperature range (unless otherwise noted)

MIN

4.35

MAX UNITS

IN voltage range

V_IN

26

6.4

V

IN operating voltage range

I_IN

Input current, IN pin

1.5

A

I_OUT

I_BAT

I_CHG

T_J

Current, OUT pin

4.5

A

Current, BAT pin (Discharging)

Current, BAT pin (Charging)

Junction Temperature

4.5

A

1.5⁽¹⁾

125

7.5

A

0

1.07

590

0

°C

kΩ

Ω

R_ILIM

R_ISET

R_ITERM

R_TMR

Maximum input current programming resistor

Fast-charge current programming resistor⁽²⁾

Termination current programming resistor

Timer programming resistor

3000

15

kΩ

18

72

(1) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces

charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge

current may not be reached.

(2) Use a 1% tolerance resistor RISET to avoid issues with the R_ISETshort test when using the maximum charge current setting.

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SLUS937 –DECEMBER 2009

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ELECTRICAL CHARACTERISTICS

Over junction temperature range (0°C < T_J< 125°C) and the recommended supply voltage range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

INPUT

V_UVLO

Under-voltage lock-out

Hysteresis on UVLO

V_IN: 0V → 4V

3.2

3.3

3.4

V

V_HYS-UVLO

V_IN: 4V → 0V

200

300

mV

(Input power detected if V_IN> V_BAT+ V_IN-DT

V_BAT= 3.6V, V_IN: 3.5V → 4V

)

V_IN-DT

Input power detection threshold

Hysteresis on V_IN-DT

55

20

80

140

mV

ms

V_HYS-INDT

t_DGL(PGOOD)

V_BAT= 3.6V, V_IN: 4V → 3.5V

Time measured from V_IN: 0V → 5V,

1μs rise-time to PGOOD = LO

Deglitch time, input power detected status

1.2

V_OVP

Input over-voltage protection threshold

Hysteresis on OVP

VIN: 5V → 7V

VIN: 7V → 5V

6.4

6.6

240

50

6.8

V

V_HYS-OVP

t_BLK(OVP)

mV

μs

Input over-voltage blanking time

Time measured from V_IN: 11V → 5V 1μs

fall-time to PGOOD = LO

t_REC(OVP)

Input over-voltage recovery time

1.2

ms

ILIM, ISET SHORT CIRCUIT TEST

I_SC

Current source

1.3

mA

mV

V_SC

520

QUIESCENT CURRENT

CE = LO or HI, input power not detected, no

load on OUT pin

I_BAT(PDWN)

I_IN(STDBY)

I_CC

Sleep current into BAT pin

6.5

μA

EN1= HI, EN2=HI, V_IN≤ 6V

50

Standby current into IN pin

Active supply current, IN pin

EN1= HI, EN2=HI, V_IN> 6V

200

CE = LO, V_IN= 6V, no load on OUT pin,

V_BAT> V_BAT(REG), (EN1,EN2)≠(HI,HI)

1.5

mA

POWER PATH

V_DO(IN-OUT)

V_IN– V_OUT

V_IN= 4.3V, I_IN= 1A, V_BAT= 4.2V

I_OUT= 1A, V_IN= 0V, V_BAT> 3V

V_IN> V_OUT+ V_DO(IN-OUT)

EN1 = LO, EN2 = LO

300

50

475

100

5.6

mV

V

V_DO(BAT-OUT)V_BAT– V_OUT

V_O(REG)

OUT pin voltage regulation

5.4

90

5.5

95

100

500

mA

A

I_IN-MAX

Maximum input current

EN1 = HI, EN2 = LO

450

475

EN2 = HI, EN1 = LO

K_ILIM/R_{IL IM}

1600

1512

ILIM ≥ 500mA

1500

1330

200

1700

1500

K_ILIM

Maximum input current factor

AΩ

200mA < ILIM < 500mA

EN2 = HI, EN1 = LO, R_ILIM= 8kΩ to 1.1kΩ

I_IN-MAX

Programmable input current limit range

mA

V

Input voltage threshold when input current is

reduced

V_IN-LOW

EN2 = LO, EN1 = X

4.35

4.2

4.5

4.3

4.63

4.4

Output voltage threshold when charging current

is reduced

V_DPM

V

VOUT falling, Supplement mode entered

when V_OUT< V_BSUP1

V_BAT

–

V_BSUP1

V_BSUP2

V_O(SC1)

Enter battery supplement mode

Exit battery supplement mode

40mV

VOUT rising, Supplement mode exited

when V_OUT> V_BSUP2

V_BAT–

20mV

Output short-circuit detection threshold,

power-on

0.8

0.9

1.0

Output short-circuit detection threshold,

supplement mode V_BAT– V_OUT> V_O(SC2)

indicates short-circuit

V_O(SC2)

200

250

300

mV

t_DGL(SC2)

t_REC(SC2)

Deglitch time, supplement mode short circuit

Recovery time, supplement mode short circuit

250

60

μs

ms

BATTERY CHARGER

I_BAT(SC)

Source current for BAT pin short-circuit detection

4

1.6

7.5

1.8

11

2.0

mA

V

V_BAT(SC)

BAT pin short-circuit detection threshold

bq24075T

bq24079T

4.16

4.059

2.9

4.20

4.100

3

4.24

4.141

3.1

V_BAT(REG)

V_LOWV

Battery charge voltage

V

Pre-charge to fast-charge transition threshold

4

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SLUS937 –DECEMBER 2009

ELECTRICAL CHARACTERISTICS (continued)

Over junction temperature range (0°C < T_J< 125°C) and the recommended supply voltage range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX UNIT

Deglitch time on pre-charge to fast-charge

transition

t_DGL1(LOWV)

t_DGL2(LOWV)

I_CHG

25

ms

Deglitch time on fast-charge to pre-charge

transition

25

ms

V_BAT(REG)> V_BAT> V_LOWV, V_IN= 5V, CE =

LO, EN1= LO, EN2 = HI

Battery fast charge current range

300

797

1500

975

mA

A

CE = LO, EN1= LO, EN2 = HI, V_BAT

V_LOWV

>

,

I_CHG

Battery fast charge current

K_ISET/R_ISET

V_IN= 5V, I_IN-MAX> I_CHG, no load on OUT pin,

thermal loop not active, DPM loop not active

K_ISET

Fast charge current factor

Pre-charge current

890

K_PRECHG/R_ISET

AΩ

I_PRECHG

k_PRECHG

A

Pre-charge current factor

70

88

106

CE = LO, (EN1,EN2)≠(LO,LO),

V_BAT> V_RCH, t < t_MAXCH, V_IN= 5V, DPM loop

not active, thermal loop not active

0.09×I_CHG0.1×I_CHG

0.11×I_CHG

Charge current value for termination detection

threshold

I_TERM

CE = LO, (EN1,EN2)=(LO,LO),

V_BAT> V_RCH, t < t_MAXCH, V_IN= 5V, DPM loop

not active, thermal loop not active

.033×I_CH

0.027×I_CHG

0.040×I_CHG

G

t_DGL(TERM)

V_RCH

t_DGL(RCH)

t_DGL(NO-IN)

Deglitch time, termination detected

25

ms

V

V_O(REG)

–140mV –100mV

V_O(REG)

–60mV

Recharge detection threshold

Deglitch time, recharge threshold detected

Delay time, input power loss to charger turn-off

62.5

ms

VBAT = 3.6V. Time measured from V_IN

5V → 3.3V 1μs fall-time

:

20

I_BAT(DET)

t_DET

Sink current for battery detection

Battery detection timer

5

7.5

10

mA

ms

250

BATTERY CHARGING TIMERS

t_PRECHG

t_MAXCH

t_PRECHG

t_MAXCH

K_TMR

Pre-charge safety timer value

TMR = floating

1440

1800

18000

2160

s

Charge safety timer value

TMR = floating

14400

21600

s

Pre-charge safety timer value(externally set)

Charge safety timer value (externally set)

Timer factor

18kΩ < RTMR < 72kΩ

18kΩ < RTMR < 72kΩ

R_TMRx K_TMR

s

10 x R_TMRx K_TMR

35

45

55 s / kΩ

BATTERY – PACK NTC MONITOR

% of

V_IN

V_HOT

High temperature trip point

Hysteresis on high trip point

Low temperature trip point

Battery charging

12

12.5

1

13

% of

V_IN

V_HYS(HOT)

V_COLD

V_HYS(COLD)

t_DGL(TS)

% of

V_IN

24.5

25

25.5

% of

V_IN

Hysteresis on low trip point

Battery charging

1

Deglitch time, pack temperature fault detection

50

ms

THERMAL REGULATION

T_J(REG)

Temperature Regulation Limit

125

155

20

°C

T_J(OFF)

Thermal shutdown temperature

Thermal shutdown hysteresis

T_J(OFF-HYS)

LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD

V_IL

V_IH

I_IL

Logic LOW input voltage

Logic HIGH input voltage

0

0.4

6.0

1

V

1.4

μA

I_IH

10

LOGIC LEVELS ON PGOOD, CHG

V_OLOutput LOW voltage

I_SINK= 5 mA

0.4

V

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SLUS937 –DECEMBER 2009

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DEVICE INFORMATION

PIN DIAGRAM

Pin out designations are not final. Subject to change.

TS

1

2

3

12

11

ILIM

OUT

BAT

bq24075T

bq24079T

10 OUT

CHG

4

9

CE

TERMINAL FUNCTIONS

NAME

TS

NO.

I/O

DESCRIPTION

1

I/O

External NTC Thermistor Input. Connect the TS input to the center tap of a resistor divider from V_INto GND

with the NTC in parallel with the bottom resistor to monitor the NTC in the battery pack. For applications

that do not utilize the TS function, set the resistor divider to be a 20% ratio. See the Battery Pack

Temperature Monitoring section for details on calculating the resistor values.

BAT

CE

2,3

4

I/O

I

Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the

battery. Bypass BAT to VSS with a 4.7μF to 47μF ceramic capacitor.

Charge Enable Active-Low Input. Connect CE to a high logic level to place the battery charger in standby

mode. In standby mode, OUT is active and battery supplement mode is available. Connect /CE to a low

logic level to enable the battery charger. CE is internally pulled down with ~285kΩ. Do not leave CE

unconnected to ensure proper operation.

EN2

EN1

5

6

I

Input Current Limit Configuration Inputs. Use EN1 and En2 to control the maximum input current and

enable USB compliance. See Table 1 for the description of the operation states. EN1 and EN2 are

internally pulled down with ~285kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.

PGOOD

7

O

Open-Drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is

detected. PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD

to the desired logic voltage rail using a 1kΩ to 100kΩ resistor, or use with an LED for visual indication.

VSS

8

9

–

Ground. Connect to the thermal pad and to the ground rail of the circuit.

CHG

O

Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is

high-impedance when charging is complete or when the charger is disabled. CHG flashes to indicate a

timer fault. Connect CHG to the desired logic voltage rail using a 1kΩ to 100kΩ resistor, or use with an

LED for visual indication.

OUT

10,11

O

System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and

above the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT

except when SYSOFF is high. Connect OUT to the system load. Bypass OUT to VSS with a 4.7μF to 47μF

ceramic capacitor.

ILIM

IN

12

13

14

O

I

Adjustable Current Limit Programming Input. Connect a 1.07kΩ to 7.5kΩ resistor from ILIM to VSS to

program the maximum input current (EN2=1, EN1=0). The input current includes the system load and the

battery charge current. Leaving ILIM unconnected disables all charging.

Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input

operating range is 4.35V to 6.6V. The input accepts voltages up to 26V without damage, but operation is

suspended. Bypass IN to VS with a 1μF to 10μF ceramic capacitor.

TMR

O

Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to

VSS to disable all safety timers. Connect a 18kΩ to 72kΩ resistor between TMR and VSS to program the

timers to a desired length. Leave TMR unconnected to set the timers to the default values.

6

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SLUS937 –DECEMBER 2009

TERMINAL FUNCTIONS (continued)

NAME

NO.

I/O

DESCRIPTION

SYSOFF

15

I

System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system

output. When an adapter is connected, charge is also disabled. Connect SYSOFF low for normal

operation. SYSOFF is internally pulled up to VBAT through a large resistor (~5MΩ). Do not leave SYSOFF

unconnected to ensure proper operation.

ISET

16

--

I/O

–

Fast Charge Current Programming Input. Connect a 590 Ω to 3 kΩ resistor from ISET to VSS to program

the fast charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage

ISET reflects the actual charging current and can be used to monitor charge current. See the Charge

Current Translator section of this datasheet for more details.

Thermal

Pad

There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device.

The thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do

not use the thermal pad as the primary ground input for the device. VSS must be connected to ground at

all times.

Table 1. EN1/EN2 Settings

EN2

EN1

MAXIMUM INPUT CURRENT INTO IN

100 mA. USB100 mode

0

1

0

1

0

1

500 mA. USB500 mode

Set by external resistor from ILIM to VSS

Standby (USB suspend mode)

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SLUS937 –DECEMBER 2009

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SIMPLIFIED BLOCK DIAGRAM

250mV

V_BAT

V_O(SC1)

OUT-SC1

OUT- SC2

t_DGL(SC2)

Q1

IN

OUT

ISET

EN2

Short Detect

225mV

Precharge

V_IN-LOW

2.25V

Fastcharge

USB100

USB500

T

J

ILIM

V_{REF- ILIM}

T_J(REG)

V_DPPM

USB-susp

Short Detect

V_O(REG)

Q2

V_OUT

EN2

EN1

V_BAT(REG)

BAT

V_BAT

V_OUT

CHARGEPUMP

SYSOFF

40mV

Supplement

V_LOWV

225mV)

V_RCH

V _BAT(SC)

V_IN

V

IN

BAT-SC

V_BAT+ V_IN-DT

t_DGL(NO-IN)

V_COLD

TS

t_DGL(TS)

t_DGL(PGOOD)

Charge Control

V_UVLO

V_OVP

V_HOT

t_BLK(OVP)

EN1

EN2

USB Suspend

CE

Halt timers

CHG

Reset timers

V _IPRECHG

PGOOD

V

ICHG

Dynamically

Controlled

Oscillator

V_ISET

Fast- Charge

Timer

Timer fault

TMR

Pre- Charge

Timer

8

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SLUS937 –DECEMBER 2009

TYPICAL CHARACTERISTICS

V_IN= 6V, EN1 = 1, EN2 = 0, T_A= 25°C, unless otherwise noted.

ADAPTER PLUG-IN

BATTERY CONNECTED

BATTERY DETECTION

BATTERY INSERTED

BATTERY DETECTION

BATTERY REMOVED

R_LOAD= 10Ω

V_IN

5 V/div

V_CHG

5 V/div

1 A/div

5 V/div

1 A/div

Charging Initiated

500 mV/div

5 V/div

V_BAT

3.6 V

I_BAT

V_PGOOD

2 V/div

500 mA/div

2 V/div

I_BAT

Battery

Removed

V_BAT

Battery Inserted

4 ms/div

Battery Detection Mode

400 ms/div

Figure 1.

Figure 2.

Figure 3.

ENTERING AND EXITING

DPPM MODE

I_LOAD= 25 mA TO 250 mA,

I_CHARGE= 300 mA

ENTERING AND EXITING BATTERY

SUPPLEMENT MODE

I_LOAD= 25mA TO 750mA

bq2407x

CHARGER ON/OFF USING CE

200 mA/div

V_CE

500 mA/div

5 V/div

I

OUT

I

OUT

V_CHG

5 V/div

1 V/div

Supplement Mode

I

500 mV/div

200 mA/div

BAT

500 mA/div

500 mV/div

V

OUT

5.5 V

V_BAT

3.6 V

I

OUT

5.5 V

Mandatory Precharge

I

500 mA/div

BAT

I_BAT

V

BAT

4.1 V

2 ms/div

10 ms/div

2 ms/div

Figure 4.

Figure 5.

Figure 6.

SYSTEM ON/OFF WITH INPUT

CONNECTED

SYSTEM ON/OFF WITH INPUT

NOT CONNECTED

V_IN= 0V

OVP FAULT

V_IN= 5.5V TO 8.5V

V_IN= 6V

V_SYSOFF

V

5 V/div

IN

V_SYSOFF

2 V/div

V_BAT

4 V

V

V_OUT

5.5 V

OUT

4.3 V

200 mV/div

2 V/div

V

BAT

V_BAT

4 V

2 V/div

4.2 V

V_OUT

Battery Powering

System

500 mA/div

System Power Off

I

BAT

500 mA/div

I_BAT

500 mA/div

4 ms/div

400 ms/div

40 ms/div

Figure 7.

Figure 8.

Figure 9.

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TYPICAL CHARACTERISTICS (continued)

V_IN= 6V, EN1 = 1, EN2 = 0, T_A= 25°C, unless otherwise noted.

DROPOUT VOLTAGE

vs

DROPOUT VOLTAGE

vs

TEMPERATURE

NO INPUT SUPPLY

THERMAL REGULATION

TEMPERATURE

600

500

400

0.7

0.6

120

100

80

I_L= 1 A

0.5

0.4

0.3

VBAT = 3 V

300

200

60

40

VBAT = 3.9 V

0.2

0.1

0

100

0

20

0

120

125

130

135

140

145

125

0

25

100

125

0

50

75

100

50

75

25

Temperature - ^o

C

T_J- Junction Temperature - °C

Figure 10.

Figure 11.

Figure 12.

BAT REGULATION VOLTAGE

BATTERY REGULATION VOLTAGE

OUTPUT REGULATION VOLTAGE

vs

TEMPERATURE

bq24075T

TEMPERATURE

bq24079T

TEMPERATURE

4.11

4.105

4.1

5.75

4.210

V_IN= 6 V,

5.70

I_L= 1 A

4.205

4.200

4.195

5.65

5.60

5.55

5.50

4.095

4.09

5.45

5.40

4.190

4.185

4.180

5.35

4.085

4.08

5.30

5.25

0

5

10

15

20

25

30

0

25

50

75

100

125

30

25

10

15

20

0

5

T

- Junction Temperature - °C

J

T_J- Junction Temperature - °C

Figure 13.

Figure 14.

Figure 15.

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TYPICAL CHARACTERISTICS (continued)

V_IN= 6V, EN1 = 1, EN2 = 0, T_A= 25°C, unless otherwise noted.

OVERVOLTAGE PROTECTION

THRESHOLD

vs

INPUT CURRENT LIMIT

FASTCHARGE CURRENT

vs

TEMPERATURE

INPUT VOLTAGE

BATTERY VOLTAGE

6.70

6.65

6.60

6.55

800

700

600

500

1.05

1.03

RILIM

R_ISET= 900 W

6.6 V

V_IRising

USB500

1.01

0.99

400

300

V_IFalling

200

0.97

0.95

6.50

6.45

USB100

100

0

3.6

5

6

7

8

9

10

3

3.8

3.4

4

4.2

0

25

50

75

100

125

3.2

V_I- Input Voltage - V

V_BAT- Battery Voltage - V

T_J- Junction Temperature - °C

Figure 16.

Figure 17.

Figure 18.

FASTCHARGE CURRENT

vs

FASTCHARGE CURRENT

vs

PRECHARGE CURRENT

vs

BATTERY VOLTAGE

31.5

310

305

300

295

290

105

104

R_ISET= 900 W

R_ISET= 3 kW

31

103

102

101

100

99

30.5

30

29.5

29

98

97

285

280

96

95

28.5

2

2.2

2.4

2.6

2.8

3

3.2

3.4

3.6

3.8

4

4.2

2

2.2

2.4

2.6

2.8

3

V_BAT- Battery Voltage - V

Figure 19.

Figure 20.

Figure 21.

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APPLICATION CIRCUITS

R4

1.5 kW

R5

1.5 kW

SYSTEM

Adaptor

DC+

IN

OUT

C1

1µF

GND

C2

4.7µF

VSS

HOST

bq24075T

bq24079T

EN2

EN1

R8

100 kW

TS

SYSOFF

CE

BAT

R6

C3

4.7 µF

10 kW

PACK

+

TEMP

R7

13.2 kW

PACK-

R1

46.8 kW

R2 R3

1.18 kW 1.13 kW

NOTE: V_IN= UVLO to V_OVP, I_FASTCHG= 800mA, I_IN(MAX)= 1.35A, Battery Temperature Charge Range = 0°C to 50°C, 6.25

hour Fastcharge Safety Timer

Figure 22. Using the bq24075T/bq24079T to Disconnect the Battery from the System

DETAILED FUNCTIONAL DESCRIPTION

The bq2407x devices are integrated Li-Ion linear chargers and system power path management devices targeted

at space-limited portable applications. The device powers the system while simultaneously and independently

charging the battery. This feature reduces the number of charge and discharge cycles on the battery, allows for

proper charge termination and enables the system to run with a defective or absent battery pack. It also allows

instant system turn-on even with a totally discharged battery. The input power source for charging the battery

and running the system can be an AC adapter or a USB port. The devices feature Dynamic Power Path

Management (DPPM), which shares the source current between the system and battery charging, and

automatically reduces the charging current if the system load increases. When charging from a USB port, the

input dynamic power management (V_IN-DPM) circuit reduces the input current if the input voltage falls below a

threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to

supplement the system current requirements when the adapter cannot deliver the peak system currents.

UNDERVOLTAGE LOCKOUT (UVLO)

The bq2407X family remains in power down mode when the input voltage at the IN pin is below the undervoltage

threshold (UVLO). During the power down mode the host commands at the control inputs (CE, EN1 and EN2)

are ignored. The Q1 FET connected between IN and OUT pins is off, and the status outputs, CHG and PGOOD,

are high impedance. The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power

down mode, the VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.

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POWER ON

When VIN exceeds the UVLO threshold, the bq2407xT powers up. While V_INis below V_BAT+ V_IN(DT), the host

commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and OUT

pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT to

OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the V_OUT(SC2)circuitry is active and monitors for

overload conditions on OUT.

Once V_INrises above V_BAT+ V_IN(DT), PGOOD is driven low to indicate the valid power status and the CE, EN1,

and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage

condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If

SYSOFF is high, FET Q2 is off). During this mode, the V_OUT(SC2)circuitry is active and monitors for overload

conditions on OUT.

When the input voltage at IN is within the valid range: V_IN> UVLO AND V_IN> V_BAT+ V_IN(DT)AND V_IN< V_OVP, and

the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)] all internal

timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins.

If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a

short circuit at OUT. When V_OUTis above V_SC, the FET Q1 switches to the current limit threshold set by EN1,

EN2 and R_ILIMand the device enters into the normal operation. During normal operation, the system is powered

by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as

well as the input voltage conditions.

/PGOOD= Hi-Z

/CHG = Hi-Z

BATTFET ON

V_UVLO<V_IN<V_OVP

and

No

V

_IN>V_BAT+V

IN (DT)

Yes

/PGOOD= Low

Yes

EN1=EN2=1

No

ILIM or ISET short?

No

Begin Startup

IIN (MAX ) 100mA

Yes

V_OUTshort?

No

Input Current

Limit set by EN1

and EN2

No

/CE = Low

Yes

Begin Charging

Figure 23. Startup Flow Diagram

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OVERVOLTAGE PROTECTION (OVP)

The bq2407xT accepts inputs up to 28V without damage. Additionally, an overvoltage protection (OVP) circuit is

implemented that shuts off the internal LDO and discontinues charging when V_IN> V_OVPfor a period longer than

t_DGL(OVP). When in OVP, the system output (OUT) is connected to the battery and PGOOD is high impedance.

Once the OVP condition is removed, a new power on sequence starts (See the POWER ON section). The safety

timers are reset and a new charge cycle will be indicated by the CHG output.

DYNAMIC POWER-PATH MANAGEMENT

The bq2407xT features an OUT output that powers the external load connected to the battery. This output is

active whenever a source is connected to IN or BAT. The following sections discuss the behavior of OUT with a

source connected to IN to charge the battery and a battery source only.

INPUT SOURCE CONNECTED (ADAPTER or USB)

With a source connected, the dynamic power-path management (DPPM) circuitry of the bq2407xT monitors the

input current continuously. The OUT output for the bq24075T/ 79T is regulated to a fixed voltage (V_O(REG)). The

current into IN is shared between charging the battery and powering the system load at OUT. The bq2407xT has

internal selectable current limits of 100mA (USB100) and 500mA (USB500) for charging from USB ports, as well

as a resistor-programmable input current limit.

The bq2407xT is USB IF compliant for the inrush current testing. The USB spec allows up to 10μF to be hard

started, which establishes 50μC as the maximum inrush charge value when exceeding 100mA. The input current

limit for the bq2407xT prevents the input current from exceeding this limit, even with system capacitances greater

than 10μF. Note that the input capacitance to the device must be selected small enough to prevent a violation

(<10μF), as this current is not limited. Figure 24 demonstrates the startup of the bq2407xT and compares it to

the USB-IF specification.

Figure 24. USB-IF Inrush Current Test

The input current limit selection is controlled by the state of the EN1 and EN2 pins as shown in Table 1. When

using the resistor-programmable current limit, the input current limit is set by the value of the resistor connected

from the ILIM pin to VSS, and is given by the equation:

II_N-MAX= K_ILIM/ R_ILIM

The input current limit is adjustable up to 1.5A. The valid resistor range is 1.07 kΩ to 7.5kΩ.

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When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement

modes are used to maintain the system load. Figure 26 illustrates an example of the DPPM and supplement

modes. These modes are explained in detail in the following sections.

Input DPM Mode (V_IN-DPM)

The bq2407xT utilizes the V_IN-DPM mode for operation from current-limited USB ports. When EN1 and EN2 are

configured for USB100 (EN2=0, EN1=0) or USB500 (EN2=0, EN2=1) modes, the input voltage is monitored. If

V_INfalls to V_IN-DPM, the input current limit is reduced to prevent the input voltage from falling further. This prevents

the bq2407xT from crashing poorly designed or incorrectly configured USB sources. Figure 25 shows the

V_IN-DPM behavior to a current limited source. In this figure, the input source has a 400mA current limit and the

device is in USB500 mode (EN1=1, EN2=0).

Figure 25. VIN-DPM Mode

DPPM Mode

When the sum of the charging and system load currents exceeds the maximum input current (programmed with

EN1, EN2 and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin falls to V_DPPM, the

bq2407xT enters DPPM mode. In this mode, the charging current is reduced as the OUT current increases in

order to maintain the system output. Battery termination is disabled while in DPPM mode.

Battery Supplement Mode

While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the

programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the

V_BSUP1threshold, the battery supplements the system load. The battery stops supplementing the system load

when the voltage at OUT rises above the V_BSUP2threshold.

During supplement mode, the battery supplement current is not regulated (BAT-FET is fully on), however there is

a short circuit protection circuit built in. demonstrate supplement mode. If during battery supplement mode, the

voltage at OUT drops V_O(SC2)below the BAT voltage, the OUT output is turned off if the overload exists after

t_DGL(SC2). The short circuit recovery timer then starts counting. After t_REC(SC2), OUT turns on and attempts to

restart. If the short circuit remains, OUT is turned off and the counter restarts. Battery termination is disabled

while in supplement mode.

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5.5 V

Figure 26. DPPM and Battery Supplement Modes

(V_OREG= 5.5V, V_BAT= 3.6V)

INPUT SOURCE NOT CONNECTED

When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode the

current into OUT is not regulated, similar to Battery Supplement Mode, however the short circuit circuitry is

active. If the OUT voltage falls below the BAT voltage by 250mV for longer than t_DGL(SC2), OUT is turned off. The

short circuit recovery timer then starts counting. After t_REC(SC2), OUT turns on and attempts to restart. If the short

circuit remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload

condition is removed.

BATTERY CHARGING

Set CE low to initiate battery charging. First, the device checks for a short-circuit on the BAT pin by sourcing

I_BAT(SC)to the battery and monitoring the voltage. When the BAT voltage exceeds V_BAT(SC), the battery charging

continues. The battery is charged in three phases: conditioning pre-charge, constant current fast charge (current

regulation) and a constant voltage tapering (voltage regulation). In all charge phases, an internal control loop

monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is

exceeded.

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Figure 27. Typical Charging Cycle

Figure 27 illustrates a normal Li-Ion charge cycle using the bq2407xT. In the pre-charge phase, the battery is

charged at with the pre-charge current (I_PRECHG). Once the battery voltage crosses the V_LOWVthreshold, the

battery is charged with the fast-charge current (I_CHG). As the battery voltage reaches V_BAT(REG), the battery is held

at a constant voltage of V_BAT(REG)and the charge current tapers off as the battery approaches full charge. When

the battery current reaches I_TERM, the CHG pin indicates charging done by going high-impedance.

Note that termination detection is disabled whenever the charge rate is reduced because of the actions of the

thermal loop, the DPPM loop or the V_IN-DPMloop.

The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by

the equation

I_CHG= K_ISET/ R_ISET

The charge current limit is adjustable up to 1.5A. The valid resistor range is 590Ω to 3 kΩ. Note that if I_CHGis

programmed as greater than the input current limit, the battery will not charge at the rate of I_CHG, but at the

slower rate of I_IN(MAX)(minus the load current on the OUT pin, if any). In this case, the charger timers will be

proportionately slowed down.

CHARGE CURRENT TRANSLATOR

When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET

input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external

charge current programming resistor, R_ISET, generates an analog voltage that can be monitored by an external

host to calculate the current sourced from BAT.

V_ISET= I_CHARGE/ 400 × R_ISET

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Begin Charging

Yes

Battery short detecte?d

No

Start Precharge

/CHG= Low

No

t_PRECHARGE

Elapsed?

No

V_BAT> V

LOWV

Yes

End Charge

Flash/CHG

Start Fastcharge

I_CHARGEset by ISET

No

t_FASTCHARGE

Elapsed?

I_BAT<I_TERM

Yes

End Charge

Flash/CHG

Charge Done

/CHG=Hi-Z

TD=Low

(’72, ’73 Only)

(’74, ’75= YES)

No

Yes

Termination Reached

BATTFET Off

Wait for V_BAT< V_RCH

No

V_BAT<V_RCH

Yes

Run Battery Detection

No

Battery Detecte?d

Yes

Figure 28. Battery Charging Flow Diagram

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BATTERY DETECTION AND RECHARGE

The bq2407xT automatically detects if a battery is connected or removed. Once a charge cycle is complete, the

battery voltage is monitored. When the battery voltage falls below V_RCH, the battery detection routine is run.

During battery detection, current (I_BAT(DET)) is pulled from the battery for a duration t_DETto see if the voltage on

BAT falls below V_LOWV. If not, charging begins. If it does, then it indicates that the battery is missing or the

protector is open. Next, the precharge current is applied for t_DETto close the protector if possible. If V_BAT< V_RCH

,

then the protector is closed and charging is initiated. If V_BAT> V_RCH, then the battery is determined to be missing

and the detection routine continues.

BATTERY DISCONNECT (SYSOFF Input)

The bq24075T and bq24079T feature a SYSOFF input that allows the user to turn the FET Q2 off and

disconnect the battery from the OUT pin. This is useful for disconnecting the system load from the battery,

factory programming where the battery is not installed or for host side impedance track fuel gauging, such as

bq27500, where the battery open circuit voltage level must be detected before the battery charges or discharges.

The CHG output remains low when SYSOFF is high. Connect SYSOFF to VSS, to turn Q2 on for normal

operation. SYSOFF is internally pulled to VBAT through ~5 MΩ resistor.

DYNAMIC CHARGE TIMERS (TMR Input)

The bq2407xT devices contain internal safety timers for the pre-charge and fast-charge phases to prevent

potential damage to the battery and the system. The timers begin at the start of the respective charge cycles.

The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated

using the following equation:

t_PRECHG= K_TMR× R_TMR

t_MAXCHG= 10 × K_TMR× R_TMR

Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.

Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally

to the charge current when the device enters thermal regulation.

1. During the fast charge phase, several events increase the timer durations.

2. The system load current activates the DPPM loop which reduces the available charging current

3. The input current is reduced because the input voltage has fallen to V_IN-DPM

4. The device has entered thermal regulation because the IC junction temperature has exceeded T_J(REG)

During each of these events, the internal timers are slowed down proportionately to the reduction in charging

current. For example, if the charging current is reduced by half for two minutes, the timer clock is reduced to half

the frequency and the counter counts half as fast resulting in only one minute of "counting" time.

If the precharge timer expires before the battery voltage reaches V_LOWV, the bq2407xT indicates a fault condition.

Additionally, if the battery current does not fall to I_TERMbefore the fast charge timer expires, a fault is indicated.

The CHG output flashes at approximately 2 Hz to indicate a fault condition. The fault condition is cleared by

toggling CE or the input power, entering/ exiting USB suspend mode, or an OVP event.

STATUS INDICATORS (PGOOD, CHG)

The bq2407xT contains two open-drain outputs that signal its status. The PGOOD output signals when a valid

input source is connected. PGOOD is low when (V_BAT+ V_IN(DT)) < V_IN< V_OVP. When the input voltage is outside

of this range, PGOOD is high impedance.

The charge cycle after power-up, CE going low, or exiting OVP is indicated with the CHG output on (low - LED

on), whereas all refresh (subsequent) charges will result in the CHG output off (open – LED off). In addition, the

CHG signals timer faults by flashing at approximately 2Hz.

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Table 2. PGOOD Status Indicator

INPUT STATE

PGOOD OUTPUT

Hi impedance

Low

V_IN< V_UVLO

V_UVLO< V_IN< V_IN(DT)

V_IN(DT)< V_IN< V_OVF

V_IN< V_OVP

Hi impedance

Table 3. CHG Status Indicator

CHARGE STATE

CHG OUTPUT

Low (for first charge cycle)

Flashing at 2 Hz

Charging

Charging suspended by thermal loop, or DPPM loop

Safety timers expired

Charging done

Recharging after termination

IC disabled or no valid input power

Battery absent

Hi impedance

THERMAL REGULATION AND THERMAL SHUTDOWN

The bq2407xT contain a thermal regulation loop that monitors the die temperature. If the temperature exceeds

T_J(REG), the device automatically reduces the charging current to prevent the die temperature from increasing

further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,

particularly under high V_INand heavy OUT system load conditions. Under these conditions, if the die temperature

increases to T_J(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the battery still powers

the load on OUT. Once the device die temperature cools by T_J(OFF-HYS), the input FET Q1 is turned on and the

device returns to thermal regulation. Continuous overtemperature conditions result in a "hiccup" mode. During

thermal regulation, the safety timers are slowed down proportionately to the reduction in current limit.

Note that this feature monitors the die temperature of the bq2407xT. This is not synonymous with ambient

temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery

charging algorithm and the LDO associated with OUT. A modified charge cycle with the thermal loop active is

shown in Figure 29. Battery termination is disabled during thermal regulation.

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PRECHARGE

THERMAL

CC FAST

CHARGE

CV TAPER

DONE

REGULATION

V

I

O(REG)

O(CHG)

Battery Voltage

Battery Current

V

(LOWV)

HI-z

I

(PRECHG)

I

(TERM)

T

J(REG)

IC Junction Temperature, T

J

Figure 29. Charge Cycle Modified by Thermal Loop

BATTERY PACK TEMPERATURE MONITORING

The bq2407xT features an external battery pack temperature monitoring input. The TS input connects to the NTC

thermistor in the battery pack to monitor battery temperature and prevent dangerous over-temperature

conditions. During charging, the voltage at TS is continuously monitored. If, at any time, the voltage at TS is

outside of the operating range (V_COLDto V_HOT), charging is suspended. The timers maintain their values but

suspend counting. When the voltage measured at TS returns to within the operation window, charging is

resumed and the timers continue counting. When charging is suspended due to a battery pack temperature fault,

the CHG output remains low and continues to indicate charging.

V

IN

-1

V

COLD

R6 =

1

+

R7 RCOLD

(1)

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é

ê

ë

ù

ú

û

1

V

´RCOLD ´RHOT ´

-

IN

V

HOT

COLD

R7 =

é

ê

ë

ù

é

ù

V

IN

RHOT ´

-1 - RCOLD ´

-1

ú

ê

V

COLD

HOT

û

ë

û

(2)

Where:

V_COLD= 0.25 X V_IN

V_HOT= 0.125 X V_IN

RHOT is the expected thermistor resistance at the programmed hot threshold, RCOLD is the expected thermistor

resistance at the programmed cold threshold. If the value of R6 is less than 100kΩ, R3 must be added to protect

the IC from 28V inputs. If R6 is greater than 100kΩ, R8 does not need to be used.

Adapter

IN

R61

V_COLD

R8

PACK+

TS

TEMP

+

Not necessary

in all

applications

PACK-

V_HOT

R7

+

bq240xT

Figure 30. NTC Monitoring Function

For applications that do not require the TS monitoring function, set R6 = 200kΩ and R7 = 49.9kΩ to set the TS

voltage at a valid level and maintain charging.

APPLICATION INFORMATION

bq2407xT CHARGER DESIGN EXAMPLE

Refer to Typical Application Circuits for Schematics of the Design Example.

Supply voltage = 5V

Fast charge current of approximately 800 mA; ISET – pin 16

Input Current Limit =1.35A; ILIM – pin 12

Safety timer duration, Fast-Charge = 6.25 hours; TMR – pin 14

Battery Temperature Sense = 10kΩ; NTC (103AT-2), 0°C to 50°C Operation

Program the Fast Charge Current (ISET):

22

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R_ISET= K_ISET/ I_CHG

K_ISET= 890 AΩ; from the electrical characteristics table

R_ISET= 890AΩ / 0.8A = 1.1125 kΩ

Select the closest standard value, which for this case is 1.13kΩ. Connect this resistor between ISET (pin 16)

and V_SS

.

Program the Input Current Limit (ILIM)

R_ILIM= K_ILIM/ I_IN(MAX)

K_ILIM= 1600 AΩ; from the electrical characteristics table.

R_ISET= 1600AΩ / 1.35A = 1.19 kΩ

Select the closest standard value, which for this case is 1.18 kΩ. Connect this resistor between ILIM (pin 12)

and V_SS

Program 6.25-hour Fast-Charge Safety Timer (TMR)

R_TMR= t_MAXCHG/ (10 × K_TMR

.

)

K_TMR= 45 s/kΩ from the electrical characteristics table.

R_TMR= (6.25 hr × 3600 s/hr) / (10 x 45 s/kΩ) = 46.8kΩ;

Select the closest standard value, which for this case is 46.4 kΩ. Connect this resistor between TMR (pin 2)

and V_SS

.

TS Function

Using a 10kΩ NTC thermistor in the battery pack (103AT-2). Connect a resistor divider from V_INto V_SSwith the

thermistor and TS connected to the center tap (R6 and R7 in typical application circuits).

R_HOT= 4.086kΩ; 50°C threshold from NTC data sheet

R_COLD= 28.16 kΩ; 0°C threshold from NTC data sheet

V_COLD= 0.25 X V_IN= 0.25 X 5V = 1.25V

V_HOT= 0.125 X V_IN= 0.125 X 5V = 0.625V

é

ê

ë

ù

ú

û

1

é

ù

V

´RCOLD ´RHOT ´

-

5´ 28160´ 4086´

-

1.25 0.625

IN

ê

ú

V

HOT

COLD

ë

û

R7 =

=

= 8.236kW

5

é

ê

ë

ù

é

ù

é

ù

é

ù

V

IN

4086´

-1 - 28160´

-1

RHOT ´

-1 - RCOLD ´

-1

ú

ê

ú

ê

ú

0.625

1.25

V

ë

û

ë

û

HOT

COLD

û

ë

û

(3)

(4)

V

IN

5

-1

V

COLD

1.25

R6 =

=

= 19.14kW

1

+

R7 RCOLD

+

8250 28160

Since the calculated values for R6 is less than 100kΩ, a 100kΩ resistor for R8 must be used. Choose the closest

standard values, which for this case are R6=8.25kΩ and R7 = 19.1kΩ.

For applications that do not require the TS monitoring function, set R6 = 200kΩ and R7 = 49.9kΩ to set the TS

voltage at a valid level and maintain charging.

CHG and PGOOD LED Status: connect a 1.5kΩ resistor in series with a LED between OUT and CHG to

indicate charging status. Connect a 1.5kΩ resistor in series with a LED between OUT and PGOOD to indicate

when a valid input source is connected.

Processor Monitoring Status: connect a pullup resistor (on the order of 100 kΩ) between the processor power

rail and CHG and PGOOD

System ON/OFF (SYSOFF): Connect SYSOFF high to disconnect the battery from the system load. Connect

SYSOFF low for normal operation.

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SELECTING IN, OUT AND BAT CAPACITORS

In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,

input, output and battery pins. Using the values shown on the application diagram, is recommended. After

evaluation of these voltage signals with real system operational conditions, one can determine if capacitance

values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast

high amplitude pulsed load applications. Note if designed high input voltage sources (bad adapters or wrong

adapters), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values

so a 16V capacitor may be adequate for a 30V transient (verify tested rating with capacitor manufacturer).

THERMAL PACKAGE

The bq2407xT family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to

provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should

be directly connected to V_SS. Full PCB design guidelines for this package are provided in the application note

entitled: QFN/SON PCB Attachment Application Note. The most common measure of package thermal

performance is thermal impedance (θ_JA) measured (or modeled) from the chip junction to the air surrounding the

package surface (ambient).

The mathematical expression for θ_JAis: = (T_J– T) / P

Where:

T_J= chip junction temperature

T = ambient temperature

P = device power dissipation

Factors that can influence the measurement and calculation of θ_JAinclude

Whether or not the device is board mounted

Trace size, composition, thickness, and geometry

Orientation of the device (horizontal or vertical)

Volume of the ambient air surrounding the device under test and airflow

Whether other surfaces are in close proximity to the device being tested

Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of

the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage

increases to 3.4V within the first 2 minutes. The thermal time constant of the assembly typically takes a few

minutes to heat up so when doing maximum power dissipation calculations, 3.4V is a good minimum voltage to

use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the

PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of

time. The fast charge current will start to taper off if the part goes into thermal regulation.

The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal

PowerFET. It can be calculated from Equation 5 when a battery pack is being charged :

P = [V_IN– V_OUT] × I_OUT+ [V_OUT– V_BAT] × I_BAT

(5)

The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is

recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage

and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or

higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop

is always active.

Half-Wave Adapters

Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the

battery voltage during part of the cycle. To enable operation with adapters under those conditions, the bq2407xT

family keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep mode. This

feature enables use of external adapters using 50 Hz networks. The input must not drop below the UVLO voltage

for the charger to work properly. Thus, the battery voltage should be above the UVLO to help prevent the input

from dropping out. Additional input capacitance may be needed.

24

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When the input is between V_UVLOand V_IN(DT), the device enters sleep mode. After entering sleep mode for 20ms

the internal FET connection between the IN and OUT pin is disabled and pulling the input to ground will not

discharge the battery, other than the leakage on the BAT pin. If one has a full 1000mAHr battery and the leakage

is 10μA, then it would take 1000mAHr/10μA = 100000 hours (11.4 years) to discharge the battery. The battery ‘s

self discharge is typically 5 times higher than this

Layout Tips

1. To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter

capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq2407xT, with

short trace runs to both IN, OUT and GND (thermal pad).

2. All low-current GND connections should be kept separate from the high-current charge or discharge paths

from the battery. Use a single-point ground technique incorporating both the small signal ground path and the

power ground path.

3. The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the

maximum charge current in order to avoid voltage drops in these traces

The bq2407xT family is packaged in a thermally enhanced MLP package. The package includes a thermal pad to

provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal pad is also

the main ground connection for the device. Connect the thermal pad to the PCB ground connection. Full PCB

design guidelines for this package are provided in the application note entitled: QFN/SON PCB Attachment

Application Note.

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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	BQ24075TRGTT
厂家：	TEXAS INSTRUMENTS
描述：	1.5A USB-Friendly Li-Ion Battery Charger and Power-Path Management IC 1.5A USB供能的锂离子电池充电器和电源路径管理IC 电源电路电池电源管理电路 PC
文件：	总29页 (文件大小：2371K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

BQ24075TRGTT [TI]

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