BQ24079QW-Q1 [TI]
通过汽车级认证的独立型单节电池 1.5A 线性充电器，具有电源路径和 4.1V VBAT;
| 型号： | BQ24079QW-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 通过汽车级认证的独立型单节电池 1.5A 线性充电器，具有电源路径和 4.1V VBAT 电池 |
| 文件： | 总47页 (文件大小：2755K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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bq24079QW-Q1
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
具有 NTC 监控和电源路径且符合汽车标准的 bq24079QW-Q1 4.1V 电池电
压锂离子电池充电器
1 特性
3 说明
1
•
•
符合汽车类应用的 应用
具有符合 AEC-Q100 标准的下列特性：
bq24079QW-Q1 是一款集成型锂离子线性充电器和系
统电源路径管理器件，适用于空间受限的汽车 应用，
例如远程信息处理/eCall。此器件可通过 4.35V 到
6.4V 电压的运行，最高支持 1.5A 的充电电流。它们
在输入电压范围内具有输入电压保护功能，因此支持非
稳压适配器。bq24079QW-Q1 的 USB 输入电流限制
精度和启动序列使得这款器件能够符合 USB-IF 涌入电
流规范。此外，输入动态电源管理 (VIN-DPM) 可防止
系统负载损毁错误配置的 USB 源。
–
器件温度 1 级：-40℃ 至 +125℃ 的环境工作温
度范围
–
–
器件 HBM ESD 分类等级 2
器件 CDM ESD 分类等级 C4A
•
完全符合 USB 充电器标准
–
–
最大输入电流可选 100mA 和 500mA
100mA 最大电流限制可确保充电符合 USB-IF
标准
bq24079QW-Q1 具有 动态电源路径管理 (DPPM) 功
能，可在为系统供电的同时独立为电池充电。当输入电
流限制引起系统输出降至 DPPM 阈值时，DPPM 电路
将减少充电电流；因此，可在为系统负载供电的同时单
独监测充电电流。此特性以及 4.1V 电池稳压电压有助
于减少电池的充放电次数，实现正常充电终止，并让系
统能够在电池组故障或缺失的情况下运行，从而延长电
池寿命。
–
基于输入的动态电源管理 (VIN-DPM)，用于保护
免受不良 USB 电源损害
•
•
•
28V 输入额定值，具有过压保护
4.1V 电池稳压电压
集成动态电源路径管理 (DPPM) 功能可同时独立进
行系统供电和对电池充电
•
•
具有用于进行电流监控的输出 (ISET)，可支持高达
1.5A 的充电电流
针对墙式充电器的高达 1.5A 的可编程输入电流限
制
器件信息(1)
器件编号
封装
VQFN (16)
封装尺寸（标称值）
•
•
•
•
•
•
•
带有 SYSOFF 输入的电池断开功能。
可编程预充电和快速充电安全计时器
反向电流、短路和热保护
bq24079QW-Q1
3.00mm x 3.00mm
(1) 如需了解所有可用封装，请参阅数据表末尾的可订购产品附
录。
负温度系数 (NTC) 热敏电阻输入
私有启动序列限制涌入电流
典型应用电路
1kW
状态指示 - 充电中/已完成、电源正常
1kW
具有可湿性的小型 3mm × 3mm 16 引线 VQFN 封
装
2 应用
IN
SYSTEM
IN
OUT
10
11
13
•
•
•
汽车远程信息处理
1mF
4.7mF
车队管理
5
8
EN2
BAT
VSS
显示密钥/智能密钥
bq24079QW-Q1
2
3
System
ON/OFF
Control
15
SYSOFF
4.7mF
PACK+
TEMP
1
TS
PACK-
1.18kW
1.13kW
Copyright © 2017, Texas Instruments Incorporated
1
本文档旨在为方便起见，提供有关 TI 产品中文版本的信息，以确认产品的概要。 有关适用的官方英文版本的最新信息，请访问 www.ti.com，其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前，请务必参考最新版本的英文版本。
English Data Sheet: SLUSCM2
bq24079QW-Q1
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
www.ti.com.cn
目录
9.4 Device Functional Modes........................................ 27
10 Application and Implementation........................ 28
10.1 Application Information.......................................... 28
1
2
3
4
5
6
7
8
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
（说明 （续））....................................................... 3
Device Comparison Table..................................... 4
Pin Configuration and Functions......................... 4
Specifications......................................................... 5
8.1 Absolute Maximum Ratings .................................... 5
8.2 ESD Ratings.............................................................. 5
8.3 Recommended Operating Conditions...................... 5
8.4 Thermal Information.................................................. 6
8.5 Electrical Characteristics.......................................... 6
8.6 Typical Characteristics............................................ 11
Detailed Description ............................................ 14
9.1 Overview ................................................................. 14
9.2 Functional Block Diagram ....................................... 15
9.3 Feature Description................................................. 16
10.2 Typical Application – bq24079QW-Q1 Charger
Design Example....................................................... 28
11 Power Supply Recommendations ..................... 34
12 Layout................................................................... 35
12.1 Layout Guidelines ................................................. 35
12.2 Layout Example .................................................... 36
12.3 Thermal Package.................................................. 37
13 器件和文档支持 ..................................................... 38
13.1 器件支持 ............................................................... 38
13.2 文档支持 ............................................................... 38
13.3 接收文档更新通知 ................................................. 38
13.4 社区资源................................................................ 38
13.5 商标....................................................................... 38
13.6 静电放电警告......................................................... 38
13.7 术语表 ................................................................... 38
14 机械、封装和可订购信息....................................... 38
9
4 修订历史记录
注：之前版本的页码可能与当前版本有所不同。
Changes from Revision A (November 2017) to Revision B
Page
•
•
已更改 将特性中的 HBM ESD 分类等级从 H1C 更改为 2 ...................................................................................................... 1
Changed ESD Ratings HBM to All pins value ±2000 V ........................................................................................................ 5
Changes from Original (October 2017) to Revision A
Page
•
•
已更改 标题............................................................................................................................................................................. 1
Changed Standby current into IN pin MAX from 50 to 55 µA ............................................................................................... 6
2
版权 © 2017–2018, Texas Instruments Incorporated
bq24079QW-Q1
www.ti.com.cn
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
5 （说明 （续））
此外，该系列充电器可提供经稳压的系统输入，即使在电池完全放电的情况下，也可使系统在连接电源后实现瞬间
开启。此电源路径管理架构还允许在适配器不能够发送峰值系统电流时补偿系统电流需求，从而使得能够使用较小
的适配器。
电池充电发生于以下三个阶段：调节、恒定电流和恒定电压。在所有的充电阶段，一个内部控制环路监测 IC 结温
并且如果超过此内部温度阈值则减少充电电流。充电器功率级和充电电流感应功能完全集成在了一起。该充电器具
高精度电流和电压调节环路、充电状态显示和充电终止功能。输入电流限制和充电电流可使用外部电阻编程设定。
Copyright © 2017–2018, Texas Instruments Incorporated
3
bq24079QW-Q1
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
www.ti.com.cn
6 Device Comparison Table
OPTIONAL
FUNCTION
DEVICE
VOVP
VBAT(REG)
VOUT(REG)
VDPPM
bq24079QW-Q1
6.6 V
4.1 V
5.5 V
4.3 V
SYSOFF
7 Pin Configuration and Functions
RGT Package
16 Pin VQFN
Top View
TS
BAT
BAT
CE
1
12
11
10
9
ILIM
OUT
OUT
CHG
2
3
4
Thermal
Pad
Not to scale
Pin Functions
PIN
I/O
DESCRIPTION
NAME
NO.
External NTC Thermistor Input. Connect the TS input to the NTC thermistor in the battery pack. TS monitors a 10-
kΩ NTC thermistor. For applications that do not utilize the TS function, connect a 10-kΩ fixed resistor from TS to
VSS to maintain a valid voltage level on TS. Do not leave TS pin floating.
TS
1
I
I/O
I
Charger Power Stage Output and Battery Voltage Sense Input. Connect BAT to the positive terminal of the
battery. Bypass BAT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
BAT
CE
2, 3
4
Charge Enable Active-Low Input. Connect CE to a high logic level to suspend charging. When CE is high, OUT is
active and battery supplement mode is still available. Connect CE to a low logic level to enable the battery
charger. CE is internally pulled down with ~285 kΩ. Do not leave CE unconnected to ensure proper operation.
EN2
EN1
5
6
I
I
Input Current Limit Configuration Inputs. Use EN1 and EN2 control the maximum input current and enable USB
compliance. See EN1/EN2 Settings table for the description of the operation states. EN1 and EN2 are internally
pulled down with ≉285 kΩ. Do not leave EN1 or EN2 unconnected to ensure proper operation.
Open-drain Power Good Status Indication Output. PGOOD pulls to VSS when a valid input source is detected.
PGOOD is high-impedance when the input power is not within specified limits. Connect PGOOD to the desired
logic voltage rail using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
PGOOD
VSS
7
8
9
O
–
Ground. Connect to the thermal pad and to the ground rail of the circuit.
Open-Drain Charging Status Indication Output. CHG pulls to VSS when the battery is charging. CHG is high
impedance when charging is complete and when charger is disabled. Connect CHG to the desired logic voltage
rail using a 1-kΩ to 100-kΩ resistor, or use with an LED for visual indication.
CHG
O
System Supply Output. OUT provides a regulated output when the input is below the OVP threshold and above
the regulation voltage. When the input is out of the operation range, OUT is connected to VBAT except when
SYSOFF is high. Connect OUT to the system load. Bypass OUT to VSS with a 4.7-μF to 47-μF ceramic capacitor.
OUT
ILIM
IN
10, 11
12
O
I
Adjustable Current Limit Programming Input. Connect a 1100-Ω to 8-kΩ resistor from ILIM to VSS to program the
maximum input current (EN2 = 1, EN1 = 0). The input current includes the system load and the battery charge
current. Leaving ILIM unconnected disables all charging.
Input Power Connection. Connect IN to the external DC supply (AC adapter or USB port). The input operating
range is 4.35 V to 6.6 V. The input can accept voltages up to 26 V without damage but operation is suspended.
Connect bypass capacitor 1 μF to 10 μF to VSS.
13
I
4
Copyright © 2017–2018, Texas Instruments Incorporated
bq24079QW-Q1
www.ti.com.cn
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
Pin Functions (continued)
PIN
I/O
DESCRIPTION
NAME
NO.
Timer Programming Input. TMR controls the pre-charge and fast-charge safety timers. Connect TMR to VSS to
disable all safety timers. Connect a 18-kΩ to 72-kΩ resistor between TMR and VSS to program the timers a
desired length. Leave TMR unconnected to set the timers to the default values.
TMR
14
I
System Enable Input. Connect SYSOFF high to turn off the FET connecting the battery to the system output.
When an adapter is connected, charging is also disabled. Connect SYSOFF low for normal operation. SYSOFF is
internally pulled up to VBAT through a large resistor (~5 MΩ). Do not leave SYSOFF unconnected to ensure proper
operation.
SYSOFF
ISET
15
I
Fast Charge Current Programming Input. Connect a 590-Ω to 8.9-kΩ resistor from ISET to VSS to program the
fast charge current level. Charging is disabled if ISET is left unconnected. While charging, the voltage at ISET
reflects the actual charging current and can be used to monitor charge current. See the Charge Current Translator
section for more details.
16
–
I/O
–
There is an internal electrical connection between the exposed thermal pad and the VSS pin of the device. The
thermal pad must be connected to the same potential as the VSS pin on the printed circuit board. Do not use the
thermal pad as the primary ground input for the device. VSS pin must be connected to ground at all times.
Thermal
Pad
8 Specifications
8.1 Absolute Maximum Ratings(1)
over the -40°C to 125°C operating free-air temperature range (unless otherwise noted)
MIN
–0.3
–0.3
MAX
28
UNIT
V
IN (with respect to VSS)
BAT (with respect to VSS)
5
V
Input voltage, VI
OUT, EN1, EN2, CE, TS, ISET, PGOOD, CHG, ILIM, TMR,
SYSOFF
–0.3
7
V
Input current, II
IN
1.6
5
A
A
OUT
Output current (Continuous), IO BAT (Discharge mode)
BAT (Charging mode)
5
A
1.5(2)
A
Output sink current
CHG, PGOOD
15
mA
°C
°C
Junction temperature, TJ
Storage temperature, Tstg
–40
–65
150
150
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltage
values are with respect to the network ground terminal unless otherwise noted.
(2) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
8.2 ESD Ratings
VALUE
±2000
±500
UNIT
Human-body model (HBM), per AEC
Q100-002(2)
All pins
V(ESD)
Electrostatic discharge(1)
V
Charged-device model (CDM), per AEC Q100-011
(1) Electrostatic discharge (ESD) measures device sensitivity and immunity to damage caused by assembly line electrostatic discharges.
(2) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
8.3 Recommended Operating Conditions
MIN
4.35
4.35
MAX
26
UNIT
IN voltage range
V
V
A
A
A
VI
IN operating voltage range
Input current, IN pin
6.4
1.5
4.5
4.5
IIN
IOUT
IBAT
Current, OUT pin
Current, BAT pin (Discharging)
Copyright © 2017–2018, Texas Instruments Incorporated
5
bq24079QW-Q1
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
www.ti.com.cn
Recommended Operating Conditions (continued)
MIN
MAX
UNIT
A
ICHG
Current, BAT pin (Charging)
1.5(1)
8000
8900
15
RILIM
RISET
RITERM
RTMR
Maximum input current programming resistor
1100
590
0
Ω
(2)
Fast-charge current programming resistor
Ω
Termination current programming resistor
Timer programming resistor
kΩ
kΩ
18
72
(1) The IC operational charging life is reduced to 20,000 hours, when charging at 1.5A and 125°C. The thermal regulation feature reduces
charge current if the IC’s junction temperature reaches 125°C; thus without a good thermal design the maximum programmed charge
current may not be reached.
(2) Use a 1% tolerance resistor for RISET to avoid issues with the RISET short test when using the maximum charge current setting.
8.4 Thermal Information
bq24079QW-Q1
THERMAL METRIC(1)
RGT (VQFN)
16 PIN
43.2
UNIT
RθJA
Junction-to-ambient thermal resistance
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
RθJC(top)
RθJB
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
46.3
17.6
ψJT
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
0.8
ψJB
17.7
RθJC(bot)
3.0
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
8.5 Electrical Characteristics
Over ambient temperature range (–40°C ≤ TA ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
INPUT
UVLO
Vhys
Undervoltage lock-out
Hysteresis on UVLO
VIN: 0 V → 4 V
VIN: 4 V → 0 V
3.2
3.3
3.4
V
200
300
mV
Input power detected when VIN > VBAT + VIN(DT)
VBAT = 3.6 V, VIN: 3.5 V → 4 V
VIN(DT)
Vhys
Input power detection threshold
Hysteresis on VIN(DT)
50
20
80
135
mV
mV
ms
VBAT = 3.6 V, VIN: 4 V → 3.5 V
Time measured from VIN: 0 V → 5 V with 1-μs
rise time to PGOOD = LO
tDGL(PGOOD) Deglitch time, input power detected status
1.2
VOVP
Vhys
Input overvoltage protection threshold
Hysteresis on OVP
VIN: 5 V → 7 V
VIN: 7 V → 5V
6.4
6.6
6.8
V
110
mV
Input overvoltage blanking time (OVP fault
deglitch)
tDGL(OVP)
tREC
50
μs
Time measured from VIN: 11 V → 5 V with 1-μs
fall time to PGOOD = LO
Input overvoltage recovery time
1.2
ms
ILIM, ISET SHORT CIRCUIT DETECTION (CHECKED DURING STARTUP)
ISC
Current source
VIN > UVLO and VIN > VBAT + VIN(DT)
VIN > UVLO and VIN > VBAT + VIN(DT)
1.3
mA
mV
VSC
520
QUIESCENT CURRENT
CE = LO or HI, Input power not detected,
No load on OUT pin, TA ≤ 125°C
IBAT(PDWN) Sleep current into BAT pin
4.4
13
μA
μA
EN1 = HI, EN2 = HI, VIN = 6 V, TA ≤ 125°C
EN1 = HI, EN2 = HI, VIN = 10 V, TA ≤ 125°C
38.8
90.2
55
IIN
Standby current into IN pin
Active supply current, IN pin
200
CE = LO, VIN = 6 V, No load on OUT pin,
VBAT > VBAT(REG), (EN1, EN2) ≠ (HI, HI)
ICC
1.5
mA
6
Copyright © 2017–2018, Texas Instruments Incorporated
bq24079QW-Q1
www.ti.com.cn
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
Electrical Characteristics (continued)
Over ambient temperature range (–40°C ≤ TA ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
POWER PATH
VDO(IN-OUT) VIN – VOUT
VIN = 4.3 V, IIN = 1 A, VBAT = 4.1 V
IOUT = 1 A, VIN = 0 V, VBAT > 3 V
300
50
475
100
mV
mV
V
VDO(BAT-
VBAT – VOUT
OUT)
VO(REG)
IINmax
OUT pin voltage regulation
VIN > VOUT + VDO(IN-OUT)
EN1 = LO, EN2 = LO
5.4
90
5.5
95
5.65
101
500
mA
A
Maximum input current
EN1 = HI, EN2 = LO
440
475
EN2 = HI, EN1 = LO
KILIM/RILIM
1610
ILIM = 500 mA to 1.5 A
1500
1300
200
1720
1770
1500
KILIM
Maximum input current factor
AΩ
ILIM = 200 mA to 500 mA
EN2 = HI, EN1 = LO, RILIM = 8 kΩ to 1.1 kΩ
1525
IINmax
Programmable input current limit range
mA
V
Input voltage threshold when input current is
reduced
VIN-DPM
EN2 = LO, EN1 = X
4.35
4.2
4.5
4.3
4.63
4.4
Output voltage threshold when charging
current is reduced
VDPPM
V
V
VOUT
≤
VBSUP1
Enter battery supplement mode
Exit battery supplement mode
VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 10 Ω → 2 Ω
VBAT
–40mV
VOUT
≥
VBSUP2
VO(SC1)
VO(SC2)
VBAT = 3.6 V, RILIM = 1.5 kΩ, RLOAD = 2 Ω → 10 Ω
VIN > VUVLO and VIN > VBAT + VIN(DT)
VBAT–20m
V
V
V
Output short-circuit detection threshold,
power-on
0.8
0.9
1
Output short-circuit detection threshold,
supplement mode VBAT – VOUT > VO(SC2)
indicates short-circuit
VIN > VUVLO and VIN > VBAT + VIN(DT)
200
250
300
mV
tDGL(SC2)
tREC(SC2)
Deglitch time, supplement mode short circuit
250
60
μs
Recovery time, supplement mode short
circuit
ms
BATTERY CHARGER
Source current for BAT pin short-circuit
detection
VBAT = 1.5 V
VBAT rising
IBAT
4
7.5
11
mA
VBAT(SC)
VBAT(REG)
VLOWV
BAT pin short-circuit detection threshold
Battery charge voltage
1.6
4.059
2.9
1.8
4.100
3
2
4.141
3.1
V
V
V
Pre-charge to fast-charge transition threshold VIN > VUVLO and VIN > VBAT + VIN(DT)
Deglitch time on pre-charge to fast-charge
transition
tDGL1(LOWV)
tDGL2(LOWV)
25
25
ms
ms
mA
Deglitch time on fast-charge to pre-charge
transition
VBAT(REG) > VBAT > VLOWV, VIN = 5 V, CE = LO,
Battery fast charge current range
EN1 = LO, EN2 = HI
100
1500
ICHG
CE = LO, EN1= LO, EN2 = HI,
Battery fast charge current
VBAT > VLOWV, VIN = 5 V, IINmax > ICHG, No load on
OUT pin, Thermal loop and DPPM loop not active
KISET/RISET
A
KISET
Fast charge current factor
Pre-charge current
797
55
890
KPRECHG/RISET
88
975
118
AΩ
A
IPRECHG
KPRECHG
Pre-charge current factor
AΩ
CE = LO, (EN1, EN2) ≠ (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and
thermal loop not active
0.09×ICH
0.11×ICH
0.1×ICHG
G
G
Termination comparator detection threshold
(internally set)
ITERM
A
CE = LO, (EN1, EN2) = (LO, LO),
VBAT > VRCH, t < tMAXCH, VIN = 5 V, DPPM loop and
thermal loop not active
0.027×IC
0.040×IC
0.033×ICHG
HG
HG
tDGL(TERM)
VRCH
Deglitch time, termination detected
Recharge detection threshold
25
100
ms
mV
ms
VIN > VUVLO and VIN > VBAT + VIN(DT)
50
145
tDGL(RCH)
Deglitch time, recharge threshold detected
62.5
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Electrical Characteristics (continued)
Over ambient temperature range (–40°C ≤ TA ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
VBAT = 3.6 V. Time measured from
VIN: 5 V → 3 V, 1-μs fall time
Delay time, input power loss to OUT LDO
turn-off
tDGL(NO-IN)
20
ms
IBAT(DET)
tDET
Sink current for battery detection
Battery detection timer
VBAT = 2.5 V
5
7.5
10
mA
ms
BAT high or low
250
BATTERY CHARGING TIMERS
tPRECHG
tMAXCHG
tPRECHG
tMAXCHG
KTMR
Pre-charge safety timer value
TMR = floating
1440
1800
18000
2160
s
s
Charge safety timer value
Pre-charge safety timer value
Charge safety timer value
Timer factor
TMR = floating
14400
21600
18 kΩ < RTMR < 72 kΩ
18 kΩ < RTMR < 72 kΩ
RTMR × KTMR
s
10×R TMR ×KTMR
s
36
48
60
s/kΩ
BATTERY-PACK NTC MONITOR(1)
INTC
NTC bias current
VIN > UVLO and VIN > VBAT + VIN(DT)
Battery charging, VTS Falling
71
75
300
30
80
μA
mV
mV
mV
mV
VHOT
High temperature trip point
Hysteresis on high trip point
Low temperature trip point
270
330
VHYS(HOT)
VCOLD
Battery charging, VTS Rising from VHOT
Battery charging, VTS Rising
2000
2100
300
2200
VHYS(COLD) Hysteresis on low trip point
Battery charging, VTS Falling from VCOLD
Deglitch time, pack temperature fault
tDGL(TS)
TS fault detected to charger disable
50
ms
detection
THERMAL REGULATION
TJ(REG) Temperature regulation limit
TJ(OFF) Thermal shutdown temperature
125
155
20
°C
°C
°C
TJ Rising
TJ(OFF-HYS) Thermal shutdown hysteresis
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF
VIL
VIH
IIL
Logic LOW input voltage
Logic HIGH input voltage
Input sink current
0
0.4
6
V
V
1.4
VIL= 0 V
1
μA
μA
IIH
Input source current
VIH= 1.4 V
10
LOGIC LEVELS ON PGOOD, CHG
VOL Output LOW voltage
ISINK = 5 mA
0.4
V
(1) These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC
with an R25 of 10 kΩ.
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V
OVP
- V
hys(OVP)
V
OVP
V
IN
Typical Input Voltage
Operating Range
t < t
DGL(OVP)
V
+ V
IN(DT)
BAT
V
+ V
- V
IN(DT) hys(INDT)
BAT
UVLO
UVLO - V
hys(UVLO)
PGOOD
t
DGL(PGOOD)
t
t
DGL(OVP)
DGL(NO-IN)
t
DGL(PGOOD)
图 1. Power-Up, Power-Down, Power Good Indication
t
V
DGL1(LOWV)
BAT
V
LOWV
t < t
t
t
t < t
DGL1(LOWV)
DGL2(LOWV)
DGL1(LOWV)
DGL2(LOWV)
I
CHG
Fast-Charge
Fast-Charge
Pre-Charge
I
PRE-CHG
Pre-Charge
图 2. Pre- to Fast-Charge, Fast- to Pre-Charge Transition – tDGL1(LOWV), tDGL2(LOWV)
V
BAT
V
RCH
Re-Charge
t < t
t
DGL(RCH)
DGL(RCH)
图 3. Recharge – tDGL(RCH)
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Turn
Q2 OFF
Force
Q2 ON
Force
Q2 ON
Turn
Q2 OFF
t
t
REC(SC2)
REC(SC2)
V
- V
OUT
BAT
Recover
V
O(SC2)
t
t
t < t
t < t
DGL(SC2)
DGL(SC2)
DGL(SC2)
DGL(SC2)
图 4. OUT Short-Circuit – Supplement Mode
V
COLD
- V
hys(COLD)
V
COLD
Suspend
Charging
Resume
Charging
t < t
t
DGL(TS)
DGL(TS)
V
TS
V
- V
hys(HOT)
HOT
V
HOT
图 5. Battery Pack Temperature Sensing – TS Pin. Battery Temperature Increasing
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8.6 Typical Characteristics
VIN = 6 V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
600
500
0.7
0.6
0.5
0.4
0.3
0.2
400
300
200
100
0
0.1
0
125
120
125
130
135
140
145
0
25
100
50
75
Temperature (oC)
Junction Temperature (°C)
IL = 1 A
图 7. Dropout Voltage vs Temperature
图 6. Thermal Regulation
120
100
80
5.75
5.70
5.65
5.60
5.55
5.50
5.45
5.40
5.35
VBAT = 3 V
60
40
VBAT = 3.9 V
20
0
5.30
5.25
125
0
50
75
100
25
0
25
50
75
100
125
Junction Temperature (°C)
Junction Temperature (°C)
IL = 1 A, No Input Supply
VIN = 6 V, IL = 1 A
图 8. Dropout Voltage vs Temperature
图 9. Output Regulation Voltage vs Temperature -
bq24079QW-Q1
6.70
1.05
1.03
6.65
6.60
VI Rising
1.01
0.99
6.55
VI Falling
6.50
6.45
0.97
0.95
0
25
50
75
100
125
3.6
3
3.8
3.4
4
4.2
3.2
Junction Temperature (°C)
Battery Voltage (V)
6.6 V
图 10. Overvoltage Protection Threshold vs Temperature
RISET = 900 Ω
图 11. Fastcharge Current vs Battery Voltage
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Typical Characteristics (接下页)
VIN = 6 V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
310
31.5
305
300
295
290
31
30.5
30
29.5
285
280
29
28.5
3
3.2
3.4
3.6
3.8
4
4.2
2
2.2
2.4
2.6
2.8
3
Battery Voltage (V)
Battery Voltage (V)
RISET = 3 kΩ
图 12. Fastcharge Current vs Battery Voltage
RISET = 3 kΩ
图 13. Precharge Current vs Battery Voltage
4.14
0.7
0.65
0.6
4.13
4.12
4.11
4.1
0.55
0.5
0.45
0.4
0.35
0.3
4.09
4.08
4.07
4.06
4.05
0.25
0.2
0.15
0.1
0.05
0
-40
-20
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TJ - Junction Temperature (èC)
TJ - Junction Temperature (èC)
D001
D002
图 14. BAT Regulation Voltage vs Temperature
图 15. Dropout Voltage vs Temperature
120
110
100
90
80
70
60
50
40
30
20
10
0
5.75
5.7
5.65
5.6
5.55
5.5
5.45
5.4
5.35
5.3
5.25
-40
-20
IL = 1 A
图 16. Dropout Voltage vs Temperature
0
20
40
60
80
100 120 140
-40
-20
0
20
40
60
80
100 120 140
TJ - Junction Temperature (èC)
TJ - Junction Temperature (èC)
D003
D004
图 17. Output Regulation Voltage vs Temperature
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Typical Characteristics (接下页)
VIN = 6 V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
6.7
VI Rising
VI Falling
6.65
6.6
6.55
6.5
6.45
6.4
-40
-20
0
20
40
60
80
100
120
TJ - Junction Temperature (èC)
D005
图 18. Input Voltage vs Temperature
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9 Detailed Description
9.1 Overview
The bq24079QW-Q1 device is an integrated Li-Ion linear charger and system power path management device
targeted at space-limited portable applications. The device powers the system while simultaneously and
independently charging the battery. This feature reduces the number of charge and discharge cycles on the
battery, allows for proper charge termination and enables the system to run with a defective or absent battery
pack. It also allows instant system turn-on even with a totally discharged battery. The input power source for
charging the battery and running the system can be an AC adapter or a USB port. The device features Dynamic
Power Path Management (DPPM), which shares the source current between the system and battery charging,
and automatically reduces the charging current if the system load increases. When charging from a USB port,
the input dynamic power management (VIN-DPM) circuit reduces the input current if the input voltage falls below
a threshold, preventing the USB port from crashing. The power-path architecture also permits the battery to
supplement the system current requirements when the adapter cannot deliver the peak system currents.
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9.2 Functional Block Diagram
250mV
VBAT
VO(SC1)
OUT-SC1
OUT-SC2
tDGL(SC2)
Q1
IN
OUT
EN2
Short Detect
225mV
Precharge
ISET
VIN-LOW
2.25V
Fastcharge
USB100
USB500
TJ
ILIM
VREF- ILIM
TJ(REG)
USB-susp
Short Detect
VDPPM
VO(REG)
VOUT
Q2
EN2
EN1
VBAT(REG)
BAT
VBAT
VOUT
CHARGEPUMP
SYSOFF
IBIAS- ITERM
40mV
Supplement
VLOWV
225mV
VRCH
VBAT(SC)
~3V
I TERM-floating
VIN
INTC
VHOT
VCOLD
BAT-SC
VBAT + V
IN-DT
tDGL(NO-IN)
TS
tDGL(TS)
tDGL(PGOOD)
Charge Control
VUVLO
VOVP
tBLK(OVP)
VDIS(TS)
EN1
EN2
USB Suspend
CE
CHG
Halt timers
Reset timers
VIPRECHG
VICHG
Dynamically
Controlled
Oscillator
PGOOD
VISET
Fast-Charge
Timer
Timer fault
TMR
Pre-Charge
Timer
~100mV
Timers disabled
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9.3 Feature Description
9.3.1 Undervoltage Lockout (UVLO)
The bq24079QW-Q1 remains in power down mode when the input voltage at the IN pin is below the
undervoltage threshold (UVLO).
During the power down mode, the host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1
FET connected between IN and OUT pins is off, and the status outputs CHG and PGOOD are high impedance.
The Q2 FET that connects BAT to OUT is ON. (If SYSOFF is high, Q2 is off). During power down mode, the
VOUT(SC2) circuitry is active and monitors for overload conditions on OUT.
9.3.2 Power On
When VIN exceeds the UVLO threshold, the bq24079QW-Q1 powers up. While VIN is below VBAT + VIN(DT), the
host commands at the control inputs (CE, EN1 and EN2) are ignored. The Q1 FET connected between IN and
OUT pins is off, and the status outputs CHG and PGOOD are high impedance. The Q2 FET that connects BAT
to OUT is ON. (If SYSOFF is high, Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for
overload conditions on OUT.
Once VIN rises above VBAT + VIN(DT), PGOOD is driven low to indicate the valid power status and the CE, EN1,
and EN2 inputs are read. The device enters standby mode if (EN1 = EN2 = HI) or if an input overvoltage
condition occurs. In standby mode, Q1 is OFF and Q2 is ON so OUT is connected to the battery input. (If
SYSOFF is high, FET Q2 is off). During this mode, the VOUT(SC2) circuitry is active and monitors for overload
conditions on OUT.
When the input voltage at IN is within the valid range: VIN > UVLO AND VIN > VBAT + VIN(DT) AND VIN < VOVP, and
the EN1 and EN2 pins indicate that the USB suspend mode is not enabled [(EN1, EN2) ≠ (HI, HI)], all internal
timers and other circuit blocks are activated. The device then checks for short-circuits at the ISET and ILIM pins.
If no short conditions exists, the device switches on the input FET Q1 with a 100mA current limit to checks for a
short circuit at OUT. When VOUT is above VO(SC1), the FET Q1 switches to the current limit threshold set by EN1,
EN2 and RILIM and the device enters into the normal operation. During normal operation, the system is powered
by the input source (Q1 is regulating), and the device continuously monitors the status of CE, EN1 and EN2 as
well as the input voltage conditions.
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Feature Description (接下页)
PGOOD = Hi-Z
CHG = Hi-Z
BATTFET ON
UVLO<VIN<VOVP
and
No
VIN>VBAT+VIN(DT)
Yes
PGOOD = Low
Yes
Yes
EN1=EN2=1
No
ILIM or ISET short?
No
Begin Startup
IIN(MAX) 100mA
Yes
VOUT short?
No
Input Current
Limit set by EN1
and EN2
No
CE = Low
Yes
Begin Charging
图 19. Startup Flow Diagram
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Feature Description (接下页)
9.3.3 Overvoltage Protection (OVP)
The bq24079QW-Q1 accepts inputs up to 28 V without damage. Additionally, an overvoltage protection (OVP)
circuit is implemented that shuts off the internal LDO and discontinues charging when VIN > VOVP for a period
long than tDGL(OVP). When in OVP, the system output (OUT) is connected to the battery and PGOOD is high
impedance. Once the OVP condition is removed, a new power on sequence starts (See the Power On section).
The safety timers are reset and a new charge cycle will be indicated by the CHG output.
9.3.4 Dynamic Power-path Management
The bq24079QW-Q1 features an OUT output that powers the external load connected to the battery. This output
is active whenever a source is connected to IN or BAT when SYSOFF is low. The following sections discuss the
behavior of OUT with a source connected to IN to charge the battery and a battery source only.
9.3.4.1 Input Source Connected (Adapter or USB)
With a source connected, the dynamic power-path management (DPPM) circuitry of the bq24079QW-Q1
monitors the input current continuously. The OUT output for the bq24079QW-Q1 is regulated to a fixed voltage
(VO(REG)). The current into IN is shared between charging the battery and powering the system load at OUT. The
bq24079QW-Q1 has internal selectable current limits of 100 mA (USB100) and 500 mA (USB500) for charging
from USB ports, as well as a resistor-programmable input current limit.
The bq24079QW-Q1 is USB IF compliant for the inrush current testing. The USB spec allows up to 10 μF to be
hard started, which establishes 50 μC as the maximum inrush charge value when exceeding 100 mA. The input
current limit for the bq24079QW-Q1 prevents the input current from exceeding this limit, even with system
capacitances greater than 10 μF. Note that the input capacitance to the device must be selected small enough to
prevent a violation (<10 μF), as this current is not limited. 图 20 demonstrates the startup of the bq24079QW-Q1
and compares it to the USB-IF specification.
10μC
50μC
100 μs/div
图 20. USB-IF Inrush Current Test
The input current limit selection is controlled by the state of the EN1 and EN2 pins. When using the resistor-
programmable current limit, the input current limit is set by the value of the resistor connected from the ILIM pin
to VSS, and is given by the equation:
IIN-MAX = KILIM/RILIM
(1)
The input current limit is adjustable up to 1.5 A. The valid resistor range is 1.1 kΩ to 8 kΩ.
When the IN source is connected, priority is given to the system load. The DPPM and Battery Supplement
modes are used to maintain the system load. These modes are explained in detail in the following sections.
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Feature Description (接下页)
9.3.4.1.1 Input DPM Mode (VIN-DPM)
The bq24079QW-Q1 uses the VIN-DPM mode for operation from current-limited USB ports. When EN1 and EN2
are configured for USB100 (EN2 = 0, EN1 = 0) or USB500 (EN2 = 0, EN2 = 1) modes, the input voltage is
monitored. If VIN falls to VIN-DPM, the input current limit is reduced to prevent the input voltage from falling further.
This prevents the bq24079QW-Q1 from crashing poorly designed or incorrectly configured USB sources. 图 21
shows the VIN-DPM behavior to a current limited source. In this figure, the input source has a 400-mA current
limit and the device is in USB500 mode (EN1 = 1, EN2 = 0).
I
OUT
200mA/div
Input collapses
V
IN
(5V)
500mV/div
Input regulated to V
IN_DPM
USB500 Current Limit
200mA/div
200mA/div
I
Input current limit is
reduced to prevent
crashing the supply
IN
I
BAT
4 ms/div
图 21. VIN-DPM Waveform
9.3.4.1.2 DPPM Mode
When the sum of the charging and system load currents exceeds the maximum input current (programmed with
EN1, EN2, and ILIM pins), the voltage at OUT decreases. Once the voltage on the OUT pin falls to VDPPM, the
bq24079QW-Q1 enters DPPM mode. In this mode, the charging current is reduced as the OUT current increases
in order to maintain the system output. Battery termination is disabled while in DPPM mode.
9.3.4.1.3 Battery Supplement Mode
While in DPPM mode, if the charging current falls to zero and the system load current increases beyond the
programmed input current limit, the voltage at OUT reduces further. When the OUT voltage drops below the
VBSUP1 threshold, the battery supplements the system load. The battery stops supplementing the system load
when the voltage at OUT rises above the VBSUP2 threshold.
During supplement mode, the battery supplement current is not regulated (BAT-FET is fully on). However, there
is a short circuit protection circuit built in. If the voltage at OUT drops VO(SC2) below the BAT voltage during
battery supplement mode, the OUT output is turned off if the overload exists after tDGL(SC2). The short circuit
recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short circuit
remains, OUT is turned off and the counter restarts. Battery termination is disabled while in supplement mode.
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Feature Description (接下页)
9.3.4.2 Input Source Not Connected
When no source is connected to the IN input, OUT is powered strictly from the battery. During this mode, the
current into OUT is not regulated, similar to Battery Supplement Mode. However, the short circuit circuitry is
active. If the OUT voltage falls below the BAT voltage by 250 mV for longer than tDGL(SC2), OUT is turned off. The
short circuit recovery timer then starts counting. After tREC(SC2), OUT turns on and attempts to restart. If the short
circuit remains, OUT is turned off and the counter restarts. This ON/OFF cycle continues until the overload
condition is removed.
9.3.5 Battery Charging
Set CE low to initiate battery charging. First, the device checks for a short-circuit on the BAT pin by sourcing
IBAT(SC) to the battery and monitoring the voltage. When the BAT voltage exceeds VBAT(SC), the battery charging
continues. The battery is charged in three phases: conditioning pre-charge, constant current fast charge (current
regulation) and a constant voltage tapering (voltage regulation). In all charge phases, an internal control loop
monitors the IC junction temperature and reduces the charge current if an internal temperature threshold is
exceeded.
图 22 illustrates a normal Li-Ion charge cycle using the bq24079QW-Q1:
PRECHARGE
CC FAST CHARGE
CV TAPER
DONE
V
BAT(REG)
I
O(CHG)
Battery Current
Battery Voltage
V
LOWV
CHG = Hi-z
I
(PRECHG)
I
(TERM)
图 22. Typical Charge Cycle
In the pre-charge phase, the battery is charged with the pre-charge current (IPRECHG). Once the battery voltage
crosses the VLOWV threshold, the battery is charged with the fast-charge current (ICHG). As the battery voltage
reaches VBAT(REG), the battery is held at a constant voltage of VBAT(REG) and the charge current tapers off as the
battery approaches full charge. When the battery current reaches ITERM, the CHG pin indicates charging done by
going high-impedance.
Note that termination detection is disabled whenever the charge rate is reduced because of the actions of the
thermal loop, the DPPM loop or the VIN(LOW) loop.
The value of the fast-charge current is set by the resistor connected from the ISET pin to VSS, and is given by
the equation:
ICHG = KISET/RISET
(2)
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Feature Description (接下页)
The charge current limit is adjustable up to 1.5 A. The recommended valid resistor range is 590 Ω to 8.9 kΩ.
Note that if ICHG is programmed as greater than the input current limit, the battery will not charge at the rate of
ICHG, but at the slower rate of IIN(MAX) (minus the load current on the OUT pin, if any). In this case, the charger
timers will be proportionately slowed down.
9.3.5.1 Charge Current Translator
When the charger is enabled, internal circuits generate a current proportional to the charge current at the ISET
input. The current out of ISET is 1/400 (±10%) of the charge current. This current, when applied to the external
charge current programming resistor, RISET, generates an analog voltage that can be monitored by an external
host to calculate the current sourced from BAT.
VISET = ICHARGE / 400 × RISET
(3)
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Feature Description (接下页)
Begin Charging
Yes
Battery short detected?
No
Start Precharge
CHG = Low
No
tPRECHARGE
Elapsed?
No
VBAT > VLOWV
Yes
End Charge
Flash CHG
Start Fastcharge
ICHARGE set by ISET
No
No
tFASTCHARGE
Elapsed?
IBAT < ITERM
Yes
End Charge
Flash CHG
Charge Done
CHG = Hi-Z
TD = Low
(’72, ’73 Only)
(’74, ’75 = YES)
(’79QW-Q1 = YES)
No
Yes
Termination Reached
BATTFET Off
Wait for VBAT < VRCH
No
VBAT < VRCH
Yes
Run Battery Detection
No
Battery Detected?
Yes
图 23. Battery Charging Flow Diagram
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Feature Description (接下页)
9.3.5.2 Battery Detection And Recharge
The bq24079QW-Q1 automatically detects if a battery is connected or removed. Once a charge cycle is
complete, the battery voltage is monitored. When the battery voltage falls below VRCH, the battery detection
routine is run. During battery detection, current (IBAT(DET)) is pulled from the battery for a duration tDET to see if the
voltage on BAT falls below VLOWV. If not, charging begins. If it does, then it indicates that the battery is missing or
the protector is open. Next, the precharge current is applied for tDET to close the protector if possible. If VBAT
<
VRCH, then the protector closed and charging is initiated. If VBAT > VRCH, then the battery is determined to be
missing and the detection routine continues.
9.3.5.3 Battery Disconnect (SYSOFF Input)
The bq24079QW-Q1 features a SYSOFF input that allows the user to turn the FET Q2 off and disconnect the
battery from the OUT pin. This is useful for disconnecting the system load from the battery, factory programming
where the battery is not installed or for host side impedance track fuel gauging, such as bq27500, where the
battery open circuit voltage level must be detected before the battery charges or discharges. The CHG output
remains low when SYSOFF is high. Connect SYSOFF to VSS, to turn Q2 on for normal operation. SYSOFF is
internally pulled to VBAT through ~5 MΩ resistor.
9.3.5.4 Dynamic Charge Timers (TMR Input)
The bq24079QW-Q1 device contains internal safety timers for the pre-charge and fast-charge phases to prevent
potential damage to the battery and the system. The timers begin at the start of the respective charge cycles.
The timer values are programmed by connecting a resistor from TMR to VSS. The resistor value is calculated
using the following equation:
tPRECHG = KTMR × RTMR
(4)
(5)
tMAXCHG = 10 × KTMR × RTMR
Leave TMR unconnected to select the internal default timers. Disable the timers by connecting TMR to VSS.
Note that timers are suspended when the device is in thermal shutdown, and the timers are slowed proportionally
to the charge current when the device enters thermal regulation.
During the fast charge phase, several events increase the timer durations.
A. The system load current activates the DPPM loop which reduces the available charging current
B. The input current is reduced because the input voltage has fallen to VIN(LOW)
C. The device has entered thermal regulation because the IC junction temperature has exceeded TJ(REG)
During each of these events, the internal timers are slowed down proportionately to the reduction in charging
current. For example, if the charging current is reduced by half, the timer clock is reduced to half the frequency,
and the counter counts half as fast.
If the pre charge timer expires before the battery voltage reaches VLOWV, the bq24079QW-Q1 indicates a fault
condition. Additionally, if the battery current does not fall to ITERM before the fast charge timer expires, a fault is
indicated. The CHG output flashes at approximately 2 Hz to indicate a fault condition. The fault condition is
cleared by toggling CE or the input power, entering/ exiting USB suspend mode, or an OVP event.
9.3.5.5 Status Indicators (PGOOD, CHG)
The bq24079QW-Q1 contains two open-drain outputs that signal its status. The PGOOD output signals when a
valid input source is connected. PGOOD is low when (VBAT + VIN(DT)) < VIN < VOVP. When the input voltage is
outside of this range, PGOOD is high impedance.
The charge cycle after power-up, CE going low or exiting OVP is indicated with the CHG pin on (low - LED on),
whereas all refresh (subsequent) charges will result in the CHG pin off (open - LED off). In addition, the CHG
signals timer faults by flashing at approximately 2 Hz.
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23
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www.ti.com.cn
Feature Description (接下页)
表 1. PGOOD Status Indicator
INPUT STATE
VIN < VUVLO
PGOOD OUTPUT
Hi impedance
Hi impedance
Low
VUVLO < VIN < VBAT + VIN(DT)
VBAT + VIN(DT) < VIN < VOVP
VIN > VOVP
Hi impedance
表 2. CHG Status Indicator
CHARGE STATE
Charging
CHG OUTPUT
Low (for first charge cycle)
Flashing at 2Hz
Charging suspended by thermal loop
Safety timers expired
Charging done
Recharging after termination
IC disabled or no valid input power
Battery absent
Hi impedance
9.3.5.6 Thermal Regulation And Thermal Shutdown
The bq24079QW-Q1 contain a thermal regulation loop that monitors the die temperature. If the temperature
exceeds TJ(REG), the device automatically reduces the charging current to prevent the die temperature from
increasing further. In some cases, the die temperature continues to rise despite the operation of the thermal loop,
particularly under high VIN and heavy OUT system load conditions. Under these conditions, if the die
temperature increases to TJ(OFF), the input FET Q1 is turned OFF. FET Q2 is turned ON to ensure that the
battery still powers the load on OUT. Once the device die temperature cools by TJ(OFF-HYS), the input FET Q1 is
turned on and the device returns to thermal regulation. Continuous overtemperature conditions result in a
"hiccup" mode. During thermal regulation, the safety timers are slowed down proportionately to the reduction in
current limit.
Note that this feature monitors the die temperature of the bq24079QW-Q1. This is not synonymous with ambient
temperature. Self heating exists due to the power dissipated in the IC because of the linear nature of the battery
charging algorithm and the LDO associated with OUT. A modified charge cycle with the thermal loop active is
shown in 图 24. Battery termination is disabled during thermal regulation.
24
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bq24079QW-Q1
www.ti.com.cn
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
PRECHARGE
THERMAL
CC FAST
CHARGE
CV TAPER
DONE
REGULATION
V
O(REG)
I
O(CHG)
Battery Voltage
Battery Current
V
(LOWV)
HI-z
I
(PRECHG)
I
(TERM)
T
J(REG)
IC Junction Temperature, T
J
图 24. Charge Cycle Modified by Thermal Loop
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25
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ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
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9.3.6 Battery Pack Temperature Monitoring
The bq24079QW-Q1 features an external battery pack temperature monitoring input. The TS input connects to
the NTC thermistor in the battery pack to monitor battery temperature and prevent dangerous over-temperature
conditions. During charging, INTC is sourced to TS and the voltage at TS is continuously monitored. If, at any
time, the voltage at TS is outside of the operating range (VCOLD to VHOT), charging is suspended. The timers
maintain their values but suspend counting. When the voltage measured at TS returns to within the operation
window, charging is resumed and the timers continue counting. When charging is suspended due to a battery
pack temperature fault, the CHG pin remains low and continues to indicate charging.
For applications that do not require the TS monitoring function, connect a 10 kΩ resistor from TS to VSS to set
the TS voltage at a valid level and maintain charging.
The allowed temperature range for 103AT-2 type thermistor is 0°C to 50°C. However, the user may increase the
range by adding two external resistors. See 图 25 for the circuit details. The values for Rs and Rp are calculated
using the following equations:
æ
ö
ì
ü
ý
þ
VH ´ VC
-(RTH + RTC ) ±
(RTH+RTC )2 - 4 R
´ RTC
+
´(RTC - RTH )
ç
÷
í
TH
ç
÷
(VH - VC ) ´ ITS
î
è
ø
Rs =
2
(6)
(7)
V ´ R + RS
(
)
ITS ´ R + RS - V
H
TH
Rp =
(
)
TH
H
Where:
RTH: Thermistor Hot Trip Value found in thermistor data sheet
RTC: Thermistor Cold Trip Value found in thermistor data sheet
VH: IC's Hot Trip Threshold = 0.3 V nominal
VC: IC's Cold Trip Threshold = 2.1 V nominal
ITS: IC's Output Current Bias = 75 µA nominal
NTC Thermsitor Semitec 103AT-4
Rs and Rp 1% values were chosen closest to calculated values
COLD TEMP RESISTANCE
HOT TEMP RESISTANCE AND
EXTERNAL BIAS RESISTOR,
EXTERNAL BIAS RESISTOR,
AND TRIP THRESHOLD, Ω (°C)
TRIP THRESHOLD, Ω (°C)
Rs (Ω)
Rp (Ω)
28000 (–0.6)
28480 (–1)
28480 (–1)
33890 (–5)
33890 (–5)
33890 (–5)
4000 (51)
3536 (55)
3021 (60)
4026 (51)
3536 (55)
3021 (60)
0
∞
487
845000
549000
158000
150000
140000
1000
76.8
576
1100
RHOT and RCOLD are the thermistor resistance at the desired hot and cold temperatures, respectively.
注
Note that the temperature window cannot be tightened more than using only the thermistor
connected to TS, it can only be extended.
26
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bq24079QW-Q1
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ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
INTC
bq24079QW-Q1
RS
PACK+
TS
TEMP
+
VCOLD
RP
PACK-
+
VHOT
Copyright © 2017, Texas Instruments Incorporated
图 25. Extended TS Pin Thresholds
9.3.7 Half-Wave Adaptors
Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the
battery voltage during part of the cycle. To enable operation with adapters under those conditions, the
bq24079QW-Q1 keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep
mode. This feature enables use of external adapters using 50-Hz networks. The input must not drop below the
UVLO voltage for the charger to work properly. Thus, the battery voltage should be above the UVLO to help
prevent the input from dropping out. Additional input capacitance may be needed.
9.4 Device Functional Modes
9.4.1 Sleep Mode
When the input is between UVLO and VIN(DT), the device enters sleep mode. After entering sleep mode for >20
ms, the internal FET connection between the IN and OUT pin is disabled, and pulling the input to ground will not
discharge the battery other than the leakage on the BAT pin. If one has a full 1000-mAHr battery and the leakage
is 10 μA, then it would take 1000 mAHr/10 μA = 100000 hours (11.4 years) to discharge the battery. The
battery’s self discharge is typically 5 times higher than this.
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10 Application and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
The bq24079QW-Q1 devices power the system while simultaneously and independently charging the battery.
The input power source for charging the battery and running the system can be an AC adapter or a USB port.
The devices feature dynamic power-path management (DPPM), which shares the source current between the
system and battery charging and automatically reduces the charging current if the system load increases. When
charging from a USB port, the input dynamic power management (VIN-DPM) circuit reduces the input current
limit if the input voltage falls below a threshold, preventing the USB port from crashing. The power-path
architecture also permits the battery to supplement the system current requirements when the adapter cannot
deliver the peak system currents. The bq24079QW-Q1 is configurable to be host controlled for selecting different
input current limits based on the input source connected, or a fully stand alone device for applications that do not
support multiple types of input sources.
10.2 Typical Application – bq24079QW-Q1 Charger Design Example
See 图 26 for Schematics of the Design Example.
VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, Battery Temperature Charge Range = 0°C to 50°C,
6.25 hour Fastcharge Safety Timer
VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, ITERM = 110 mA, Battery Temperature Charge
Range = 0°C to 50°C, Safety Timers disabled
VIN = UVLO to VOVP, IFASTCHG = 800 mA, IIN(MAX) = 1.3 A, Battery Temperature Charge Range = 0°C to 50°C,
6.25 hour Fastcharge Safety Timer
28
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bq24079QW-Q1
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Typical Application – bq24079QW-Q1 Charger Design Example (接下页)
R4
1.5 kW
R5
1.5 kW
SYSTEM
Adaptor
DC+
IN
OUT
C2
4.7 mF
C1
1 mF
GND
VSS
bq24079QW-Q1
HOST
EN2
EN1
TS
SYSOFF
CE
BAT
C3
4.7 mF
PACK+
TEMP
R1
46.4 kW
R2
1.18 kW
R3
1.13 kW
PACK-
Copyright © 2017, Texas Instruments Incorporated
图 26. Using bq24079QW-Q1 to Disconnect the Battery from the System
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Typical Application – bq24079QW-Q1 Charger Design Example (接下页)
10.2.1 Design Requirements
•
•
•
•
•
•
Supply voltage = 5 V
Fast charge current of approximately 800 mA; ISET - pin 16
Input Current Limit =1.3 A; ILIM - pin 12
Termination Current Threshold = 110 mA
Safety timer duration, Fast-Charge = 6.25 hours; TMR – pin 14
TS – Battery Temperature Sense = 10-kΩ NTC (103AT-2)
10.2.2 Detailed Design Procedure
10.2.2.1 Calculations
10.2.2.1.1 Program the Fast Charge Current (ISET):
RISET = KISET / ICHG
KISET = 890 AΩ from the electrical characteristics table.
RISET = 890 AΩ/0.8 A = 1.1125 kΩ
Select the closest standard value, which for this case is 1.13 kΩ. Connect this resistor between ISET (pin 16)
and VSS
.
10.2.2.1.2 Program the Input Current Limit (ILIM)
RILIM = KILIM / II_MAX
KILIM = 1550 AΩ from the electrical characteristics table.
RISET = 1550 AΩ / 1.3 A = 1.192 kΩ
Select the closest standard value, which for this case is 1.18 kΩ. Connect this resistor between ILIM (pin 12) and
VSS
.
10.2.2.1.3 Program 6.25-hour Fast-Charge Safety Timer (TMR)
RTMR = tMAXCHG / (10 × KTMR
)
KTMR = 48 s/kΩ from the electrical characteristics table.
RTMR = (6.25 hr × 3600 s/hr) / (10 × 48 s/kΩ) = 46.8 kΩ
Select the closest standard value, which for this case is 46.4 kΩ. Connect this resistor between TMR (pin 2) and
VSS
.
10.2.2.2 TS Function
Use a 10-kΩ NTC thermistor in the battery pack (103AT-2). For applications that do not require the TS
monitoring function, connect a 10-kΩ resistor from TS to VSS to set the TS voltage at a valid level and maintain
charging.
30
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Typical Application – bq24079QW-Q1 Charger Design Example (接下页)
10.2.2.3 CHG and PGOOD
LED Status: connect a 1.5-kΩ resistor in series with a LED between OUT and CHG to indicate charging status.
Connect a 1.5-kΩ resistor in series with a LED between OUT and PGOOD to indicate when a valid input source
is connected.
Processor Monitoring Status: connect a pullup resistor (on the order of 100 kΩ) between the processor’s power
rail and CHG and PGOOD
10.2.2.4 System ON/OFF (SYSOFF)
Connect SYSOFF high to disconnect the battery from the system load. Connect SYSOFF low for normal
operation
10.2.2.5 Selecting In, Out And Bat Pin Capacitors
In most applications, all that is needed is a high-frequency decoupling capacitor (ceramic) on the power pin,
input, output and battery pins. Using the values shown on the application diagram, is recommended. After
evaluation of these voltage signals with real system operational conditions, one can determine if capacitance
values can be adjusted toward the minimum recommended values (DC load application) or higher values for fast
high amplitude pulsed load applications. Note if designed high input voltage sources (bad adaptors or wrong
adaptors), the capacitor needs to be rated appropriately. Ceramic capacitors are tested to 2x their rated values
so a 16-V capacitor may be adequate for a 30-V transient (verify tested rating with capacitor manufacturer).
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Typical Application – bq24079QW-Q1 Charger Design Example (接下页)
10.2.3 Application Curves
VIN = 6 V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
VIN
5 V/div
VCHG
5 V/div
1 A/div
Charging Initiated
VOUT
4.4 V
500 mV/div
5 V/div
VBAT
IBAT
3.6 V
VPGOOD
2 V/div
VBAT
Battery Inserted
500 mA/div
IBAT
Battery Detection Mode
400 ms/div
4 ms/div
RLOAD = 10 Ω
图 27. Adapter Plug-in Battery Connected
图 28. Battery Detection Battery Inserted
VCHG
5 V/div
IOUT
500 mA/div
1 A/div
IBAT
IBAT
500 mA/div
200 mV/div
VOUT
4.4 V
2 V/div
Battery
Removed
VBAT
Battery Detection Mode
400 ms/div
400 ms/div
RLOAD = 20 Ω to 9 Ω
图 29. Battery Detection Battery Removed
图 30. Entering And Exiting DPPM Mode
VCE
5 V/div
10 V/div
VIN
VCHG
5 V/div
1 V/div
VOUT
4.4 V
VBAT
VBAT
500 mV/div
4.1 V
3.6 V
Mandatory Precharge
IBAT
500 mA/div
IBAT
1 A/div
10 ms/div
40 ms/div
RLOAD = 10 Ω
VIN = 6 V to 15 V
图 31. Charger ON/OF Using CE
图 32. OVP Fault
32
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ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
Typical Application – bq24079QW-Q1 Charger Design Example (接下页)
VIN = 6 V, EN1 = 1, EN2 = 0, TA = 25°C, unless otherwise noted.
VSYSOFF
5 V/div
5 V/div
VSYSOFF
VBAT
VOUT
4 V
5.5 V
2 V/div
VBAT
2 V/div
VOUT
4 V
Battery Powering
System
500 mA/div
System Power Off
IBAT
IBAT
500 mA/div
4 ms/div
400 ms/div
VIN = 0 V
VIN = 6 V
图 34. System On/off With Input Not Connected -
图 33. System On/off With Input Connected - bq24079QW-
bq24079QW-Q1
Q1
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www.ti.com.cn
11 Power Supply Recommendations
Some adapters implement a half rectifier topology, which causes the adapter output voltage to fall below the
battery voltage during part of the cycle. To enable operation with adapters under those conditions, the
bq24079QW-Q1 keeps the charger on for at least 20 msec (typical) after the input power puts the part in sleep
mode. This feature enables use of external adapters using 50-Hz networks. The input must not drop below the
UVLO voltage for the charger to work properly. Thus, the battery voltage should be above the UVLO to help
prevent the input from dropping out. Additional input capacitance may be needed.
34
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ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
12 Layout
12.1 Layout Guidelines
•
To obtain optimal performance, the decoupling capacitor from IN to GND (thermal pad) and the output filter
capacitors from OUT to GND (thermal pad) should be placed as close as possible to the bq24079QW-Q1,
with short trace runs to both IN, OUT and GND (thermal pad).
•
All low-current GND connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
•
•
The high current charge paths into IN pin and from the OUT pin must be sized appropriately for the maximum
charge current in order to avoid voltage drops in these traces
The bq24079QW-Q1 is packaged in a thermally enhanced MLP package. The package includes a thermal
pad to provide an effective thermal contact between the IC and the printed circuit board (PCB); this thermal
pad is also the main ground connection for the device. Connect the thermal pad to the PCB ground
connection. Full PCB design guidelines for this package are provided in the application note entitled:
QFN/SON PCB Attachment Application Note (SLUA271).
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ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
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12.2 Layout Example
图 35.
36
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bq24079QW-Q1
www.ti.com.cn
ZHCSH01B –OCTOBER 2017–REVISED NOVEMBER 2018
12.3 Thermal Package
The bq24079QW-Q1 is packaged in a thermally enhanced MLP package. The package includes a thermal pad to
provide an effective thermal contact between the IC and the printed circuit board (PCB). The power pad should
be directly connected to the VSS pin. Full PCB design guidelines for this package are provided in the application
note entitled: QFN/SON PCB Attachment Application Note (SLUA271). The most common measure of package
thermal performance is thermal impedance (θJA ) measured (or modeled) from the chip junction to the air
surrounding the package surface (ambient). The mathematical expression for θJA is:
θJA = (TJ - T) / P
Where:
TJ = chip junction temperature
T = ambient temperature
P = device power dissipation
Factors that can influence the measurement and calculation of θJA include:
1. Whether or not the device is board mounted
2. Trace size, composition, thickness, and geometry
3. Orientation of the device (horizontal or vertical)
4. Volume of the ambient air surrounding the device under test and airflow
5. Whether other surfaces are in close proximity to the device being tested
Due to the charge profile of Li-Ion batteries the maximum power dissipation is typically seen at the beginning of
the charge cycle when the battery voltage is at its lowest. Typically after fast charge begins the pack voltage
increases to ≉3.4 V within the first 2 minutes. The thermal time constant of the assembly typically takes a few
minutes to heat up so when doing maximum power dissipation calculations, 3.4 V is a good minimum voltage to
use. This is verified, with the system and a fully discharged battery, by plotting temperature on the bottom of the
PCB under the IC (pad should have multiple vias), the charge current and the battery voltage as a function of
time. The fast charge current will start to taper off if the part goes into thermal regulation.
The device power dissipation, P, is a function of the charge rate and the voltage drop across the internal
PowerFET. It can be calculated from the following equation when a battery pack is being charged :
P = [V(IN) – V(OUT)] × I(OUT) + [V(OUT) – V(BAT)] × I(BAT)
(7)
The thermal loop feature reduces the charge current to limit excessive IC junction temperature. It is
recommended that the design not run in thermal regulation for typical operating conditions (nominal input voltage
and nominal ambient temperatures) and use the feature for non typical situations such as hot environments or
higher than normal input source voltage. With that said, the IC will still perform as described, if the thermal loop
is always active.
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13 器件和文档支持
13.1 器件支持
13.1.1 第三方产品免责声明
TI 发布的与第三方产品或服务有关的信息，不能构成与此类产品或服务或保修的适用性有关的认可，不能构成此类
产品或服务单独或与任何 TI 产品或服务一起的表示或认可。
13.2 文档支持
13.2.1 相关文档
请参阅如下相关文档：
•
《QFN/SON PCB 连接应用手册》(SLUA271)
13.3 接收文档更新通知
要接收文档更新通知，请转至 TI.com.cn 上您的器件的产品文件夹。请在右上角单击通知我 按钮进行注册，即可收
到产品信息更改每周摘要（如有）。有关更改的详细信息，请查看任意已修订文档的修订历史记录。
13.4 社区资源
下列链接提供到 TI 社区资源的连接。链接的内容由各个分销商“按照原样”提供。这些内容并不构成 TI 技术规范，
并且不一定反映 TI 的观点；请参阅 TI 的 《使用条款》。
TI E2E™ 在线社区 TI 的工程师对工程师 (E2E) 社区。此社区的创建目的在于促进工程师之间的协作。在
e2e.ti.com 中，您可以咨询问题、分享知识、拓展思路并与同行工程师一道帮助解决问题。
设计支持
TI 参考设计支持 可帮助您快速查找有帮助的 E2E 论坛、设计支持工具以及技术支持的联系信息。
13.5 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.6 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.7 术语表
SLYZ022 — TI 术语表。
这份术语表列出并解释术语、缩写和定义。
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更，恕不另行通知，且
不会对此文档进行修订。如需获取此数据表的浏览器版本，请查阅左侧的导航栏。
38
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PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
BQ24079QWRGTRQ1
BQ24079QWRGTTQ1
ACTIVE
ACTIVE
VQFN
VQFN
RGT
RGT
16
16
3000 RoHS & Green
250 RoHS & Green
SN
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
-40 to 125
-40 to 125
1COC
1COC
SN
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2021
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
BQ24079QWRGTRQ1
BQ24079QWRGTTQ1
VQFN
VQFN
RGT
RGT
16
16
3000
250
330.0
180.0
12.4
12.4
3.3
3.3
3.3
3.3
1.0
1.0
8.0
8.0
12.0
12.0
Q2
Q2
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Jan-2021
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
BQ24079QWRGTRQ1
BQ24079QWRGTTQ1
VQFN
VQFN
RGT
RGT
16
16
3000
250
367.0
213.0
367.0
191.0
38.0
35.0
Pack Materials-Page 2
PACKAGE OUTLINE
RGT0016J
VQFN - 1 mm max height
S
C
A
L
E
3
.
6
0
0
PLASTIC QUAD FLATPACK - NO LEAD
3.1
2.9
B
A
PIN 1 INDEX AREA
3.1
2.9
0.1 MIN
(0.05)
A
-
A
4
0
SECTION A-A
TYPICAL
C
1 MAX
SEATING PLANE
0.08
0.05
0.00
1.66 0.1
(0.2) TYP
5
8
EXPOSED
THERMAL PAD
12X 0.5
4
9
4X
SYMM
A
A
17
1.5
1
12
0.3
16X
0.2
13
16
0.1
C A B
PIN 1 ID
(OPTIONAL)
SYMM
0.05
0.5
0.3
16X
4224573/B 11/2018
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
www.ti.com
EXAMPLE BOARD LAYOUT
RGT0016J
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
1.66)
SYMM
13
16
16X (0.6)
12
1
16X (0.25)
SYMM
17
(2.8)
(0.58)
TYP
12X (0.5)
9
4
(
0.2) TYP
VIA
5
(0.58) TYP
8
(R0.05)
ALL PAD CORNERS
(2.8)
LAND PATTERN EXAMPLE
EXPOSED METAL SHOWN
SCALE:20X
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
SOLDER MASK
OPENING
METAL
EXPOSED
METAL
EXPOSED
METAL
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
NON SOLDER MASK
SOLDER MASK
DEFINED
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4224573/B 11/2018
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
5. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown
on this view. It is recommended that vias under paste be filled, plugged or tented.
www.ti.com
EXAMPLE STENCIL DESIGN
RGT0016J
VQFN - 1 mm max height
PLASTIC QUAD FLATPACK - NO LEAD
(
1.55)
16
13
16X (0.6)
1
12
16X (0.25)
17
SYMM
(2.8)
METAL
ALL AROUND
12X (0.5)
9
4
5
8
(R0.05) TYP
SYMM
(2.8)
SOLDER PASTE EXAMPLE
BASED ON 0.1 mm THICK STENCIL
THERMAL PAD 17:
87% PRINTED SOLDER COVERAGE BY AREA UNDER PACKAGE
SCALE:25X
4224573/B 11/2018
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
www.ti.com
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