8V182512IDGGREP [TI]
具有 18 位通用总线收发器的增强型产品 3.3V Abt 扫描测试设备 | DGG | 64 | -40 to 85;
| 型号： | 8V182512IDGGREP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有 18 位通用总线收发器的增强型产品 3.3V Abt 扫描测试设备 | DGG | 64 | -40 to 85 驱动 信息通信管理 测试 光电二极管 逻辑集成电路 触发器 总线驱动器 总线收发器 |
| 文件： | 总11页 (文件大小：311K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢑ
ꢐ
ꢍ
ꢅ
ꢒ
ꢓ
ꢆ
ꢈ
ꢉ
ꢍ
ꢓ
ꢔ
ꢆ
ꢕ
ꢎ
ꢖ
ꢔ
ꢀ
ꢆ
ꢎ
ꢕ
ꢎ
ꢗ
ꢙ ꢔꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚ ꢛꢆ ꢏ ꢛꢆꢀ
ꢆ
ꢕ
ꢒ
ꢁ
ꢀ
ꢘ
ꢎ
ꢔ
ꢅ
ꢎ
ꢕ
SCBS789− NOVEMBER 2003
D
D
D
D
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Thin Shrink Small-Outline (DGG) Package
DGG PACKAGE
(TOP VIEW)
Enhanced Product-Change Notification
†
Qualification Pedigree
1
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1OEAB
1CLKAB
1CLKENAB
GND
1OEBA
1CLKBA
1CLKENBA
GND
1B1
1B2
Member of the Texas Instruments
Widebus Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low Static-Power
Dissipation
2
3
D
4
5
1A1
1A2
6
7
V
V
CC
CC
D
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
8
1A3
1A4
1A5
GND
1A6
1A7
1A8
2A1
2A2
2A3
GND
2A4
2A5
2A6
1B3
1B4
1B5
GND
1B6
1B7
1B8
2B1
2B2
2B3
GND
2B4
2B5
2B6
9
3.3-V V
)
CC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
D
D
D
D
Supports Unregulated Battery Operation
Down To 2.7 V
Typical V
<0.8 V at V
(Output Ground Bounce)
= 3.3 V, T = 25°C
OLP
CC
A
I
and Power-Up 3-State Support Hot
off
Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
D
D
D
Distributed V
High-Speed Switching Noise
and GND Pins Minimize
CC
V
V
CC
CC
Flow-Through Architecture Optimizes PCB
Layout
2A7
2A8
GND
2B7
2B8
GND
2CLKENBA
2CLKBA
2OEBA
Latch-Up Performance Exceeds 500 mA Per
JESD 17
2CLKENAB
2CLKAB
2OEAB
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
description/ordering information
The SN74LVTH16952 is a 16-bit registered transceiver designed for low-voltage (3.3-V) V
the capability to provide a TTL interface to a 5-V system environment.
operation, but with
CC
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
ꢏ
ꢏ
ꢕ
ꢚ
ꢫ
ꢗ
ꢦ
ꢛ
ꢘ
ꢤ
ꢆ
ꢥ
ꢔ
ꢟ
ꢚ
ꢝ
ꢁ
ꢞ
ꢗ
ꢒ
ꢆ
ꢒ
ꢜ
ꢝ
ꢧ
ꢞ
ꢟ
ꢥ
ꢠ
ꢡ
ꢢ
ꢢ
ꢣ
ꢣ
ꢜ
ꢜ
ꢟ
ꢟ
ꢝ
ꢝ
ꢜ
ꢤ
ꢤ
ꢨ
ꢥ
ꢦ
ꢠ
ꢠ
ꢧ
ꢧ
ꢝ
ꢣ
ꢢ
ꢡ
ꢤ
ꢤ
ꢟ
ꢞ
ꢨ
ꢆꢧ
ꢦ
ꢩ
ꢤ
ꢪ
ꢜ
ꢥ
ꢢ
ꢤ
ꢣ
ꢜ
ꢣ
ꢟ
ꢠ
ꢝ
ꢦ
ꢫ
ꢢ
ꢝ
ꢣ
ꢣ
ꢧ
ꢤ
ꢑ
Copyright 2003, Texas Instruments Incorporated
ꢠ
ꢟ
ꢥ
ꢣ
ꢟ
ꢠ
ꢡ
ꢣ
ꢟ
ꢤ
ꢨ
ꢜ
ꢞ
ꢜ
ꢥ
ꢧ
ꢠ
ꢣ
ꢬ
ꢣ
ꢧ
ꢠ
ꢟ
ꢞ
ꢭ
ꢢ
ꢔ
ꢝ
ꢡ
ꢧ
ꢤ
ꢣ
ꢢ
ꢝ
ꢫ
ꢢ
ꢠ
ꢫ
ꢮ
ꢢ
ꢣ ꢧ ꢤ ꢣꢜ ꢝꢰ ꢟꢞ ꢢ ꢪꢪ ꢨꢢ ꢠ ꢢ ꢡ ꢧ ꢣ ꢧ ꢠ ꢤ ꢑ
ꢠ
ꢠ
ꢢ
ꢝ
ꢣ
ꢯ
ꢑ
ꢏ
ꢠ
ꢟ
ꢫ
ꢦ
ꢥ
ꢣ
ꢜ
ꢟ
ꢝ
ꢨ
ꢠ
ꢟ
ꢥ
ꢧ
ꢤ
ꢤ
ꢜ
ꢝ
ꢰ
ꢫ
ꢟ
ꢧ
ꢤ
ꢝ
ꢟ
ꢣ
ꢝ
ꢧ
ꢥ
ꢧ
ꢤ
ꢤ
ꢢ
ꢠ
ꢜ
ꢪ
ꢯ
ꢜ
ꢝ
ꢥ
ꢪ
ꢦ
ꢫ
ꢧ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢉ ꢊꢋ ꢌꢍ ꢎꢏ
ꢐꢑ ꢐꢍꢅ ꢒ ꢓꢆ ꢈ ꢉꢍ ꢓꢔ ꢆ ꢕꢎ ꢖ ꢔꢀ ꢆꢎ ꢕꢎ ꢗ ꢆꢕ ꢒꢁ ꢀꢘꢎ ꢔꢅꢎ ꢕ
ꢙꢔ ꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚꢛꢆ ꢏ ꢛꢆꢀ
SCBS789− NOVEMBER 2003
description/ordering information (continued)
This device can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is stored
in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input, provided that the clock-enable
(CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data
on either port.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
When V
is between 0 and 1.5 V, the device is in the high-impedance state during power up or power down.
CC
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup resistor;
CC
This device is fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry
off
off
disables the outputs, preventing damaging current backflow through the device when it is powered down. The
power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
−40°C to 85°C
TSSOP − DGG
Tape and reel
CLVTH16952IDGGREP
LH16952EP
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
†
FUNCTION TABLE
INPUTS
OUTPUT
B
CLKENAB CLKAB
OEAB
A
‡
‡
H
X
L
X
L
L
L
L
L
H
X
X
L
B
B
0
0
↑
↑
X
L
H
Z
L
H
X
X
†
‡
A-to-B data flow is shown; B-to-A data flow is similar, but
uses CLKENBA, CLKBA, and OEBA.
Level of B before the indicated steady-state input
conditions were established
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋ ꢌꢍ ꢎꢏ
ꢐ ꢑꢐ ꢍꢅ ꢒꢓꢆ ꢈ ꢉ ꢍꢓꢔ ꢆ ꢕꢎ ꢖꢔ ꢀꢆ ꢎꢕꢎꢗ ꢆ ꢕꢒꢁꢀ ꢘꢎ ꢔ ꢅꢎ ꢕ
ꢙ ꢔꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚ ꢛꢆ ꢏ ꢛꢆꢀ
SCBS789− NOVEMBER 2003
logic diagram (positive logic)
3
54
1CLKENAB
1CLKENBA
2
55
1CLKAB
1CLKBA
1
56
1OEBA
1OEAB
One of Eight
Channels
C1
CE
1D
52
5
1B1
1A1
C1
CE
1D
To Seven Other Channels
26
31
2CLKENBA
2CLKENAB
27
30
2CLKBA
2CLKAB
28
29
2OEBA
2OEAB
One of Eight
Channels
C1
CE
1D
42
15
2B1
2A1
C1
CE
1D
To Seven Other Channels
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢉ ꢊꢋ ꢌꢍ ꢎꢏ
ꢐꢑ ꢐꢍꢅ ꢒ ꢓꢆ ꢈ ꢉꢍ ꢓꢔ ꢆ ꢕꢎ ꢖ ꢔꢀ ꢆꢎ ꢕꢎ ꢗ ꢆꢕ ꢒꢁ ꢀꢘꢎ ꢔꢅꢎ ꢕ
ꢙꢔ ꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚꢛꢆ ꢏ ꢛꢆꢀ
SCBS789− NOVEMBER 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
Voltage range applied to any output in the high state, V (see Note 1) . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Current into any output in the low state, I
Current into any output in the high state, I (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
O
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Package thermal impedance, θ (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
JA
stg
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and V > V
.
CC
O
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
MIN
2.7
2
MAX
UNIT
V
V
V
V
V
Supply voltage
3.6
CC
High-level input voltage
Low-level input voltage
Input voltage
V
IH
0.8
5.5
−32
64
V
IL
V
I
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
mA
mA
ns/V
µs/V
°C
OH
OL
∆t/∆v
∆t/∆V
Outputs enabled
10
200
−40
CC
T
A
Operating free-air temperature
85
NOTE 4: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋ ꢌꢍ ꢎꢏ
ꢐ ꢑꢐ ꢍꢅ ꢒꢓꢆ ꢈ ꢉ ꢍꢓꢔ ꢆ ꢕꢎ ꢖꢔ ꢀꢆ ꢎꢕꢎꢗ ꢆ ꢕꢒꢁꢀ ꢘꢎ ꢔ ꢅꢎ ꢕ
ꢙ ꢔꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚ ꢛꢆ ꢏ ꢛꢆꢀ
SCBS789− NOVEMBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
TYP
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V
V
V
V
V
= 2.7 V,
I = −18 mA
−1.2
V
IK
CC
CC
CC
CC
I
= 2.7 V to 3.6 V,
= 2.7 V,
I
I
I
I
I
I
I
I
= −100 µA
= −8 mA
= −32 mA
= 100 µA
= 24 mA
= 16 mA
= 32 mA
= 64 mA
V
−0.2
OH
OH
OH
OL
OL
OL
OL
OL
CC
2.4
2
V
OH
V
V
= 3 V,
0.2
0.5
0.4
0.5
0.55
1
V
= 2.7 V
CC
CC
V
OL
V
= 3 V
V
V
= 3.6 V,
V = V or GND
I CC
Control
inputs
CC
= 0 or 3.6 V,
V = 5.5 V
I
10
CC
V = 5.5 V
I
20
I
I
µA
A or B
ports
V = V
1
V
CC
= 3.6 V
I
CC
‡
V = 0
I
−5
I
I
V
V
= 0,
V or V = 0 to 4.5 V
100
µA
µA
off
CC
I
O
V = 0.8 V
I
75
= 3 V
CC
V = 2 V
I
−75
A or B ports
I(hold)
§
V
V
V
= 3.6 V ,
V = 0 to 3.6 V
I
500
100
CC
CC
CC
= 0 to 1.5 V, V = 0.5 V to 3 V, OE = don’t care
O
µA
µA
I
I
OZPU
= 1.5 V to 0, V = 0.5 V to 3 V, OE = don’t care
O
100
0.19
5
OZPD
Outputs high
Outputs low
I
V
= 3.6 V, I = 0, V = V
CC
or GND
mA
CC
CC
CC
O
I
Outputs disabled
0.19
0.2
¶
V
= 3 V to 3.6 V, One input at V
CC
− 0.6 V, Other inputs at V
or GND
mA
pF
pF
∆I
CC
CC
C
C
V = 3 V or 0
4
i
I
V
O
= 3 V or 0
10
io
†
‡
§
¶
All typical values are at V
= 3.3 V, T = 25°C.
A
CC
Unused pins at V
or GND
CC
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V or GND.
CC
timing requirements over recommended operating free-air temperature range (unless otherwise
noted) (see Figure 1)
V = 3.3 V
CC
0.3 V
V
CC
= 2.7 V
UNIT
MIN MAX
150
MIN
MAX
f
t
Clock frequency
Pulse duration
150
MHz
ns
clock
CLK high or low
3.3
1.7
2
3.3
2.5
2.8
0
w
A or B before CLK
CLKEN before CLK
A or B after CLK
CLKEN after CLK
t
Setup time
Hold time
ns
ns
su
h
0.8
0.4
t
0
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢉ ꢊꢋ ꢌꢍ ꢎꢏ
ꢐꢑ ꢐꢍꢅ ꢒ ꢓꢆ ꢈ ꢉꢍ ꢓꢔ ꢆ ꢕꢎ ꢖ ꢔꢀ ꢆꢎ ꢕꢎ ꢗ ꢆꢕ ꢒꢁ ꢀꢘꢎ ꢔꢅꢎ ꢕ
ꢙꢔ ꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚꢛꢆ ꢏ ꢛꢆꢀ
SCBS789− NOVEMBER 2003
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
V
= 3.3 V
CC
0.3 V
V
= 2.7 V
MAX
CC
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
†
MIN TYP
MAX
MIN
f
t
t
t
t
t
t
150
150
MHz
ns
max
PLH
PHL
PZH
PZL
PHZ
PLZ
1.3
1.3
1
2.7
2.7
2.3
2.4
3.9
3.5
4
4
4.4
4.4
4.9
4.9
6.2
5.3
CLKBA or CLKAB
OEBA or OEAB
OEBA or OEAB
A or B
A or B
A or B
4
ns
ns
1
4
2.1
2.1
5.7
5.1
†
All typical values are at V
CC
= 3.3 V, T = 25°C.
A
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢊꢋ ꢌꢍ ꢎꢏ
ꢐ ꢑꢐ ꢍꢅ ꢒꢓꢆ ꢈ ꢉ ꢍꢓꢔ ꢆ ꢕꢎ ꢖꢔ ꢀꢆ ꢎꢕꢎꢗ ꢆ ꢕꢒꢁꢀ ꢘꢎ ꢔ ꢅꢎ ꢕ
ꢙ ꢔꢆ ꢇ ꢐ ꢍꢀꢆꢒꢆ ꢎ ꢚ ꢛꢆ ꢏ ꢛꢆꢀ
SCBS789− NOVEMBER 2003
PARAMETER MEASUREMENT INFORMATION
6 V
TEST
S1
S1
Open
500 Ω
From Output
Under Test
t
/t
PLH PHL
Open
GND
t
/t
6 V
PLZ PZL
C
= 50 pF
t
/t
GND
L
PHZ PZH
500 Ω
(see Note A)
2.7 V
0 V
Timing Input
Data Input
1.5 V
LOAD CIRCUIT
t
w
t
t
su
h
2.7 V
2.7 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0 V
2.7 V
0 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
t
t
t
PHL
t
t
PLZ
PLH
PHL
PZL
Output
Waveform 1
S1 at 6 V
V
3 V
OH
1.5 V
1.5 V
1.5 V
1.5 V
Output
V
+ 0.3 V
OL
V
OL
(see Note B)
V
OL
t
t
t
PZH
PHZ
PLH
Output
Waveform 2
S1 at GND
V
OH
V
OH
V
− 0.3 V
OH
1.5 V
1.5 V
Output
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
CLVTH16952IDGGREP
V62/04719-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
56
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
DGG
56
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVTH16952-EP :
Catalog: SN74LVTH16952
Military: SN54LVTH16952
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
•
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
CLVTH16952IDGGREP TSSOP
DGG
56
2000
330.0
24.4
8.6
15.6
1.8
12.0
24.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Aug-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP DGG 56
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 41.0
CLVTH16952IDGGREP
2000
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Amplifiers
Data Converters
DSP
Clocks and Timers
Interface
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/audio
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
Logic
Military
Power Mgmt
Microcontrollers
RFID
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Optical Networking
Security
Telephony
Video & Imaging
Wireless
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
RF/IF and ZigBee® Solutions www.ti.com/lprf
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2008, Texas Instruments Incorporated
相关型号：
8V182646AIPMREP
LVT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PQFP64, PLASTIC, LQFP-64
TI
8V18512IDGGREP
LVT SERIES, DUAL 9-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PDSO64, PLASTIC, TSSOP-64
TI
©2020 ICPDF网 联系我们和版权申明