74FCT162952ETPACT [TI]

16-Bit Registered Transceivers; 16位寄存收发器
74FCT162952ETPACT
型号: 74FCT162952ETPACT
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

16-Bit Registered Transceivers
16位寄存收发器

总线驱动器 总线收发器 触发器 逻辑集成电路 光电二极管
文件: 总8页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
1CY74FCT162H952  
T
Data sheet acquired from Cypress Semiconductor Corporation.  
Data sheet modified to remove devices not offered.  
CY74FCT16952T  
CY74FCT162952T  
CY74FCT162H952T  
SCCS065A - August 1994 - Revised March 2000  
16-Bit Registered Transceivers  
Eliminates the need for external pull-up or pull-down  
Features  
resistors  
FCT-E speed at 3.7 ns  
Power-off disable outputs permits live insertion  
Functional Description  
Edge-rate control circuitry for significantly improved  
These 16-bit registered transceivers are high-speed,  
low-power devices. 16-bit operation is achieved by connecting  
the control lines of the two 8-bit registered transceivers  
together. For data flow from bus A-to-B, CEAB must be LOW  
to allow data to be stored when CLKAB transitions from  
LOW-to-HIGH. The stored data will be present on the output  
when OEAB is LOW. Control of data from B-to-A is similar and  
is controlled by using the CEBA, CLKBA, and OEBA inputs.  
The output buffers are designed with a power-off disable  
feature to allow for live insertion of boards.  
noise characteristics  
Typical output skew < 250 ps  
ESD > 2000V  
TSSOP (19.6-mil pitch) and SSOP (25-mil pitch)  
packages  
Industrial temperature range of –40˚C to +85˚C  
VCC = 5V ± 10%  
CY74FCT16952T Features:  
64 mA sink current, 32 mA source current  
Typical VOLP (ground bounce) <1.0V at  
VCC = 5V, TA = 25˚C  
The CY74FCT16952T is ideally suited for driving  
high-capacitance loads and low-impedance backplanes.  
The CY74FCT162952T has 24-mA balanced output drivers  
with current-limiting resistors in the outputs. This reduces the  
need for external terminating resistors and provides for  
minimal undershoot and reduced ground bounce. The  
CY74FCT162952T is ideal for driving transmission lines.  
CY74FCT162952T Features:  
Balanced 24 mA output drivers  
Reduced system switching noise  
Typical VOLP (ground bounce) <0.6V at  
The CY74FCT162H952T is a 24-mA balanced output part that  
has “bus hold” on the data inputs. The device retains the  
input’s last state whenever the input goes to high impedance.  
This eliminates the need for pull-up/down resistors and  
prevents floating inputs.  
VCC = 5V, TA= 25˚C  
CY74FCT162H952T Features:  
Bus hold retains last active state  
Pin Configuration  
LogicBlock Diagrams  
SSOP/TSSOP  
Top View  
OEAB  
1
2
56  
55  
OEBA  
CLKBA  
1
1
1
CEBA  
CEBA  
2
1
CLKAB  
CEAB  
1
CEBA  
3
4
54  
53  
1
1
CLKBA  
OEAB  
CLKBA  
OEAB  
1
2
GND  
A
GND  
B
1
2
2
5
6
7
52  
51  
50  
1
1
1
1
CEAB  
CEAB  
1
B
2
A
1
1
2
V
V
CC  
CC  
A
CLKAB  
OEBA  
CLKAB  
OEBA  
2
1
2
B
3
8
9
49  
48  
1
3
1
A
B
4
1
1
4
1
B
5
A
5
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
1
C
C
1
A
A
2 1  
CE  
D
CE  
D
GND  
B
1
1
GND  
A
B
B
2
1
1
1
1
1
6
1
1
6
C
CE  
D
C
CE  
D
A
7
B
7
A
B
1 8  
1
8
A
B
2 1  
2
1
B
A
2
2
2
2
2
B
3
A
FCT16952–1  
FCT16952–2  
2
3
GND  
A
GND  
B
TO 7 OTHER CHANNELS  
TO 7 OTHER CHANNELS  
2
4
2
4
A
5
B
2 5  
2
B
A
2
6
2
6
V
CC  
V
CC  
B
7
A
2
2
2
7
B
8
A
24  
25  
26  
27  
28  
33  
32  
31  
30  
29  
2
8
GND  
CEAB  
GND  
CEBA  
2
2
CLKAB  
CLKBA  
OEBA  
2
2
2
OEAB  
2
FCT16952–3  
Copyright © 2000, Texas Instruments Incorporated  
CY74FCT16952T  
CY74FCT162952T  
CY74FCT162H952T  
Maximum Ratings[5, 6]  
Pin Description  
Name  
Description  
(Above which the useful life may be impaired. For user  
guidelines, not tested.)  
OEAB  
OEBA  
CEAB  
CEBA  
CLKAB  
CLKBA  
A
A-to-B Output Enable Input (Active LOW)  
B-to-A Output Enable Input (Active LOW)  
A-to-B Clock Enable Input (Active LOW)  
B-to-A Clock Enable Input (Active LOW)  
A-to-B Clock Input  
Storage Temperature ................................. –55°C to +125°C  
Ambient Temperature with  
Power Applied............................................. –55°C to +125°C  
DC Input Voltage ........................................... –0.5V to +7.0V  
DC Output Voltage......................................... –0.5V to +7.0V  
B-to-A Clock Input  
DC Output Current  
(Maximum Sink Current/Pin) ........................60 to +120 mA  
A-to-B Data Inputs or B-to-A Three-State  
Outputs[1]  
Power Dissipation..........................................................1.0W  
B
B-to-A Data Inputs or A-to-B Three-State  
Outputs[1]  
Static Discharge Voltage............................................>2001V  
(per MIL-STD-883, Method 3015)  
Function Table[2, 3]  
For A-to-B (Symmetric with B-to-A)  
Inputs  
Operating Range  
Outputs  
Ambient  
Range  
Industrial  
Temperature  
VCC  
CEAB  
CLKAB  
OEAB  
A
X
X
L
B
B[4]  
B[4]  
L
–40°C to +85°C  
5V ± 10%  
H
X
L
X
L
L
L
L
L
H
L
H
X
H
X
X
Z
Notes:  
1. On the CY74FCT162H952T these pins have bus hold.  
2. A-to-B data flow is shown: B-to-A data flow is similar but uses, CEBA, CLKBA, and OEBA.  
3. H = HIGH Voltage Level.  
L = LOW Voltage Level.  
X = Don’t Care.  
= LOW-to-HIGH Transition.  
Z = HIGH Impedance.  
4. Level of B before the indicated steady-state input conditions were established.  
5. Operation beyond the limits set forth may impair the useful life of the device. Unless otherwise noted, these limits are over the operating free-air temperature range.  
6. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.  
2
CY74FCT16952T  
CY74FCT162952T  
CY74FCT162H952T  
Electrical Characteristics Over the Operating Range  
Parameter  
VIH  
Description  
Input HIGH Voltage  
Test Conditions  
Min.  
Typ.[7]  
Max.  
Unit  
V
2.0  
VIL  
VH  
VIK  
IIH  
Input LOW Voltage  
Input Hysteresis[8]  
0.8  
V
100  
mV  
V
Input Clamp Diode Voltage  
Input HIGH Current  
VCC=Min., IIN= –18 mA  
VCC=Max., VI=VCC  
–0.7  
–1.2  
±1  
Standard  
Bus Hold  
Standard  
Bus Hold  
µA  
±100  
±1  
IIL  
Input LOW Current  
VCC=Max., VI=GND  
µA  
µA  
µA  
µA  
mA  
±100  
IBBH  
IBBL  
Bus Hold Sustain Current on Bus Hold Input[9] VCC=Min. VI=2.0V  
–50  
+50  
VI=0.8V  
IBHHO  
IBHLO  
Bus Hold Overdrive Current on Bus Hold Input[9] VCC=Max., VI=1.5V  
TBD  
±1  
IOZH  
High Impedance Output Current (Three-State VCC=Max., VOUT=2.7V  
Output pins)  
µA  
µA  
IOZL  
High Impedance Output Current (Three-State VCC=Max., VOUT=0.5V  
Output pins)  
±1  
IOS  
IO  
Short Circuit Current[10]  
Output Drive Current[10]  
Power-Off Disable  
VCC=Max., VOUT=GND  
VCC=Max., VOUT=2.5V  
VCC=0V, VOUT4.5V[11]  
–80  
–50  
–140  
–200  
–180  
±1  
mA  
mA  
µA  
IOFF  
Output Drive Characteristics for CY74FCT16952T  
Parameter  
Description  
Test Conditions  
VCC=Min., IOH= –3 mA  
Min.  
2.5  
Typ.[7]  
3.5  
Max.  
Unit  
V
VOH  
Output HIGH Voltage  
VCC=Min., IOH= –15 mA  
VCC=Min., IOH= –32 mA  
VCC=Min., IOL=64 mA  
2.4  
3.5  
V
2.0  
3.0  
V
VOL  
Output LOW Voltage  
0.2  
0.55  
V
Output Drive Characteristics for CY74FCT162952T, CY74FCT162H952T  
Parameter  
IODL  
Description  
Output LOW Current[10]  
Output HIGH Current[10]  
Output HIGH Voltage  
Output LOW Voltage  
Test Conditions  
VCC=5V, VIN=VIH or VIL, VOUT=1.5V  
VCC=5V, VIN=VIH or VIL, VOUT=1.5V  
VCC=Min., IOH= –24 mA  
Min.  
60  
Typ.[7]  
115  
Max.  
150  
Unit  
mA  
mA  
V
IODH  
–60  
2.4  
–115  
3.3  
–150  
VOH  
VOL  
VCC=Min., IOL=24 mA  
0.3  
0.55  
V
Capacitance[8] (TA = +25˚C, f = 1.0 MHz)  
Parameter  
Description  
Input Capacitance  
Output Capacitance  
Test Conditions  
Typ.[7] Max.  
Unit  
pF  
CIN  
VIN = 0V  
4.5  
5.5  
6.0  
8.0  
COUT  
VOUT = 0V  
pF  
Note:  
7. Typical values are at VCC= 5.0V, TA= +25˚C ambient.  
8. This parameter is specified but not tested.  
9. Pins with bus hold are described in the Pin Description.  
10. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample  
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a  
high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests,  
IOS tests should be performed last.  
11. Tested at +25˚C.  
3
CY74FCT16952T  
CY74FCT162952T  
CY74FCT162H952T  
Power Supply Characteristics  
Parameter  
Description  
Test Conditions[12]  
VIN<0.2V  
Typ.[7]  
Max.  
Unit  
ICC  
Quiescent Power Supply Current VCC=Max.  
5
500  
µA  
VIN>VCC–0.2V  
ICC  
Quiescent Power Supply Current VCC=Max.  
(TTL inputs HIGH)  
VIN=3.4V[13]  
0.5  
75  
1.5  
mA  
ICCD  
Dynamic Power Supply  
Current[14]  
VCC=Max., One Input Toggling, VIN=VCC or  
50% Duty Cycle, Outputs Open, VIN=GND  
OEAB or OEBA=GND  
120  
µA/MHz  
IC  
Total Power Supply Current[15] VCC=Max., F1=5 MHz,  
F0 = 10 MHz (CLKAB)  
VIN=VCC or  
VIN=GND  
0.8  
1.3  
1.7  
3.2  
mA  
OEAB = CEAB = GND  
OEBA = VCC 50% Duty Cycle,  
Outputs Open, One Bit Toggling  
VIN=3.4V or  
VIN=GND  
VCC=Max., f0=10 MHz (CLKAB) VIN=VCC or  
3.8  
8.3  
6.5[16]  
f1=2.5 MHz,  
VIN=GND  
OEAB = CEAB = GND  
OEBA = VCC 50% Duty Cycle,  
Outputs Open,  
VIN=3.4V or  
VIN=GND  
20.0[16]  
Sixteen Bit Toggling  
Notes:  
12. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.  
13. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.  
14. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.  
15. IC  
IC  
= IQUIESCENT + IINPUTS + IDYNAMIC  
= ICC+ICCDHNT+ICCD(f0/2 + f1N1)  
ICC = Quiescent Current with CMOS input levels  
ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)  
DH = Duty Cycle for TTL inputs HIGH  
NT = Number of TTL inputs at DH  
ICCD = Dynamic Current caused by an input transition pair (HLH or LHL)  
f0  
f1  
= Clock frequency for registered devices, otherwise zero  
= Input signal frequency  
N1 = Number of inputs changing at f1  
All currents are in milliamps and all frequencies are in megahertz.  
16. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.  
4
CY74FCT16952T  
CY74FCT162952T  
CY74FCT162H952T  
Switching Characteristics Over the Operating Range[17]  
CY74FCT16952AT  
CY74FCT162952AT  
CY74FCT162H952AT  
CY74FCT162952BT  
Parameter  
Description  
Propagation Delay  
CLKAB, CLKBA to B, A  
Min.  
Max.  
Min.  
Max.  
Unit  
Fig. No.[18]  
tPLH  
tPHL  
2.0  
10.0  
2.0  
7.5  
ns  
1, 5  
tPZH  
tPZL  
Output Enable Time  
OEBA, OEAB to A, B  
1.5  
1.5  
2.5  
2.0  
3.0  
2.0  
3.0  
10.5  
10.0  
1.5  
1.5  
2.5  
1.5  
3.0  
2.0  
3.0  
8.0  
7.5  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
1, 7, 8  
tPHZ  
tPLZ  
Output Disable Time  
OEBA, OEAB to A, B  
1, 7, 8  
tSU  
tH  
tSU  
tH  
Set-Up Time, HIGH or LOW  
A, B to CLKAB, CLKBA  
4
4
Hold Time, HIGH or LOW  
A, B to CLKAB, CLKBA  
Set-Up Time, HIGH or LOW  
CEAB, CEBA to CLKAB, CLKBA  
4
Hold Time, HIGH or LOW  
CEAB, CEBA to CLKAB, CLKBA  
4
tW  
Pulse Width HIGH or LOW  
CLKAB or CLKBA[19]  
Output Skew[20]  
5
tSK(O)  
0.5  
0.5  
CY74FCT16952ET  
CY74FCT162952ET  
CY74FCT162H952ET  
CY74FCT16952CT  
CY74FCT162H952CT  
Parameter  
Description  
Min.  
Max.  
Min.  
Max.  
Unit  
Fig. No.[18]  
tPLH  
tPHL  
Propagation Delay  
CLKAB, CLKBA to B, A  
2.0  
6.3  
1.5  
3.7  
ns  
1, 5  
tPZH  
tPZL  
Output Enable Time  
OEBA, OEAB to A, B  
1.5  
1.5  
2.5  
1.5  
3.0  
2.0  
3.0  
7.0  
6.5  
1.5  
1.5  
1.5  
0
4.4  
3.6  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
1, 7, 8  
tPHZ  
tPLZ  
Output Disable Time  
OEBA, OEAB to A, B  
1, 7, 8  
tSU  
tH  
tSU  
tH  
Set-Up Time, HIGH or LOW  
A, B to CLKAB, CLKBA  
4
4
Hold Time, HIGH or LOW  
A, B to CLKAB, CLKBA  
Set-Up Time, HIGH or LOW  
CEAB, CEBA to CLKAB, CLKBA  
2.0  
0
4
Hold Time, HIGH or LOW  
CEAB, CEBA to CLKAB, CLKBA  
4
tW  
Pulse Width HIGH or LOW  
CLKAB or CLKBA[19]  
Output Skew[20]  
3.0  
5
tSK(O)  
0.5  
0.5  
Notes:  
17. Minimum limits are specified but not tested on Propagation Delays.  
18. See “Parameter Measurement Information” in the General Information section.  
19. This parameter is specified but not tested.  
20. Skew between any two outputs of the same package switching in the same direction. This parameter is ensured by design.  
5
CY74FCT16952T  
CY74FCT162952T  
CY74FCT162H952T  
Ordering Information CY74FCT16952  
Speed  
Package  
Name  
Operating  
Range  
(ns)  
Ordering Code  
Package Type  
56-Lead (300-Mil) SSOP  
3.7  
CY74FCT16952ETPVC/PVCT  
CY74FCT16952CTPACT  
O56  
Z56  
O56  
Industrial  
Industrial  
Industrial  
6.3  
56-Lead (240-Mil) TSSOP  
56-Lead (300-Mil) SSOP  
10.0  
CY74FCT16952ATPVC/PVCT  
Ordering Information CY74FCT162952  
Speed  
Package  
Name  
Operating  
Range  
(ns)  
Ordering Code  
74FCT162952ETPACT  
CY74FCT162952ETPVC  
74FCT162952ETPVCT  
CY74FCT162952BTPVC  
74FCT162952BTPVCT  
74FCT162952ATPACT  
Package Type  
3.7  
Z56  
O56  
O56  
O56  
O56  
Z56  
56-Lead (240-Mil) TSSOP  
56-Lead (300-Mil) SSOP  
56-Lead (300-Mil) SSOP  
56-Lead (300-Mil) SSOP  
56-Lead (300-Mil) SSOP  
56-Lead (240-Mil) TSSOP  
Industrial  
7.5  
Industrial  
Industrial  
10.0  
Ordering Information CY74FCT162H952  
Speed  
(ns)  
Package  
Operating  
Range  
Ordering Code  
74FCT162H952ETPACT  
74FCT162H952CTPVC/PVCT  
74FCT162H952ATPACT  
Name  
Package Type  
3.7  
6.3  
Z56  
56-Lead (240-Mil) TSSOP  
56-Lead (300-Mil) SSOP  
56-Lead (240-Mil) TSSOP  
Industrial  
Industrial  
Industrial  
O56  
Z56  
10.0  
6
CY74FCT16952T  
CY74FCT162952T  
CY74FCT162H952T  
Package Diagrams  
56-Lead Shrunk Small Outline Package O56  
56-Lead Thin Shrunk Small Outline Package Z56  
7
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
Customers are responsible for their applications using TI components.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
intellectual property right of TI covering or relating to any combination, machine, or process in which such  
semiconductor products or services might be or are used. TI’s publication of information regarding any third  
party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 2000, Texas Instruments Incorporated  

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