5962-9560302QCA [TI]

四路微功耗轨到轨输入和输出 CMOS 运算放大器 | J | 14 | -55 to 125;
5962-9560302QCA
型号: 5962-9560302QCA
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
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四路微功耗轨到轨输入和输出 CMOS 运算放大器 | J | 14 | -55 to 125

放大器 运算放大器 放大器电路
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LMC6464QML  
LMC6464QML Quad Micropower, Rail-to-Rail Input and Output CMOS Operational  
Amplifier  
Literature Number: SNOSAR8  
December 8, 2010  
LMC6464QML Quad  
Micropower, Rail-to-Rail Input and Output CMOS  
Operational Amplifier  
General Description  
Features  
The LMC6464 is a micropower version of the popular  
LMC6484, combining Rail-to-Rail Input and Output Range  
with very low power consumption.  
(Typical unless otherwise noted)  
Low offset voltage. 500µV  
Ultra Low Supply Currentꢀ 23 μA/Amplifier  
Operates from 3V to 15V single supply  
The LMC6464 provides an input common-mode voltage  
range that exceeds both rails. The rail-to-rail output swing of  
the amplifier, guaranteed for loads down to 25 KΩ, assures  
maximum dynamic signal range. This rail-to-rail performance  
of the amplifier, combined with its high voltage gain makes it  
unique among rail-to-rail amplifiers. The LMC6464 is an ex-  
cellent upgrade for circuits using limited common-mode range  
amplifiers.  
Rail-to-Rail Output Swing  
(within 10 mV of rail, VS = 5V and RL = 25 KΩ)  
Low Input Bias Current 150 fA  
Applications  
Battery Operated Circuits  
The LMC6464, with guaranteed specifications at 3V and 5V,  
is especially well-suited for low voltage applications. A quies-  
cent power consumption of 60 μW per amplifier (at VS = 3V)  
can extend the useful life of battery operated systems. The  
amplifier's 150 fA input current, low offset voltage of 0.25 mV,  
and 85 dB CMRR maintain accuracy in battery-powered sys-  
tems.  
Transducer Interface Circuits  
Portable Communication Devices  
Medical Applications  
Battery Monitoring  
Ordering Information  
NS Part Number  
SMD Part Number  
NS Package Number  
Package Description  
14LD Ceramic DIP  
LMC6464AMJ-QML  
5962–9560302QCA  
J14A  
© 2010 National Semiconductor Corporation  
201606  
www.national.com  
14-Pin Ceramic DIP  
20160602  
Top View  
Low-Power Two-Op-Amp Instrumentation Amplifier  
20160621  
www.national.com  
2
Absolute Maximum Ratings (Note 1)  
Supply Voltage (V+ − V)  
Differential Input Voltage  
Voltage at Input/Output Pin  
Current at Input Pin (Note 8)  
Current at Output Pin (Note 4), (Note 6)  
Current at Power Supply Pin  
Junction Temperature (Note 4), (Note 2)  
Power Dissipation (Note 2)  
LMC6464  
16V  
± Supply Voltage  
(V+) + 0.3V, (V) − 0.3V  
±5 mA  
±30 mA  
40 mA  
150°C  
6mW  
Thermal Resistance (Note 10)  
ꢀθJA  
14LD Ceramic DIP (Still Air)  
14LD Ceramic DIP (500LF/Min Air flow)  
ꢀθJC  
74°C/W  
37°C/W  
14LD Ceramic DIP  
8°C/W  
Storage Temperature Range  
−65°C TA +150°C  
260°C  
Lead Temp. (Soldering, 10 sec.)  
ESD Tolerance (Note 3)  
2.0 KV  
Recommended Operating Range  
(Note 1)  
3.0V V+ 15.5V  
−55°C TA +125°C  
Supply Voltage  
Operating Temperature Range  
Quality Conformance Inspection  
Mil-Std-883, Method 5005 - Group A  
Subgroup  
Description  
Static tests at  
Temp (°C)  
1
2
+25  
+125  
-55  
Static tests at  
3
Static tests at  
4
Dynamic tests at  
Dynamic tests at  
Dynamic tests at  
Functional tests at  
Functional tests at  
Functional tests at  
Switching tests at  
Switching tests at  
Switching tests at  
Settling time at  
Settling time at  
Settling time at  
+25  
+125  
-55  
5
6
7
+25  
+125  
-55  
8A  
8B  
9
+25  
+125  
-55  
10  
11  
12  
13  
14  
+25  
+125  
-55  
3
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LMC6464 Electrical Characteristics  
DC Parameters: 3 Volt  
The following conditions apply, unless otherwise specified. V+ = 3V, V= 0V, VCM = VO = V+/2 and RL > 1M.  
Sub-  
groups  
Symbol  
VIO  
Parameter  
Conditions  
Notes  
Min Max  
Units  
Input Offset Voltage  
0.8  
1.7  
mV  
mV  
pA  
pA  
pA  
pA  
dB  
dB  
V
1
2
IIB  
Input Bias Current  
(Note 9)  
(Note 9)  
(Note 9)  
(Note 9)  
25  
1
100  
25  
2
IIO  
Input Offset Current  
1
100  
60  
2, 3  
1
CMRR  
VCM  
VOp  
ICC  
Common Mode Rejection Ratio  
0V VCM 3.0V  
57  
2, 3  
1
Input Common Mode Voltage  
Range  
3.0  
2.9  
2.9  
2.8  
0.0  
0.1  
For CMRR 50 dB  
RL = 25Kto V+/2  
VO = V+/2  
V
2, 3  
1
Output Swing  
0.10  
0.15  
110  
140  
V
V
2, 3  
1
Supply Current  
µA  
µA  
mA  
mA  
mA  
mA  
2, 3  
1
ISC  
Output Short Circuit Current  
Sourcing  
VO = 0V  
8.0  
6.0  
23  
2, 3  
1
Sinking  
VO = 3V  
17  
2, 3  
DC Parameters: 5 Volt  
The following conditions apply, unless otherwise specified. V+ = 5V, V= 0V, VCM = VO = V+/2 and RL > 1M.  
Sub-  
groups  
Symbol  
VIO  
Parameter  
Conditions  
Notes  
Min Max  
Units  
Input Offset Voltage  
0.5  
mV  
mV  
pA  
pA  
pA  
pA  
dB  
dB  
V
1
2, 3  
1
1.4  
IIB  
Input Bias Current  
(Note 9)  
(Note 9)  
(Note 9)  
(Note 9)  
25  
100  
2, 3  
1
IIO  
Input Offset Current  
25  
100  
2, 3  
1
CMRR  
VCM  
VOp  
Common Mode Rejection Ratio  
70  
0V VCM 5.0V  
67  
2, 3  
1
Input Common-Mode Voltage  
Range  
5.25 -0.10  
5.00 0.00  
4.990 0.010  
4.980 0.020  
4.975 0.020  
4.965 0.035  
110  
For CMRR 50 dB  
RL = 100Kto V+/2  
RL = 25Kto V+/2  
VO = V+/2  
V
2, 3  
1
Output Swing  
V
V
2, 3  
1
V
V
2, 3  
1
ICC  
ISC  
Supply Current  
µA  
µA  
mA  
mA  
mA  
mA  
140  
2, 3  
1
Output Short Circuit Current  
Sourcing  
VO = 0V  
19  
15  
2, 3  
1
Sinking  
VO = 5V  
22  
17  
2, 3  
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4
DC Parameters: 15 Volt  
The following conditions apply, unless otherwise specified. V+ = 15V, V= 0V, VCM = VO = V+/2 and RL > 1M.  
Sub-  
groups  
Symbol  
VIO  
Parameter  
Conditions  
Notes  
Min  
Max  
Units  
Input Offset Voltage  
1.8  
2.3  
25  
mV  
mV  
pA  
pA  
pA  
pA  
dB  
dB  
V
1
2, 3  
1
IIB  
Input Bias Current  
(Note 9)  
(Note 9)  
(Note 9)  
(Note 9)  
100  
25  
2, 3  
1
IIO  
Input Offset Current  
100  
2, 3  
1
CMRR  
VCM  
Common Mode Rejection Ratio  
70  
67  
0V VCM 15.0V  
2, 3  
1
Input Common Mode Voltage  
Range  
15.25 -0.15  
For CMRR 50dB  
15.00 0.00  
V
2, 3  
1
5V V+ 15V  
+PSRR  
Positive Power Supply Rejection  
Ratio  
70  
67  
dB  
dB  
V- = 0V, VO = 2.5V  
2, 3  
-15V V- -5V  
-PSRR  
VOp  
Negative Power Supply  
Rejection Ratio  
70  
67  
dB  
dB  
1
V+ = 0V, VO = -2.5V  
2, 3  
RL = 100Kto V+/2  
RL = 25Kto V+/2  
VO = V+/2  
Output Swing  
14.975 0.025  
V
V
1
2, 3  
1
14.965 0.035  
14.900 0.050  
V
14.850 0.150  
V
2, 3  
1
ICC  
ISC  
Supply Current  
120  
µA  
µA  
mA  
mA  
mA  
mA  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
140  
2, 3  
1
Output Short Circuit Current  
Sourcing  
VO = 0V  
24  
17  
2, 3  
1
Sinking  
VO = 12V  
(Note 6)  
(Note 6)  
(Note 5)  
(Note 5)  
(Note 5)  
(Note 5)  
(Note 5)  
(Note 5)  
(Note 5)  
(Note 5)  
55  
45  
2, 3  
1
AV  
Large Signal Voltage Gain  
Sourcing  
110  
80  
RL = 100KΩ  
2, 3  
1
Sinking  
100  
70  
RL = 100KΩ  
2, 3  
1
Sourcing  
110  
70  
RL = 25KΩ  
2, 3  
1
Sinking  
95  
RL = 25KΩ  
60  
2, 3  
AC Parameters: 15 Volt  
The following conditions apply, unless otherwise specified.  
DC:  
V+ = 15V, V= 0V, VCM = VO = V+/2 and RL > 1M.  
Sub-  
groups  
Symbol  
Parameter Conditions  
Notes  
Min  
Max  
Units  
SR  
GBW  
Slew Rate  
Gain-Bandwidth  
(Note 7)  
(Note 7)  
15  
7.0  
60  
45  
V/mS  
V/mS  
KHz  
4
5, 6  
4
KHz  
5, 6  
5
www.national.com  
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is  
functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics. The guaranteed  
specifications apply only for the test conditions listed. Some performance characteristics may degrade when the device is not operated under the listed test  
conditions.  
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJmax (maximum junction temperature), θJA (package  
junction to ambient thermal resistance), and TA (ambient temperature). The maximum allowable power dissipation at any temperature is PDmax = (TJmax - TA)/  
θ
JA or the number given in the Absolute Maximum Ratings, whichever is lower.  
Note 3: Human body model, 1.5 kΩ in series with 100 pF.  
Note 4: Applies to both single supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the  
maximum allowed junction temperature of 150°C. Output currents in excess of ±30 mA over long term may adversely affect reliability.  
Note 5: VCM = 7.5V and RL connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 3.5V VO 7.5V.  
Note 6: Do not short circuit output to V+, when V+ is greater than 13V or reliability will be adversely affected.  
Note 7: Device configured as a Voltage Follower with a 10V input step. For positive slew, VI swing is 2.5V to 12.5V, VO is measured between 6.0V and 9.0V. For  
negative slew, VI swing is 12.5V to 2.5V, VO is measured between 9.0V and 6.0V.  
Note 8: Limiting input pin current is only necessary for input voltages that exceed absolute maximum input voltage ratings.  
Note 9: Limits are dictated by testing limitations and not device performance.  
Note 10: All numbers apply for packages soldered directly into a PC board.  
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6
 
 
 
 
 
 
 
 
 
 
Typical Performance Characteristics VS = +5V, Single Supply, TA = 25°C unless otherwise specified  
Supply Current vs. Supply Voltage  
Sourcing Current vs. Output Voltage  
20160630  
20160631  
Sourcing Current vs. Output Voltage  
Sourcing Current vs. Output Voltage  
20160632  
20160633  
Sinking Current vs. Output Voltage  
Sinking Current vs. Output Voltage  
20160634  
20160635  
7
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Sinking Current vs. Output Voltage  
Input Voltage Noise vs Frequency  
20160637  
20160636  
Input Voltage Noise vs. Input Voltage  
Input Voltage Noise vs. Input Voltage  
20160638  
20160639  
Input Voltage Noise vs. Input Voltage  
ΔVOS vs CMR  
20160640  
20160641  
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8
Input Voltage vs. Output Voltage  
Open Loop Frequency Response  
20160643  
20160642  
Open Loop Frequency Response vs. Temperature  
Gain and Phase vs. Capacitive Load  
20160644  
20160645  
Slew Rate vs. Supply Voltage  
Non-Inverting Large Signal Pulse Response  
20160647  
20160646  
9
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Non-Inverting Large Signal Pulse Response  
Non-Inverting Large Signal Pulse Response  
20160648  
20160649  
Non-Inverting Small Signal Pulse Response  
Non-Inverting Small Signal Pulse Response  
20160650  
20160651  
Non-Inverting Small Signal Pulse Response  
Inverting Large Signal Pulse Response  
20160652  
20160653  
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10  
Inverting Large Signal Pulse Response  
Inverting Large Signal Pulse Response  
20160654  
20160655  
Inverting Small Signal Pulse Response  
Inverting Small Signal Pulse Response  
20160656  
20160657  
Inverting Small Signal Pulse Response  
20160658  
11  
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2.0 RAIL-TO-RAIL OUTPUT  
Application Information  
The approximated output resistance of the LMC6464 is  
180Ω sourcing, and 130Ω sinking at VS = 3V, and 110Ω  
sourcing and 83Ω sinking at VS = 5V. The maximum output  
swing can be estimated as a function of load using the cal-  
culated output resistance.  
1.0 INPUT COMMON-MODE VOLTAGE RANGE  
The LMC6464 has a rail-to-rail input common-mode voltage  
range. Figure 1 shows an input voltage exceeding both sup-  
plies with no resulting phase inversion on the output.  
3.0 CAPACITIVE LOAD TOLERANCE  
The LMC6464 can typically drive a 200 pF load with VS = 5V  
at unity gain without oscillating. The unity gain follower is the  
most sensitive configuration to capacitive load. Direct capac-  
itive loading reduces the phase margin of op-amps. The  
combination of the op-amp's output impedance and the ca-  
pacitive load induces phase lag. This results in either an  
underdamped pulse response or oscillation.  
Capacitive load compensation can be accomplished using  
resistive isolation as shown in Figure 4. If there is a resistive  
component of the load in parallel to the capacitive component,  
the isolation resistor and the resistive load create a voltage  
divider at the output. This introduces a DC error at the output.  
20160605  
FIGURE 1. An Input Voltage Signal Exceeds  
the LMC6464 Power Supply Voltage  
with No Output Phase Inversion  
The absolute maximum input voltage at V+ = 3V is 300 mV  
beyond either supply rail at room temperature. Voltages  
greatly exceeding this absolute maximum rating, as in Figure  
2, can cause excessive current to flow in or out of the input  
pins, possibly affecting reliability. The input current can be  
externally limited to ±5 mA, with an input resistor, as shown  
in Figure 3.  
20160608  
FIGURE 4. Resistive Isolation of  
a 300 pF Capacitive Load  
20160609  
20160606  
FIGURE 5. Pulse Response of the LMC6464  
Circuit Shown in Figure 4  
FIGURE 2. A ±7.5V Input Signal Greatly Exceeds  
the 3V Supply in Figure 3 Causing  
No Phase Inversion Due to RI  
Figure 5 displays the pulse response of the LMC6464 circuit  
in Figure 4.  
Another circuit, shown in Figure 6, is also used to indirectly  
drive capacitive loads. This circuit is an improvement to the  
circuit shown in Figure 4 because it provides DC accuracy as  
well as AC stability. R1 and C1 serve to counteract the loss  
of phase margin by feeding the high frequency component of  
the output signal back to the amplifiers inverting input, thereby  
preserving phase margin in the overall feedback loop. The  
values of R1 and C1 should be experimentally determined by  
the system designer for the desired pulse response. In-  
creased capacitive drive is possible by increasing the value  
of the capacitor in the feedback loop.  
20160607  
FIGURE 3. Input Current Protection for Voltages  
Exceeding the Supply Voltage  
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12  
 
 
 
 
 
or  
R1 CI R2 CF  
which typically provides significant overcompensation.  
Printed circuit board stray capacitance may be larger or small-  
er than that of a breadboard, so the actual optimum value for  
CF may be different. The values of CF should be checked on  
the actual circuit. (Refer to the LMC660 quad CMOS amplifier  
data sheet for a more detailed discussion.)  
20160610  
5.0 OFFSET VOLTAGE ADJUSTMENT  
FIGURE 6. LMC6464 Non-Inverting Amplifier,  
Offset voltage adjustment circuits are illustrated in Figure 9  
and Figure 10. Large value resistances and potentiometers  
are used to reduce power consumption while providing typi-  
cally ±2.5 mV of adjustment range, referred to the input, for  
both configurations with VS = ±5V.  
Compensated to Handle a 300 pF Capacitive  
and 100 KΩ Resistive Load  
20160611  
20160613  
FIGURE 7. Pulse Response of  
LMC6464 Circuit in Figure 6  
FIGURE 9. Inverting Configuration  
Offset Voltage Adjustment  
The pulse response of the circuit shown in Figure 6 is shown  
in Figure 7.  
4.0 COMPENSATING FOR INPUT CAPACITANCE  
It is quite common to use large values of feedback resistance  
with amplifiers that have ultra-low input current, like the  
LMC6464. Large feedback resistors can react with small val-  
ues of input capacitance due to transducers, photodiodes,  
and circuits board parasitics to reduce phase margins.  
20160614  
FIGURE 10. Non-Inverting Configuration  
Offset Voltage Adjustment  
6.0 SPICE MACROMODEL  
A Spice macromodel is available for the LMC6464. This mod-  
el includes a simulation of:  
Input common-mode voltage range  
Frequency and transient response  
GBW dependence on loading conditions  
Quiescent and dynamic supply current  
Output swing dependence on loading conditions  
20160612  
FIGURE 8. Canceling the Effect of Input Capacitance  
and many more characteristics as listed on the macromodel  
disk.  
The effect of input capacitance can be compensated for by  
adding a feedback capacitor. The feedback capacitor (as in  
Figure 8 ), CF, is first estimated by:  
Contact the National Semiconductor Customer Response  
Center to obtain an operational amplifier Spice model library  
disk.  
13  
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7.0 PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-  
IMPEDANCE WORK  
It is generally recognized that any circuit which must operate  
with less than 1000 pA of leakage current requires special  
layout of the PC board. When one wishes to take advantage  
of the ultra-low input current of the LMC6464, typically 150 fA,  
it is essential to have an excellent layout. Fortunately, the  
techniques of obtaining low leakages are quite simple. First,  
the user must not ignore the surface leakage of the PC board,  
even though it may sometimes appear acceptably low, be-  
cause under conditions of high humidity or dust or contami-  
nation, the surface leakage will be appreciable.  
20160616  
To minimize the effect of any surface leakage, lay out a ring  
of foil completely surrounding the LMC6464's inputs and the  
terminals of capacitors, diodes, conductors, resistors, relay  
terminals, etc. connected to the op-amp's inputs, as in Figure  
11. To have a significant effect, guard rings should be placed  
in both the top and bottom of the PC board. This PC foil must  
then be connected to a voltage which is at the same voltage  
as the amplifier inputs, since no leakage current can flow be-  
tween two points at the same potential. For example, a PC  
board trace-to-pad resistance of 1012Ω, which is normally  
considered a very large resistance, could leak 5 pA if the trace  
were a 5V bus adjacent to the pad of the input. This would  
cause a 30 times degradation from the LMC6464's actual  
performance. However, if a guard ring is held within 5 mV of  
the inputs, then even a resistance of 1011Ω would cause only  
0.05 pA of leakage current. See Figure 12 for typical connec-  
tions of guard rings for standard op-amp configurations.  
Inverting Amplifier  
20160617  
Non-Inverting Amplifier  
20160618  
Follower  
FIGURE 12. Typical Connections of Guard Rings  
The designer should be aware that when it is inappropriate to  
lay out a PC board for the sake of just a few circuits, there is  
another technique which is even better than a guard ring on  
a PC board: Don't insert the amplifier's input pin into the board  
at all, but bend it up in the air and use only air as an insulator.  
Air is an excellent insulator. In this case you may have to  
forego some of the advantages of PC board construction, but  
the advantages are sometimes well worth the effort of using  
point-to-point up-in-the-air wiring. See Figure 13.  
20160615  
FIGURE 11. Example of Guard Ring in P.C. Board Layout  
20160619  
(Input pins are lifted out of PC board and soldered directly to components.  
All other pins connected to PC board.)  
FIGURE 13. Air Wiring  
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14  
 
 
 
8.0 INSTRUMENTATION CIRCUITS  
these features include analytic medical instruments, magnetic  
field detectors, gas detectors, and silicon-based transducers.  
The LMC6464 has the high input impedance, large common-  
mode range and high CMRR needed for designing instru-  
mentation circuits. Instrumentation circuits designed with the  
LMC6464 can reject a larger range of common-mode signals  
than most in-amps. This makes instrumentation circuits de-  
signed with the LMC6464 an excellent choice for noisy or  
industrial environments. Other applications that benefit from  
A small valued potentiometer is used in series with RG to set  
the differential gain of the three op-amp instrumentation cir-  
cuit in Figure 14. This combination is used instead of one large  
valued potentiometer to increase gain trim accuracy and re-  
duce error due to vibration.  
20160620  
FIGURE 14. Low Power Three Op-Amp Instrumentation Amplifier  
A two op-amp instrumentation amplifier designed for a gain  
of 100 is shown in Figure 15. Low sensitivity trimming is made  
for offset voltage, CMRR and gain. Low cost and low power  
consumption are the main advantages of this two op-amp cir-  
cuit.  
Higher frequency and larger common-mode range applica-  
tions are best facilitated by a three op-amp instrumentation  
amplifier.  
20160621  
FIGURE 15. Low-Power Two-Op-Amp Instrumentation Amplifier  
15  
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Typical Single-Supply Applications  
TRANSDUCER INTERFACE CIRCUITS  
20160625  
20160622  
FIGURE 19. Full-Wave Rectifier  
with Input Current Protection (RI)  
FIGURE 16. Photo Detector Circuit  
In Figure 18 Figure 19, RI limits current into the amplifier since  
excess current can be caused by the input voltage exceeding  
the supply voltage.  
Photocells can be used in portable light measuring instru-  
ments. The LMC6464, which can be operated off a battery, is  
an excellent choice for this circuit because of its very low input  
current and offset voltage.  
PRECISION CURRENT SOURCE  
LMC6464 AS A COMPARATOR  
20160623  
FIGURE 17. Comparator with Hysteresis  
20160626  
Figure 17 shows the application of the LMC6464 as a com-  
parator. The hysteresis is determined by the ratio of the two  
resistors. The LMC6464 can thus be used as a micropower  
comparator, in applications where the quiescent current is an  
important parameter.  
FIGURE 20. Precision Current Source  
The output current IOUT is given by:  
HALF-WAVE AND FULL-WAVE RECTIFIERS  
OSCILLATORS  
20160624  
FIGURE 18. Half-Wave Rectifier with  
Input Current Protection (RI)  
20160627  
FIGURE 21. 1 Hz Square-Wave Oscillator  
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16  
 
 
 
For single supply 5V operation, the output of the circuit will  
swing from 0V to 5V. The voltage divider set up R2, R3 and  
R4 will cause the non-inverting input of the LMC6464 to move  
from 1.67V (⅓ of 5V) to 3.33V (⅓ of 5V). This voltage behaves  
as the threshold voltage.  
LOW FREQUENCY NULL  
R1 and C1 determine the time constant of the circuit. The fre-  
quency of oscillation, fOsc is  
where Δt is the time the amplifier input takes to move from  
1.67V to 3.33V. The calculations are shown below.  
where τ = RC = 0.68 seconds  
t1 = 0.27 seconds.  
and  
20160628  
t2 = 0.75 seconds  
Then,  
FIGURE 22. High Gain Amplifier  
with Low Frequency Null  
Output offset voltage is the error introduced in the output volt-  
age due to the inherent input offset voltage VOS, of an ampli-  
fier.  
Output Offset Voltage = (Input Offset Voltage) (Gain)  
In the above configuration, the resistors R5 and R6 determine  
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input offset voltage of the LMC6464 plus the bias voltage. This  
implies that the output offset voltage due to the top amplifier  
will be eliminated.  
= 1 Hz  
17  
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12/08/2010  
A
New Release, Corporate format  
1 MDS data sheets converted into one Corp. data  
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18  
Physical Dimensions inches (millimeters) unless otherwise noted  
14-Pin Ceramic DIP  
NS Package Number J14A  
19  
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