U2102B-X [TEMIC]
Analog Circuit, 1 Func, BIPolar, PDIP16, DIP-16;
| 型号： | U2102B-X |
| 厂家： | 
TEMIC SEMICONDUCTORS |
| 描述： | Analog Circuit, 1 Func, BIPolar, PDIP16, DIP-16 光电二极管 |
| 文件： | 总15页 (文件大小：110K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
U2102B
Multifunction Timer
Description
The monolithic integrated bipolar circuit U2102B is a dimmer functions. The integrated current monitoring
MOSFET or IGBT control circuit which allows the function additionally permits the power switch to be
realization of an extremely wide range of timer and reliably protected without an additional fuse.
FD eIantteugrraetesd reverse phase control
D Adjustable and retriggerable tracking time
D External window adjustment for sensor input
D Enable input for triggering
D Two- or three-wire applications
D Mode selection:
–
–
–
Zero-voltage switch with static output
Two-stage reverse phase control with switch-off
Two-stage reverse phase control
Applications
D Motion detectors
D Time-delay relays
D Dimmers
D Reverse phase controls
D Timers
D Current monitoring:
–
–
High-speed short-circuit monitoring with output
High-current monitoring with integrating buffer
D Integrated chip temperature monitoring
Block Diagram
1
16
Voltage monitoring
V
Ref
Synchronization
2
3
4
15
Reverse
phase
control
13
Voltage limitation
Control
logic
14
Push
pull
5
6
Divider
RC oscillator
12
11
Current monitoring
Programing
Temperature
monitoring
Triggering with buffers
Test logic
10
7
8
9
Figure 1. Block diagram
Rev. A3, 15-Jan-01
1 (15)
U2102B
Ordering Information
Extended Type Number
U2102B-x
Package
DIP16
SO16
Remarks
Tube
Tube
U2102B-xFP
U2102B-xFPG3
SO16
Taped and reeled
Pin Description
Pin Symbol
Function
V
Sync
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Ref
1
2
V
Reference voltage 5 V
Ramp, capacitance
Ref
C
R
Ramp
Ramp
C
+V
V
Ramp
S
3
Current setting for ramp
4
Control Control voltage
Osc RC oscillator
Prog. Tri-state programming
EN Enable input
Trigger Trigger input (window)
R
Ramp
O
5
6
Control
Osc
GND
7
8
U2102B
I
9
V
9
Window adjustment
Test output
off
10
11
12
13
14
15
16
Test
Prog.
EN
I
I
Input current monitoring
Fast output current monitoring
I
I
I
off
GND Ground
Test
V
O
Output voltage
Supply voltage
+ V
Trigger
S
V
9
Sync Synchronization input
Figure 2. Pinning
2 (15)
Rev. A3, 15-Jan-01
U2102B
Figure 3. Block diagram with typical circuit for dc loads
Rev. A3, 15-Jan-01
3 (15)
U2102B
Power Supply, Synchronization Pins 15 and 16
The voltage limitation circuit contained in the U2102B Pin 16, where the amplitude is limited. The power supply
enables simple power supply via a dropping resistor R . for the circuit can be realized in all modes for dc loads as
1
In the case of dc loads, practically all the supply current shown in figure 3. The voltage at Pin 16 is used to
flows into Pin 16 (the pull down resistor at Pin 16 is neces- synchronize the circuit with the mains and generate the
sary in order to guarantee reliable synchronization) and system clock required for the buffers. The circuit detects
is supplied via an internal diode to Pin 15, where the resul- a “zero crossing” when the voltage at Pin 16 falls below
tant supply voltage is limited and smoothed by C . As a an internal threshold of approximately 8 V.
1
result, the rectified and divided line voltage appears at
V
mains
R =R
1
sync
Sync.
16
+V
S
Load
15
Voltage
limitation
C
1
Push
pull
IGBT
14
R
G
Temp.
monit.
R
sh
GND
13
Figure 4. Power supply for dc loads (R1 is identical with Rsync
)
R is calculated here as follows:
1
I
I
I
=
I
+ I
Smax x
VNmin –VS
Itot
tot
R
1max + 0.85
(1)
Max. current consumption of the IC
Smax
x
=
where:
=
Current consumption of the external
components
V
V
=
=
V
– 15%
Nmin
S
mains
Supply voltage
4 (15)
Rev. A3, 15-Jan-01
U2102B
In the case of ac loads, it is necessary to make a distinction resistor, R , is connected before the rectifier bridge and
1
for power supply purposes between the individual therefore has only one mains half-wave. R is then calcu-
1
operating modes. In reverse phase control mode, figure 4, lated as follows:
Pin 15 must be additionally supplied with power via a
VNmin –VS
2 Itot
dropping resistor, since no current flows in Pin 16 when
R
1max + 0.85
the power switch is switched on. Here, the dropping
Load
V
mains
D
1
R
sync
Sync.
16
R
1
+V
S
Figure 5.
Power supply in reverse phase
control mode for ac loads
15
Voltage
C
1
limitation
Push
pull
IGBT
14
R
G
Temp.
monit.
R
sh
GND
13
In two-wire systems, the additional power supply at The power supply is simplified if the device is operated
Pin 15 is not possible (see figure 4, by omitting R and as a static zero-voltage switch for ac loads (see figure 5).
1
Diode D ). In this case, the resistor R
is identical with All delay times are twice as long here, since synchro-
1
sync
R and should be as low as the power dissipation allows nization of the module is tapped before the rectifier
1
it. A sufficiently large residual phase angle must remain bridge.
in this case in order to guarantee the device supply.
Load
V
mains
R = R
1
sync
Sync.
16
+V
S
Figure 6.
15
Power supply as static zero
voltage switch for ac loads
Voltage
limitation
C
1
Push
pull
IGBT
14
R
G
Temp.
monit.
R
sh
GND
13
Rev. A3, 15-Jan-01
5 (15)
U2102B
Voltage Monitoring
Reverse Phase Control, Pins 2, 3, 4
In the case of normal phase controls, e.g., with a triac, the
load current is switched ON only at a certain phase angle
after the zero crossing of the mains voltage. In the
following zero crossing of the current, the triac gets extin-
guished (switched-off) automatically. Reverse phase
control differs from this in that the load current is always
switched-on by a semiconductor switch (e.g., IBGT) at
the zero crossing of the mains voltage and then switched
back off again after a certain phase angle a. This has the
advantage that the load current always rises with the
mains voltage in a defined manner and thus keeps the
required interference suppression to a minimum.
While the operating voltage is being built up or reduced,
uncontrolled conditions or output pulses of insufficient
amplitude are being suppressed by the internal moni-
toring circuit. All latches in the circuit, the divider and the
control logic are reset. When the supply voltage is
applied, the enable threshold (clamp voltage) of approxi-
mately 16 V must be reached so that the circuit is enabled.
The circuit is reset at approximately 11 V if the supply
voltage breaks down. A further threshold is activated in
reverse phase control mode. If the supply voltage breaks
down here after enabling of the circuit, the output stage
is switched off at approximately 12.5 V, while the other
parts of the circuit are not affected. The output stage can
then be switched on again only in the following half-
wave. As a result, the residual phase angle remains just
large enough, (e.g., in two-wire systems), so that the
circuit can still be properly supplied with power. In all
operating modes, a single operating cycle is started after
the supply voltage is applied, independently of the trigger
inputs, in order to immediately demonstrate the overall
function.
The charging current for the capacitor C at Pin 2 is set
3
with the resistor R at Pin 3. When the synchronization
3
circuit recognizes a zero crossing, an increased charging
current I [ 4 I is enabled which then charges C up
2
3
3
to [ 0.45 V. The output stage is switched-on at this value
and the charging current for C is reduced to I = I . Since
3
2
3
the actual zero crossing of the supply voltage occurs later
than recognized by the circuit, the load current starts to
flow quite close to the exact zero crossing of the supply
voltage. While the output stage is switched-on C is
charged until the control voltage, set externally at Pin 4,
3
Chip Temperature Monitoring
The circuit possesses an integrated chip temperature is reached. When this condition is reached, the output
monitoring circuit which disables the output stage when stage is switched off and C is charged again with the
3
a temperature of approximately 140°C is reached. The increased current (I = 4 I ) to V [ 5.5 V. The
2
3
2
circuit is enabled again only after cooling down and addi- charging current is switched off at this point and C is
3
tionally switched “off and on” of the operating voltage.
discharged internally. The whole process then starts again
when the circuit recognizes another zero crossing (see
figure 6).
V
mains
t
V
2
1.1 V
Ref
V
Ref
4
0.09 V
t
V
14
t
Figure 7. Signal characteristics of reverse phase control
6 (15)
Rev. A3, 15-Jan-01
U2102B
Programing, Pin 6
Three operating modes can be programed with the tristate This threshold is approximately 2 V in switched-off
input Pin 6:
condition and also during the second current flow angle,
a, in two-stage reverse phase control mode. Otherwise,
the blocking-or switch-off threshold is 0.5 V.
D Zero-voltage switch (ZVS)with static output
(V = V = V ):
6
1
Ref
The input Pin 8 is designed as a window discriminator, its
window is set at Pin 9. The minimum window of approxi-
The reverse phase control is inactive here. The output
stage is statically switched-on after triggering by the
timer and switched-off again after the running down
of the time (at the zero crossing of the supply voltage
in each case). This operating mode is not possible in
two–wire systems.
mately 250 mV is set with V = V , and the maximum
9
13
window of approximately 1.25 V with V = V . The
9
l
window discriminator is in the OFF state when the
voltage at Pin 8 lies within the window set at Pin 9.
If a resistor divider with an NTC resistor is connected to
Pin 9, for example, it is possible to compensate for the
temperature dependence of the IR sensor, i.e. the range is
made independent of temperature.
D Two-stage reverse phase control with switch-off
(V = V = V ):
6
15
S
The maximum current flow angle, a , is set when
max
the timer has enabled the output stage. Switchover to
the phase angle a, which can be set arbitrarily at Pin 4,
takes place after expiry of 3/4 of the tracking time set
at Pin 5. The output stage switches off after expiry of
the whole tracking time.
Noise suppression for t = 40 ms guarantees that there
is no peak noise signals at the inputs which could trigger
the circuit. Equally, renewed triggering is prevented for
ON
t
= 640 ms after load switch-off in order to avoid any
OFF
self interference.
D Two-stage reverse phase control (V = V
GND):
6
13 =
The output stage switches to the maximum current
V
7
flow angle, a , (adjustable) if the trigger condition
max
V
Ref
for both inputs (Pins 7, 8) is satisfied. Switchover to
the current flow angle, a, set at Pin 4 takes place after
expiry of 3/4 of the tracking time set at Pin 5. The
whole process is repeated from the beginning again if
renewed triggering takes place at Pin 8. The lamp is
switched-off in the following half-wave of the mains
voltage if the trigger condition at Pin 7 disappears. In
this mode, the output stage is switched-on even if only
Pin 7 is in the ON state. The current flow angle is then
ON
0.5 V
Ref
Hysteresis
0.1/0.4 V
Ref
OFF
0
determined by V (e.g., house no. illumination,
4
twilight switch).
Figure 8. Trigger condition Pin 7
Trigger Inputs, Pins 7 and 8
The trigger condition of the timer is determined by the
two inputs Pins 7 and 8. A Light Dependent Resistor
(LDR) can be connected to Pin 7, for example, and an IR
sensor to Pin 8. Both inputs must be in the ON state to
initiate triggering, since they are equal and AND-gated.
In the operating mode “2-stage reverse phase control”,
the output stage can additionally be switched-on and
switched-off by Pin 7 alone and independently of the
timer.
V
8
V
Ref
ON
0.05 V + 0.2 V
Ref
9
0.5 V
Ref
OFF
0.05 V + 0.2 V
Ref
9
ON
The enable input Pin 7 is implemented as a comparator
with hysteresis. The enable threshold is approximately
2.5 V. The blocking threshold is switched by the control
logic in order to avoid faults as a result of load switching.
0
Figure 9. Trigger condition Pin 8
Rev. A3, 15-Jan-01
7 (15)
U2102B
RC Oscillator, Pin 5
Current Monitoring, Pins 11 and 12
The current monitoring circuit integrated in the U2102B
represents a double electronic fuse. The circuit measures
the current flowing through the power switch by way of
An internal RC oscillator with following divider stage
1:2 permits a very long and reproducible tracking time.
11
The RC values for a certain tracking time, t , are calcu-
t
the voltage drop across the shunt resistor R . This voltage
sh
lated as follows:
is supplied to Pin 11. If this voltage exceeds a value of
500 mV because of a high load current (e.g., short-
circuit), the switch-off latch is set and the switching
output Pin 11 closes immediately. Pin 11 can be
connected to the gate via a resistor or network, depending
on load conditions, thus allowing the switch-off behavior
to be adapted to the respective requirements. The short-
circuit current is reduced to a problem-free value by this
procedure.
tt(s) 103
R2 (kW) +
1.4 2048 C2 (mF)
tt(s) 103
C2 (mF) +
1.4 2048 R2 (kW)
In reverse phase control mode, switchover from maxi-
mum current flow angle to the value set at Pin 4 takes
place after expiry of 3/4 of the total tracking time t .
t
There is a second threshold at 100 mV. The output stage
is disabled if the voltage at Pin 11 exceeds this value and
if it reaches this value for 120 ms in every half-wave
without exceeding the switch-off threshold of 500 mV.
Since high voltage peaks would be caused by switching
off due to the line and leakage inductances, the output
stage is not switched-off immediately but is simply not
enabled in the next half-wave. The circuit is designed so
that it also switches off in the case of changing over-
currents which do not occur in every half-wave. But in
this case the switch-off time is larger.
Absolute Maximum Ratings
Reference point Pin 13, unless otherwise specified
Parameters
Symbol
Value
Unit
Power supply
Current
Pin 15
Pin 16
Pin 1
I
i
20
60
mA
mA
S
t < 10 ms
s
Synchronization
Input current
I
i
20
60
mA
mA
I
i
t v 10 ms
Reference voltage source
Output current
– I
10
mA
Ref
Push-pull output stage
Output current
Pin 14
Pin 14
Pin 2
Pin 2
Pin 3
" I
" i
–I
I
10
60
1
8
0.2
1
mA
mA
mA
mA
mA
mA
mA
O
t v 2 ms
o
Input currents
I
I
–I
I
Pin 10
Pin 12
" I
I
I
I
20
Input voltages
Pins 4, 5, 7, 8, 9 and 11
Pins 6 and 12
V
V
0 to V
V
V
I
1
0 to V
I
15
Storage temperature range
Junction temperature
Ambient temperature
T
T
– 40 to + 125
+ 125
– 10 to + 100
°C
°C
°C
stg
j
T
amb
8 (15)
Rev. A3, 15-Jan-01
U2102B
Thermal Resistance
Parameters
Symbol
Value
Unit
Junction ambient
DIP 16
SO 16 on PC board
SO 16 on ceramic
R
R
R
120
180
100
K/W
K/W
K/W
thJA
thJA
thJA
Electrical Characteristics
V = 15.0 V, f
S
= 50 Hz, T
= 25°C, reference point Pin 13, unless otherwise specified
mains
amb
Parameters
Test Conditions / Pin
Symbol Min.
Typ.
Max.
Unit
Supply voltage limitation
I = 2 mA
I = 5 mA
S
Pin 15
V
S
V
S
15
15.2
17
17.2
V
V
S
Current consumption
Voltage monitoring
V = 15 V
S
Pin 15
Pin 15
I
2
mA
S
Switch-on threshold
Switch-off threshold
Undervoltage threshold
Reference voltage
V
14.8
10.4
11.7
4.75
16.5
11.6
13.3
5.25
V
V
V
V
SON
V
SOFF
11
12.5
5
V
V
Ref
15
– I = 0 to 5 mA
Pin 1
1
Synchronization
Voltage limitation
Input current
Zero crossing switch-on threshold
Zero crossing switch-off threshold
Reverse phase control
I
V
= 2 mA
Pin 16-15
Pin 16
Pin 16
Pin 16
Pin 3
V
– I
0.8
100
7.7
8.3
V
mA
V
16
limit
= 0 V
16
I
V
7.3
7.9
8.1
8.7
TON
TOFF
V
V
Ramp current setting
Input current
Input voltage
Ramp
– I
50
5.3
mA
V
I
I = – 10 mA
I = – 10 mA
3
V
3
4.7
5
3
Pin 2
Charging current 1
Charging current 2
Discharge impedance
Switch-on threshold, output stage
Discharge threshold voltage
Control voltage
Input voltage
Input current
Programing, tri state input
Input current
– I
– I
R
9
37
10
40
1
450
600
11
43
mA
mA
kW
mV
mV
ch1
ch2
dis
V
TON
410
0
490
Pin 2-1
Pin 4
V
dis
V
"I
V
Ref
V
nA
I
V
V
v V v V
500
13
4
l
I
I
Pin 6
v V v V
"I
1
mA
13
6
15
Operating mode:
Static zero-voltage switch
2-stage reverse phase control with
switch-off
1
Ref
VRef+0.3
V
V
V
+1
V
S
V
V
I
2-stage reverse phase control
0
0.3
I
RC oscillator
Pin 5
Input current
V
13
v V < 3.6 V
"I
500
4.4
1.1
nA
V
V
5
I
Upper threshold
Lower threshold
Discharge impedance
V
TU
3.6
0.9
4
1
1
V
TL
R
dis
kW
Rev. A3, 15-Jan-01
9 (15)
U2102B
Parameters
Test Conditions / Pin
Symbol Min.
Typ.
Max.
Unit
Window discriminator
Input current
0 V v V v V
Pin 8
"I
500
nA
8
l
i
Upper threshold
Lower threshold
Pins 8 and 9
V
V
0.55 @ V + (0.2 @V )
V
V
TU
Ref
9
0.45 @ V – (0.2 @V )
TL
Ref
9
Input current window adjustment 0 V v V v V
Pin 9
Pin 8
"I
i
500
nA
9
1
Minimum window:
Lower threshold
Upper threshold
V = V
9
13
V
TL1
TU1
2.05
2.55
2.75
3.75
2.45
2.95
V
V
V
Maximum window:
Lower threshold
Upper threshold
V = V
Pin 8
Pin 7
9
1
V
V
1.1
3.4
1.25
3.75
1.4
4.1
V
V
TL2
TU2
Enable Schmitt trigger
Input current
0 V v V v V
"I
i
500
2.7
nA
V
7
l
Enable threshold
V
2.3
2.5
T
Blocking threshold:
Output stage OFF
V
T
V
T
1.8
0.45
2
0.5
2.2
0.55
V
V
Output stage ON, except in the
case of two-stage reverse phase
control in second stage (a)
Threshold for test mode
V
T
85
100
115
mV
Current monitoring
Pin 11
Pin 12
Input current
Switch-off threshold 1
Switch-off threshold 2
0 V v V v V
"I
V
V
500
120
550
nA
mV
mV
11
1
i
T1
T2
80
450
100
500
Switching output
Leakage current
Saturation voltage
V
V
< 450 mV, V v V
I
1
mA
11
12
15
lkg
> 550 mV
11
I
I
= 0.5 mA
= 10 mA
V
Sat
V
Sat
1.0
1.2
V
V
12
12
Push-pull output stage
Upper saturation voltage,
ON state
I
I
= –10 mA
–V
2.4
1.2
V
V
14
14
Sat
Pins 14 and 15
Lower saturation voltage,
OFF state
= 10 mA
Pin 14
V
SatL
Output current
ON state
OFF state
Pin 14
–I
50
50
mA
mA
O
I
O
10 (15)
Rev. A3, 15-Jan-01
U2102B
Applications
V
mains
230 V X
Load
GND
1 nF
R
sh
1 kW
22 kW/2 W
IGBT
100 W
R
1
1N4007
R
G
NTC
V
Ref
C
1
R
sync
100 kW
47 mF/
25 V
220 kW
V
S
10
9
16
15
14
13
12
11
U2102B
4
6
1
2
3
5
7
8
C
3
R
3
10 nF
820 kW
V
S
Control
GND
Enable
220 nF
100 kW
22 kW
1 MW
C
2
Trigger
signal
R
2
C
Ref
1 mF
Figure 10. House number or staircase illumination for ac loads
House number illumination: V6 = V13
Staircase illumination: V6 = V15
Rev. A3, 15-Jan-01
11 (15)
U2102B
V
mains
230 V X
Load
GND
1 nF
R
sh
1 kW
IGBT
100 W
R = R
1
sync
R
G
NTC
V
Ref
68 kW
18 kW/2 W
C
1
1N4007
47 mF/25 V
V
S
9
10
16
15
14
13
12
11
U2102B
1
2
3
4
5
6
7
8
C
3
R
3
22 nF
750 kW
Enable
C
2
220 nF
22 kW
1 MW
Trigger
signal
C
Ref
R
2
1 mF
Figure 11. Zero voltage switch mode for ac loads
12 (15)
Rev. A3, 15-Jan-01
U2102B
V
mains
230 V X
Load
1 nF
R
sh
1 kW
R
1
IGBT
22 kW/2 W
100 W
V
S
1N4007
R
G
C
1
R
47 mF/
25 V
sync
100 kW
100 kW
220 kW
V
S
10
9
16
15
14
13
12
11
U2102B
1
2
3
4
5
6
7
8
C
3
100 kW
10 nF
100 kW
R
3
V
S
Control
100 kW
1 MW
C
Ref
1 mF
Figure 12. Reverse phase control for ac loads
Rev. A3, 15-Jan-01
13 (15)
U2102B
Package Information
Package DIP16
Dimensions in mm
7.82
7.42
20.0 max
4.8 max
6.4 max
3.3
0.5 min
0.39 max
9.75
8.15
1.64
1.44
0.58
0.48
17.78
2.54
Alternative
16
9
technical drawings
according to DIN
specifications
1
8
Package SO16
Dimensions in mm
5.2
4.8
10.0
9.85
3.7
1.4
0.2
0.25
0.10
0.4
3.8
1.27
6.15
5.85
8.89
16
9
technical drawings
according to DIN
specifications
1
8
14 (15)
Rev. A3, 15-Jan-01
U2102B
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with respect to their impact on the health and safety of our employees and the public, as well as their impact on
the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as
ozone depleting substances (ODSs).
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and forbid
their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these
substances.
Atmel Germany GmbH has been able to use its policy of continuous improvements to eliminate the use of ODSs listed
in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental
Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
Atmel Germany GmbH can certify that our semiconductors are not manufactured with ozone depleting substances
and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use Atmel Wireless & Microcontrollers products for any unintended
or unauthorized application, the buyer shall indemnify Atmel Wireless & Microcontrollers against all claims,
costs, damages, and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death
associated with such unintended or unauthorized use.
Data sheets can also be retrieved from the Internet:
http://www.atmel–wm.com
Atmel Germany GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423
Rev. A3, 15-Jan-01
15 (15)
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