U2102B-XFPY [ATMEL]
Multifunction Timer IC; 多功能定时器IC
| 型号： | U2102B-XFPY |
| 厂家： | 
ATMEL |
| 描述： | Multifunction Timer IC |
| 文件： | 总19页 (文件大小：320K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Integrated Reverse Phase Control
• Mode Selection:
– Zero-voltage Switch with Static Output
– Two-stage Reverse Phase Control with Switch-off
– Two-stage Reverse Phase Control with Dimming Function
• Current Monitoring:
– High-speed Short-circuit Monitoring with Output
– High-current Monitoring with Integrating Buffer
• Integrated Chip Temperature Monitoring
• Adjustable and Retriggerable Tracking Time
• External Window Adjustment for Sensor Input
• Enable Input for Triggering
Multifunction
Timer IC
U2102B
Applications
• Two- or Three-wire Applications
• Motion Detectors
• Time-delay Relays
• Dimmers
• Reverse Phase Controls
• Timers
1. Description
The timer control circuit U2102B is based on bipolar technology. The output stage can
switch either a MOSFET or an IGBT. Two sensor inputs and the retriggerable and
adjustable tracking time useful for a wide range of applications. By using the reverse
phase-control technique, the resistive load can be dimmed without the need of a com-
pensation inductance. The integrated current monitoring function provides a very fast
switch-off in case of a short-circuit condition. No additional fuse is needed.
Rev. 4767B–INDCO–10/05
Figure 1-1. Block Diagram
1
16
Voltage monitoring
VRef
Synchronization
2
15
13
Reverse
phase
control
3
4
Voltage limitation
Control
logic
14
5
6
Push
pull
Divider
RC oscillator
12
11
Current monitoring
Programing
Temperature
monitoring
Triggering with buffers
Test logic
10
7
8
9
2
U2102B
4767B–INDCO–10/05
U2102B
2. Pin Configuration
Figure 2-1. Pinning DIP16/SO16
SYNC
+VS
VO
1
2
16
15
VREF
CRAMP
RRAMP
3
4
5
14
CONTROL
13 GND
U2102B
IOFF
II
12
OSC
PROG
6
7
8
11
10
9
EN
TEST
V9
TRIGGER
Pin Description
Pin
1
Symbol
VREF
Function
Reference voltage 5 V
Ramp capacitance
2
CRAMP
RRAMP
3
Current setting for ramp
4
CONTROL Control voltage
5
OSC
PROG
EN
RC oscillator
6
Tri-state programming
Enable input
7
8
TRIGGER
V9
Trigger input (window)
Window adjustment
Test output
9
10
11
12
13
14
15
16
TEST
II
Input current monitoring
IOFF
GND
VO
Fast output current monitoring
Ground
Output voltage
+VS
Supply voltage
SYNC
Synchronization input
3
4767B–INDCO–10/05
Figure 2-2. Block Diagram with Typical Circuit for DC Loads
4
U2102B
4767B–INDCO–10/05
U2102B
3. Power Supply, Synchronization Pins 15 and 16
The U2102B’s voltage limitation circuit enables the power supply via the dropping resistor R1. In
the case of DC loads, the entire supply current flows into pin 16 and is supplied via an internal
diode to pin 15, where the resultant supply voltage is limited and smoothed by C1. The pull-down
resistor at pin 16 is necessary in order to guarantee reliable synchronization. As a result, the rec-
tified and divided line voltage appears at pin 16, where the amplitude is limited. The power
supply for the circuit can be realized in all modes for DC loads as shown in Figure 2-2 on page 4.
The voltage at pin 16 is used to synchronize the circuit with the mains and generate the system
clock required for the buffers. The circuit detects a “zero crossing” when the voltage at pin 16
falls below an internal threshold of approximately 8 V.
Figure 3-1. Power Supply for DC Loads (R1 is Identical with Rsync
)
Vmains
R1 = Rsync
Sync.
16
+VS
Load
15
Voltage
limitation
C1
Push
pull
IGBT
14
RG
Temp.
monit.
Rsh
GND
13
R1 is calculated as follows:
V
Nmin – VS
---------------------------
R1max = 0.85 ×
Itot
where:
VNmin = Vmains – 15%
VS
Itot
= Supply voltage
= ISmax + Ix
ISmax = Maximum current consumption of the IC
Ix = Current consumption of the external components
5
4767B–INDCO–10/05
In the case of AC loads, it is necessary to distinguish the power supply purposes of the individ-
ual operating modes. In reverse phase control mode (see Figure 3-1 on page 5), pin 15 must be
additionally supplied with power via a dropping resistor, since no current flows in pin 16 when
the power switch is switched on. Here, the dropping resistor, R1, is connected to the AC line and
has therefore only one mains half-wave. R1 is then calculated as follows:
V
Nmin – VS
---------------------------
R1max = 0.85 ×
2 × Itot
Figure 3-2. Power Supply in Reverse Phase Control Mode for AC Loads
Load
Vmains
Rsyn
D1
R1
Sync.
16
+VS
15
Voltage
limitation
C1
Push
pull
IGBT
Rsh
14
RG
Temp.
monit.
GND
13
In two-wire systems, the additional power supply at pin 15 is not possible (see Figure 3-1 on
page 5, by omitting R1 and diode D1). In this case, the resistor Rsync is identical with R1 and
should be as low as the power dissipation allows it. A sufficiently large residual phase angle
must remain in this case to guarantee the device’s supply.
The power supply is simplified if the device is operated as a static zero-voltage switch for AC
loads (see Figure 3-2). All delay times are then twice as long, since the synchronization of the
module is connected directly to the AC line.
6
U2102B
4767B–INDCO–10/05
U2102B
Figure 3-3. Power Supply as Static Zero-voltage Switch for AC Loads
Load
Vmains
R1 = Rsync
Sync
16
+VS
15
Voltage
limitation
C1
Push
pull
IGBT
14
RG
Temp.
monit.
Rsh
GND
13
4. Voltage Monitoring
The internal voltage monitoring circuit surpresses uncontrolled conditions or output pulses of
insufficient amplitude which may occur while the operating voltage is being built up or reduced.
All latches in the circuit, the divider and the control logic are reset. When the supply voltage is
applied, the enable threshold (clamp voltage) of approximately 16 V must be reached so that the
circuit is enabled. The circuit is reset at approximately 11 V if the supply voltage breaks down. A
further threshold is activated in reverse phase control mode. If the supply voltage breaks down
in this mode, after the circuit has been enabled, the output stage is switched off at approximately
12.5 V, while the other parts of the circuit are not affected. The output stage can then be
switched on again in the following half-wave. As a result, the residual phase angle remains just
large enough, (e.g., in two-wire systems), so that the circuit can still be properly supplied with
power. In all operating modes, a single operating cycle is started after the supply voltage is
applied, independently of the trigger inputs, in order to immediately demonstrate the overall
function.
5. Chip Temperature Monitoring
The U2102B includes a chip temperature monitoring circuit which disables the output stage
when a temperature of approximately 140°C is reached. The circuit will only be enabled again
after cooling down and when the operating voltage has been additionally switched off and on.
7
4767B–INDCO–10/05
6. Reverse Phase Control
In the case of normal phase controls, e.g., with a triac, the load current will only be switched on
at a certain phase angle after the zero crossing of the mains voltage. In the following zero cross-
ing of the current, the triac gets extinguished (switched-off) automatically. Reverse phase control
differs from this in that the load current is always switched on by a semiconductor switch (for
example, IBGT) at the zero crossing of the mains voltage and then switched back off again after
a certain phase angle α. This has the advantage that the load current always rises with the
mains voltage in a defined manner and thus keeps the required interference suppression to a
minimum.
The charging current for the capacitor C3 at pin 2 is set with the resistor R3 at pin 3. When the
synchronization circuit recognizes a zero crossing, an increased charging current of I2 ≈ 4 × I3
is enabled which then charges C3 up to ≈ 0.45 V. The output stage is switched on at this value
and the charging current for C3 is reduced to I2 = I3. Since the actual zero crossing of the supply
voltage occurs later than recognized by the circuit, the load current starts to flow quite close to
the exact zero crossing of the supply voltage. While the output stage is switched on, C3 is
charged until the control voltage, set externally at pin 4, is reached. When this condition is
reached, the output stage is switched off and C3 is charged again with the increased current (I2
≈ 4 × I3) to V2 ≈ 5.5 V. The charging current is switched off at this point and C3 is discharged
internally. The whole process then starts again when the circuit recognizes another zero cross-
ing (Figure 3-3 on page 7).
Figure 6-1. Signal Characteristics of Reverse Phase Control
Vmains
t
V2
1.1 V × VRef
V4
0.09 V × VRef
t
V14
t
8
U2102B
4767B–INDCO–10/05
U2102B
7. Programming
Three operating modes can be programmed with the tri-state input pin 6:
• Zero-voltage switch (ZVS) with static output (V6 = V1 = VRef):
The reverse phase control is inactive here. The output stage is statically switched on after
triggering by the timer and switched off again after the running down of the time (at the zero
crossing of the supply voltage in each case). This operating mode is not possible in two-wire
systems.
• Reverse phase control with two-stage switch-off (V6 = V15 = VS):
The maximum current flow angle, αmax, is set when the timer has enabled the output stage.
Switchover to the phase angle α, which can be set arbitrarily at pin 4, takes place after
expiry of 3/4 of the tracking time set at pin 5. The output stage switches off after expiry of the
whole tracking time.
• Two-stage reverse phase control with dimming function (V6 = V13 = GND):
The output stage switches to the maximum current flow angle, αmax, (adjustable) if the trig-
ger condition for both inputs (pins 7, 8) is satisfied. Switchover to the current flow angle, α,
set at pin 4 takes place after expiry of 3/4 of the tracking time set at pin 5. The whole process
is repeated from the beginning if renewed triggering takes place at pin 8. The lamp is
switched-off in the following half-wave of the mains voltage if the trigger condition at pin 7
disappears. In this mode, the output stage is switched-on even if only pin 7 is in the ON
state. The current flow angle is then determined by V4 (e.g., house number illumination, twi-
light switch).
8. Trigger Inputs
The trigger condition of the timer is determined by the two inputs at pins 7 and 8. A Light Depen-
dent Resistor (LDR) can be connected to pin 7, for example, and an IR sensor to pin 8. Since
both inputs are equal and AND-gated they must both be in the ON state to initiate triggering. In
the operating mode “2-stage reverse phase control”, the output stage can additionally be
switched on and switched off by pin 7 alone and independently of the timer.
The enable input pin 7 is implemented as a comparator with hysteresis. The enable threshold is
approximately 2.5 V. The blocking threshold is switched by the control logic in order to avoid
faults as a result of load switching. This threshold is approximately 2 V in switched off condition
and also during the second current flow angle, α, in two-stage reverse phase control mode. Oth-
erwise, the blocking or switch-off threshold is 0.5 V.
The input pin 8 is designed as a window discriminator, its window is set at pin 9. The minimum
window of approximately 250 mV is set with V9 = V13, and the maximum window of approxi-
mately 1.25 V with V9 = Vl. The window discriminator is in the OFF state when the voltage at pin
8 lies within the window set at pin 9.
If a resistor divider with an NTC resistor is connected to pin 9, for example, it is possible to com-
pensate the temperature dependence of the IR sensor, i.e., the range is made independent of
temperature.
Noise suppression for tON = 40 ms guarantees that there are no peak noise signals at the inputs
which could trigger the circuit. Equally, renewed triggering is prevented for tOFF = 640 ms after
load switch-off to avoid any self interference.
9
4767B–INDCO–10/05
Figure 8-1. Trigger Condition Pin 7
V7
VRef
ON
0.5 × VRef
Hysteresis
0.1/0.4 × VRef
OFF
0
Figure 8-2. Trigger Condition Pin 8
V8
VRef
ON
0.05 × VRef + 0.2 × V9
0.5 × VRef
OFF
0.05 × VRef + 0.2 × V9
ON
0
9. RC Oscillator
An internal RC oscillator with following divider stage 1:211 permits a very long and reproducible
tracking time.
The RC values for a certain tracking time, tt, are calculated as follows:
tt(s)103
R2(kΩ) = -------------------------------------------------
1.4 × 2048 C2 (µF)
tt(s)103
C2(µF) = --------------------------------------------------
1.4 × 2048 R2 (kΩ)
In reverse phase control mode, switchover from maximum current flow angle to the value set at
pin 4 takes place after expiry of 3/4 of the total tracking time tt.
10
U2102B
4767B–INDCO–10/05
U2102B
10. Current Monitoring
The U2102B’s current monitoring circuit represents a double electronic fuse. The circuit mea-
sures the current flowing through the power switch by means of the voltage drop across the
shunt resistor Rsh. This voltage is supplied to pin 11. If this voltage exceeds a value of 500 mV
due to a high load current (e.g., short circuit), the switch-off latch is set and the switching output
pin 11 closes immediately. Pin 11 can be connected to the gate via a resistor or network,
depending on load conditions, thus allowing the switch-off behavior to be adapted to the respec-
tive requirements. The short-circuit current is reduced to a problem-free value by this procedure.
There is a second threshold at 100 mV. Without exceeding the switch-off threshold of 500 mV,
the output stage is also disabled in the voltage at pin 11 exceeds the value of 100 mV for
≥ 120 ms at one half-wave. To prevent the occurrence of high-voltage peaks in the over current
condition due to the line and leakage inductances, the output stage is not switched off immedi-
ately. It is disabled during the next half-wave.
11. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Reference point pin 13, unless otherwise specified.
Parameters
Pin
Symbol
Value
Unit
Power supply
Current
t < 10 µs
15
IS
is
20
60
mA
mA
Synchronization
Input current
t ≤10 µs
16
1
II
ii
20
60
mA
mA
Reference voltage source
Output current
- IRef
10
mA
Push-pull output stage
Output current
t ≤2 ms
14
14
±IO
±io
10
60
mA
mA
2
2
3
10
12
-II
II
-II
± II
II
1
8
0.2
1
mA
mA
mA
mA
mA
Input currents
20
4, 5, 7, 8, 9, 11
6 and 12
VI
VI
0 to V1
0 to V15
V
V
Input voltage
Storage temperature range
Junction temperature
Ambient temperature
Tstg
Tj
-40 to +125
+125
°C
°C
°C
Tamb
-10 to +100
11
4767B–INDCO–10/05
12. Thermal Resistance
Parameters
Symbol
RthJA
Value
120
Unit
K/W
K/W
K/W
DIP16
Junction ambient
SO16 on PC board
SO16 on ceramic
RthJA
180
RthJA
100
13. Electrical Characteristics
VS = 15.0 V, fmains = 50 Hz, Tamb = 25°C, reference point pin 13, unless otherwise specified.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
IS = 2 mA
IS = 5 mA
VS
VS
15
15.2
17
17.2
V
V
Supply Voltage Limitation
15
Current Consumption
VS = 15 V
15
15
IS
2
mA
Voltage Monitoring
Switch-on threshold
Switch-off threshold
Undervoltage threshold
VSON
VSOFF
V15
14.8
10.4
11.7
16.5
11.6
13.3
V
V
V
11
12.5
Reference Voltage
-I1 = 0 to 5 mA
1
VRef
4.75
5
5.25
V
Synchronization
Voltage limitation
Input current
Zero crossing switch-on threshold
Zero crossing switch-off threshold
I16 = 2 mA
V16 = 0 V
15, 16
16
16
Vlimit
- II
VTON
VTOFF
0.8
100
7.7
8.3
V
µA
V
7.3
7.9
8.1
8.7
16
V
Reverse Phase Control
3
Ramp current setting
Input current
Input voltage
-II
V3
50
5.3
µA
V
I3 = -10 µA
I3 = -10 µA
4.7
5
Ramp
2
Charging current 1
Charging current 2
Discharge impedance
Switch-on threshold, output stage
Discharge threshold voltage
-Ich1
-Ich2
Rdis
VTON
Vdis
9
37
10
40
1
450
600
11
43
µA
µA
kΩ
mV
mV
410
490
1, 2
4
Control Voltage
Input voltage
Input current
VI
±II
VRef
500
V
nA
0
V13 ≤V4 ≤Vl
Programming, Tri-state Input
6
Input current
V
13 ≤V6 ≤V15
±II
1
µA
Operating mode:
Static zero-voltage switch
2-stage reverse phase control with
switch-off
1
VRef + 0.3
VS
VI
VI
V
Ref + 1
V
V
2-stage reverse phase control
0
0.3
RC Oscillator
5
Input current
V13 ≤V5 < 3.6 V
±II
500
4.4
1.1
nA
V
V
Upper threshold
Lower threshold
Discharge impedance
VTU
VTL
Rdis
3.6
0.9
4
1
1
kΩ
12
U2102B
4767B–INDCO–10/05
U2102B
13. Electrical Characteristics (Continued)
VS = 15.0 V, fmains = 50 Hz, Tamb = 25°C, reference point pin 13, unless otherwise specified.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
Window Discriminator
Input current
0 V ≤V8 ≤Vl
8
8, 9
9
±II
500
nA
Upper threshold
Lower threshold
VTU
VTL
0.55 × VRef + (0.2 × V9)
0.45 × VRef - (0.2 × V9)
V
V
Input current window adjustment
0 V ≤V9 ≤V1
±Ii
500
nA
Minimum window:
Lower threshold
Upper threshold
V9 = V13
8
VTL1
VTU1
2.05
2.55
2.75
3.75
2.45
2.95
V
V
Maximum window:
Lower threshold
Upper threshold
V9 = V1
8
7
VTL2
VTU2
1.1
3.4
1.25
3.75
1.4
4.1
V
V
Enable Schmitt Trigger
Input current
0 V ≤V7 ≤Vl
±Ii
VT
500
2.7
nA
V
Enable threshold
2.3
2.5
Blocking threshold:
Output stage OFF
VT
VT
1.8
0.45
2
0.5
2.2
0.55
V
V
Output stage ON, except in the
case of two-stage reverse phase
control in second stage (α)
Threshold for test mode
VT
85
100
115
mV
Current Monitoring
11
12
Input current
Switch-off threshold 1
Switch-off threshold 2
0 V ≤V11 ≤V1
±Ii
VT1
VT2
500
120
550
nA
mV
mV
80
450
100
500
Switching Output
Leakage current
V11 < 450 mV, V12 ≤V15
Ilkg
1
µA
V11 > 550 mV
I12 = 0.5 mA
I12 = 10 mA
Saturation voltage
VSat
VSat
1.0
1.2
V
V
Push-pull Output Stage
Upper saturation voltage,
ON state
I14 = -10 mA
I14 = 10 mA
14, 15
14
-VSat
VSatL
2.4
1.2
V
V
Lower saturation voltage,
OFF state
ON state
OFF state
-IO
IO
50
50
mA
mA
Output current
14
13
4767B–INDCO–10/05
Figure 13-1. House Number or Staircase Illumination for AC Loads
House Number Illumination: V6 = V13
Staircase Illumination: V6 = V15
Vmains
230 V ~
Load
GND
1 nF
Rsh
1 kΩ
22 kΩ/2 W
R1
IGBT
100 Ω
1N4007
RG
NTC
VRef
C1
Rsync
47 µF/
25 V
100 kΩ
220 kΩ
VS
9
16
15
14
13
12
11
10
U2102B
1
2
3
4
5
6
7
8
C3
R3
10 nF
820 kΩ
VS
Control
GND
Enable
220 nF
C2
100 kΩ
22 kΩ
1 MΩ
Trigger
signal
R2
CRef
1 µF
14
U2102B
4767B–INDCO–10/05
U2102B
Figure 13-2. Zero-voltage Switch Mode for AC Loads
Vmains
230 V ~
Load
GND
1 nF
Rsh
1 kΩ
IGBT
100 Ω
R1 = Rsync
RG
NTC
VRef
68 kΩ
18 kΩ/2 W
C1
47 µF/25 V
1N4007
VS
16
15
14
13
12
11
10
9
U2102B
1
2
3
4
5
6
7
8
R3
C3
22 nF
750 kΩ
C2
Enable
220 nF
22 kΩ
1 MΩ
Trigger
signal
R2
CRef
1 µF
15
4767B–INDCO–10/05
Figure 13-3. Reverse Phase Control for AC Loads
Vmains
230 V ~
Load
1 nF
Rsh
1 kΩ
R1
IGBT
22 kΩ/2 W
100 Ω
VS
1N4007
RG
C1
100 kΩ
100 kΩ
Rsync = 220 kΩ
47 µF/
25V
VS
16
15
14
13
12
11
10
9
U2102B
1
2
3
4
5
6
7
8
C3
100 kΩ
10 nF
100 kΩ
R3
1 MΩ
Control
100 kΩ
VS
CRef = 1 µF
16
U2102B
4767B–INDCO–10/05
U2102B
14. Ordering Information
Extended Type Number
Package
DIP16
SO16
Remarks
U2102B-xY
Tube, Pb-free
U2102B-xFPY
Tube, Pb-free
U2102B-xFPG3Y
SO16
Taped and reeled, Pb-free
15. Package Information
Package DIP16
Dimensions in mm
7.82
7.42
20.0 max
4.8 max
6.4 max
3.3
0.5 min
0.39 max
9.75
8.15
1.64
1.44
0.58
0.48
2.54
17.78
Alternative
16
9
technical drawings
according to DIN
specifications
1
8
17
4767B–INDCO–10/05
5.2
4.8
Package SO16
Dimensions in mm
10.0
9.85
3.7
1.4
0.2
0.25
0.10
0.4
3.8
1.27
6.15
5.85
8.89
16
9
technical drawings
according to DIN
specifications
1
8
16. Revision History
Please note that the following page numbers referred to in this section refer to the specific revision
mentioned, not to this document.
Revision No.
History
• Put datasheet in a new template
• First page: Pb-free logo added
4767B-INDCO-08/05
• Page 17: Ordering Information changed
18
U2102B
4767B–INDCO–10/05
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