TX5304 [TAOS]

Standard SRAM, 128KX16, 100ns, CMOS, CPGA50, 0.100 INCH PITCH, CERAMIC, PGA-50;
TX5304
型号: TX5304
厂家: TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS    TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS
描述:

Standard SRAM, 128KX16, 100ns, CMOS, CPGA50, 0.100 INCH PITCH, CERAMIC, PGA-50

静态存储器 内存集成电路
文件: 总6页 (文件大小:132K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Texas Components Corporation TX5304  
2- Megabit (128K X 16) High-Temperature Static RAM  
FEATURES  
APPLICATIONS  
Operation to 200°C  
Popular 50-pin PGA footprint  
Single 5 V supply  
Robust Geometry  
Access time : 100 ns at rated temperature  
Completely static memory  
(128K x 16 bit) or (2 128K x 8 bit) organization  
Tri-state output  
High Temperature Digital Systems  
Petroleum LWD and MWD tools  
Petroleum reservoir monitoring  
DESCRIPTION  
The TX5304 is a CMOS static RAM organized as 131,072 x 16-bit words. The device is packaged  
in a proprietary 50-pin ceramic PGA package employing the 5 x 10 pin footprint with a pitch of 0.1  
inch. Powered by a single +5 V supply, the unit offers low standby power dissipation and is  
suitable for battery backup systems. Three optional access times are available; output lines are  
tri-state; power consumption can be minimized through use of the data retention mode.  
The TX5304 is composed of two individual SRAM modules, each with 128K x 8-bit memory.  
Each module has private enable/select lines permitting store/ access of either 8-bit or 16-bit data.  
FUNCTIONAL BLOCK DIAGRAM  
ADDR [ 0.. 16 ]  
OE  
WE  
Memory 1  
128K X 8 SRAM  
Memory 2  
128K X 8 SRAM  
CS11  
CS21  
CS12  
CS22  
I/O [ 8..15 ]  
I/O [ 0..7 ]  
Copyright 2007 Texas Components Corporation  
www.texascomponents.com  
October 10, 2007  
Texas Components Corporation TX5304  
ABSOLUTE MAXIMUM RATINGS  
Parameter  
Symbol  
Value  
Unit  
Supply Voltage relative to Vss  
Vcc  
VT  
-0.5 to + 5.5  
V
V
Voltage on any pin relative to Vss  
-0.5 to Vcc + 0.5  
Operating Temperature Range  
Storage Temperature Range  
Topr  
Tstg  
-55 to + 200  
-55 to + 200  
ºC  
ºC  
RECOMMENDED DC OPERATING CONDITIONS (Topr = 0 to +125ºC)  
Parameter  
Symbol  
Min  
Max  
Unit  
Supply Voltage  
Vcc  
Vss  
VIH  
VIL  
4.5  
0
5.5  
V
V
V
V
0
Input High Voltage  
Input Low Voltage  
2.2  
-0.5  
VCC + 0.2  
0.8  
DC OPERATING CHARACTERISTICS (Topr = 0 to +70ºC)  
Parameter  
Symbol  
Typ  
Unit  
Input Leakage Current  
Output Leakage Current  
IIN  
2.0  
2.0  
µA  
µA  
IOUT  
Operating Supply Current  
Standby Supply Current  
Data Retention Supply Current  
Vcc = 3.0  
ICC  
70  
mA  
mA  
ISB1  
4.0  
IDR  
0.2  
0.2  
0.4  
2.4  
uA  
uA  
V
Vcc = 2.0  
IDR  
Output Voltage Low  
Output Voltage High  
VOL  
VOH  
V
TRUTH TABLE  
Mode  
For 128K x 16 bit operation  
CS21/CS22  
CS11/CS12  
*WE  
*OE  
I/O Pin Supply Current  
Not Selected  
Not Selected  
Output Disable  
Read  
L
X
H
L
X
X
H
H
L
X
X
H
L
High-Z  
Standby  
Standby  
Active  
X
H
H
H
High-Z  
High-Z  
L
Data Output  
Data Input  
Active  
Write  
L
X
Active  
H = High Voltage, L = Low Voltage, X = Don’t Care  
Copyright 2007 Texas Components Corporation  
www.texascomponents.com  
October 10, 2007  
Texas Components Corporation TX5304  
Low VCC Data Retention Characteristics  
Parameter  
Symbol  
Typ  
Unit  
VCC for data retention  
VDR  
1.5  
V
Chip deselect to data retention time  
Operation recovery time  
tCDR  
tRc  
0
ns  
ns  
100  
( CS11/CS21 Controlled )  
Low Vcc Data Retention Timing (
Tcdr  
Data Retention Mode  
Tr  
Vcc  
4.5V  
2.2V  
Vdr1  
_________  
CS11/CS12  
CS1 > Vcc - 0.2V  
CS11/CS12 > Vcc - 0.2V  
0V  
( CS21/CS22 Controlled )  
Low Vcc Data Retention Timing
Tcdr  
Data Retention Mode  
Tr  
Vcc  
4.5V  
CS21/CS22  
Vdr2  
0.4V  
0V  
CS21/CS22 < 0.2V  
Copyright 2007 Texas Components Corporation  
www.texascomponents.com  
October 10, 2007  
Texas Components Corporation TX5304  
AC OPERATING CHARACTERISTICS – READ CYCLE  
Parameter  
Symbol  
Min  
Max  
Unit  
Notes  
Read Cycle time  
tRC  
100  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address access time  
tAA  
tCO  
tOE  
tLZ  
100  
100  
50  
Chip selecton to output valid  
Output enable to output valid  
Chip selection to output in low-Z  
Output enable to output in low-Z  
Output enable to output in high-Z  
Output disable to output in high-Z  
Output hold from address change  
10  
10  
tOZ  
tHZ  
tOHZ  
tOH  
40  
35  
10  
Trc  
Read Timing Waveforms  
WE is high for read cycle  
Address  
Address Valid  
Taa  
_________  
CS11/CS12  
Tco1  
Thz1  
Tlz1  
Tlz2  
Tcc2  
CS21/CS22  
Thz2  
Tohz  
OE  
Toe  
Tolz  
Toh  
Hi Z  
Dout  
Data Valid  
AC OPERATING CHARACTERISTICS – WRITE CYCLE  
Parameter  
Symbol  
Typ  
Max  
Unit  
Notes  
Write Cycle time  
tWC  
tCW  
tAS  
100  
100  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip selection time  
Address setup time  
Address valid to end of write  
Write pulse width  
tAW  
tWP  
tWR  
tWHZ  
tDW  
tDH  
100  
50  
0
Write recovery time  
Write to output in High-Z  
Data to write time overlap  
Data hold from write time  
Output active from end of write  
Output disable to output in High-Z  
25  
40  
0
30  
30  
tOW  
tOHZ  
5
5
Copyright 2007 Texas Components Corporation  
www.texascomponents.com  
October 10, 2007  
Texas Components Corporation TX5304  
Write Timing Cycle (1)  
OE Clock  
Twc  
Address  
Address Valid  
Taw  
OE  
Tcw  
Twp  
_________  
CS11/CS12  
Twr  
CS21/CS22  
Tas  
WE  
Tohz  
Hi Z  
Tow  
Dout  
Din  
Toh  
Data Valid  
Write Timing Cycle (2)  
OE low fixed  
Twc  
Address  
Address Valid  
Tcw  
Twr  
_________  
CS11/CS12  
CS21/CS22  
Taw  
Twp  
WE  
Toh  
Tas  
Tow  
Tdh  
Twhz  
Dout  
Din  
Tdw  
Hi Z  
Data Valid  
Copyright 2007 Texas Components Corporation  
www.texascomponents.com  
October 10, 2007  
Texas Components Corporation TX5304  
PACKAGE INFORMATION:  
A
B
C
D
E
____  
1
N.C.  
Vss  
N.C.  
A14  
A6  
N.C.  
N.C.  
A16  
A12  
A5  
N.C.  
N.C.  
N.C.  
CS22  
CS21  
A8  
CS12  
2
Vcc  
___  
3
WE  
A15  
A13  
A9  
4
A7  
___  
5
OE  
A11  
____  
6
A4  
A3  
A2  
CS11  
A10  
I/O11  
I/O14  
Vcc  
7
A1  
A0  
I/O13  
I/O8  
I/O3  
I/O4  
I/O12  
I/O15  
I/O5  
8
I/O10  
Vss  
I/O0  
I/O9  
I/O1  
I/O2  
9
10  
I/O6  
I/O7  
WARNING! Static Sensitive Device.  
The TX5304 is a hybrid network that includes several sensitive components. These components  
can be damaged or destroyed by discharge of static electricity. The discharge of static electricity  
is commonly referred to as Electrostatic Discharge (ESD).  
The TX5304 can be protected from ESD by the following common procedures used with discrete  
semiconductors, namely:  
1. Always store units in closed conductive containers  
2. All personnel that handle units must wear static dissipative outer garments and must  
be electrically grounded  
3. Always use a grounded soldering iron when making electrical connections  
4. Worktables must have grounded dissipative covering.  
ESD can cause subtle problems that have longer term, damaging affect.  
Copyright 2007 Texas Components Corporation  
www.texascomponents.com  
October 10, 2007  

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