HV518 [SUPERTEX]
32-Channel Vacuum-Fluorescent Display Driver; 32通道真空荧光显示驱动器
| 型号： | HV518 |
| 厂家： | 
Supertex, Inc |
| 描述： | 32-Channel Vacuum-Fluorescent Display Driver |
| 文件： | 总5页 (文件大小：450K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HV518
32-Channel Vacuum-Fluorescent Display Driver
Ordering Information
Package Options
Device
40 Pin Dip
44 Plastic Chip Carrier
Die
HV518
HV518P
HV518PJ
HV518X
Features
General Description
The HV518 is designed for vacuum fluorescent or DC plasma
applications, where it can serve as a segment, digit or matrix
display driver. Each device has 32 outputs, 32 latches and a 32
bit cascadable shift register.
❏ 32 output lines
❏ 90V output swing
❏ Active pull-down
❏ Latches on all outputs
SerialdataenterstheshiftregisterontheLOW-to-HIGHtransition
of the clock input. With latch enable (LE) HIGH, parallel data is
transferred to the output buffers through a 32-bit latch. When LE
is low the data is stored in the latch. When STROBE is LOW, all
outputs are enabled; if STROBE is HIGH, all outputs are LOW.
❏ Up to 6MHz @ VDD = 5V
❏ -40°C to +85°C operation
Absolute Maximum Ratings
1
Supply voltage, VDD
Supply voltage, VPP
Logic input levels1
-0.5V to +6.0V
1
-0.5V to +90V
-0.5V to VDD +0.5V
1200mW
Continuous total power dissipation 2,3
Operating temperature range
Storage temperature range
-40°C to +85°C
-65°C to +150°C
260°C
Lead temperature 1.6mm(1/16 inch)
from case for 10 seconds
Notes:
1. All voltages referenced to GND.
2. Duty cycle is limited by the total power dissipated in the package.
3. For operation above 25°C ambient, derate linearly to 85°C at 20mW/°C.
12/13/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
HV518
Electrical Characteristics
(over recommended ranges of operating free-air temperature and VDD. Unless otherwise noted, VPP = 80V)
Symbol
IDD
Parameter
Min
Typ
Max
10
Units
mA
mA
mA
mA
µA
V
Conditions
Supply current
VDD = 5V, fCH = 6.0 MHz
VDD = 5.5V, VIN = 0V
Output high, TA = -40°C
Output high, TA = 0 to +85°C
Outputs low
IDDQ
IPP
Quiescent supply current
Supply current
0.5
12
7
10
500
VOH
High-level output voltage
Low-level output
HVoutput
70.0
4.5
IOH= -25mA
Serial output
HVoutput
4.9
5
5
V
V
DD = 5V, IOH = -20µA
IOL= 1mA
IOL =20µA
VOL
V
Serial output
0.06
0.1
0.8
1
V
IIH
IIL
High-level logic input current
Low-level logic input current
µA
µA
VIH = VDD
VIL = 0V
-0.1
-1
Note: The total number of ON outputs times the duty cycle must not exceed the allowable package power disspation.
Switching Characteristics (VPP = 80V, CL = 50 pF, TA = 25°C, unless otherwise noted)
Symbol Parameter
Min
Max
Unit
Conditions
td
Delay time, Clock to data output
VDD = 4.5V
VDD = 4.5V
600
ns
CL =15 pF
See Figure 4
tDHL
Delay time, high-to-low-level, from latch enable
HVoutput from strobe
Delay time, low-to-high-level from latch enable
HVoutput from strobe
1.5
1
µs
µs
See Figure 5
See Figure 6
See Figure 5
See Figure 6
See Figure 6
See Figure 6
tDLH
VDD = 4.5V
1.5
1
tTHL
tTLH
Transition time, high-to-low-level, HVoutput
Transition time, low-to-high-level, HVoutput
VDD = 4.5V
VDD = 4.5V
3
µs
µs
2.5
Recommended Operating Conditions (TA = 25°C, unless otherwise noted)
Symbol
VDD
VPP
VIH
Parameter
Min
4.5
8
Max
5.5
80
Units
Logic voltage supply
High voltage supply
V
V
High-level input voltage (See Fig.3.)
Low-level input voltage (See Fig. 3.)
High-level output current
VDD = 4.5V
VDD = 4.5V
3.5
V
VIL
1
V
IOH
-25
mA
mA
MHz
ns
ns
ns
ns
°C
IOL
Low-level output current
2
fCLK
tw(CKH)
tw(CKL)
tsu
Clock frequency (see Figure 3)
Pulse duration , clock high
Pulse duration , clock low
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
VDD = 4.5V
6.0
83
83
Setup time, data before clock
Hold time, data after clock
75
th
75
TA
Operating free-air temperature
-40
85
Note:
Power-up sequence should be the following:
1. Connect ground.
4. Apply VPP
.
2. Apply VDD
.
5. The VPP should not drop below VDD or float during operation.
3. Set all inputs (Data, CLK, Enable, etc.) to a known state.
Power-down sequence should be the reverse of the above.
2
HV518
Input and Output Equivalent Circuits
V
DD
V
DD
V
PP
Data Out
HV
OUT
Input
GND
GND
GND
Logic Data Output
Logic Inputs
High Voltage Outputs
Parameter Measurement Information
t
w(CKH)
V
V
V
IH
IH
Latch Enable
50%
Clock
50%
V
IL
IL
t
w(CKL)
t
t
or t
DLH
DHL
t
V
V
su
h
OH
OL
90%
10%
HV Output
V
V
IH
IL
Data In
Figure 3: Input Timing Voltage Waveforms
Figure 5
V
V
V
V
IH
t
w(CKH)
50%
t
Strobe
V
V
IH
IL
IL
Clock
50%
t
t
DLH
DHL
OH
OL
90%
10%
d
HV Output
V
V
OH
OL
Data
Output
50%
t
t
THL
TLH
Figure 4
Figure 6: Switching-Time Voltage Waveforms
Note: For testing purposes, all input pulses have maximum rise and fall times of 30 nsec.
3
HV518
Block Diagram
LE
STB
V
PP
HV
1
OUT
D
IN
32-Bit
Shift
Latches
CLK
Register
D
OUT
HV
32
OUT
Truth Tables
Input
Output
Data In
LE
STB
H
HV Outputs
All Low
High
Data In
CLK
Data Out
X
H
L
X
H
H
L
H
L
H
L
*
L
L
Low
X
No Change
* Previous state
X
L
*
* Previous state
Typical Operating Sequence
Clock
• • •
Data In
VALID
IRRELEVANT
SR Contents
INVALID
VALID
Latch Enable
Latch
Contents
PREVIOUSLY STORED DATA
NEW DATA VALID
Strobe
HV Output
VALID
4
HV518
Pin Configurations
Package Outline
HV518
40 Pin Dual-In-Line Package
40
1
Pin Function
Pin Function
1
2
3
4
5
6
7
8
VPP
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
Clock
LE
Serial Out
HVOUT 32
HVOUT 31
HVOUT 30
HVOUT 29
HVOUT 28
HVOUT 27
HVOUT 26
HVOUT 25
HVOUT 24
HVOUT 23
HVOUT 22
HVOUT 21
HVOUT 20
HVOUT 19
HVOUT 18
HVOUT 17
Strobe
HVOUT 16
HVOUT 15
HVOUT 14
HVOUT 13
HVOUT 12
HVOUT 11
HVOUT 10
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
Data In
VDD
9
10
11
12
13
14
15
16
17
18
19
20
9
8
7
6
5
4
3
2
1
20
21
top view
40-pin DIP
GND
39 38 37 36 35 34 33 32 31 30 29
HV518
44 Pin J-Lead Package
Pin Function
28
27
26
25
24
23
22
21
20
19
18
40
41
42
43
44
1
Pin Function
1
VPP
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Clock
LE
HVOUT 16
HVOUT 15
HVOUT 14
N/C
2
3
4
5
Serial Out
HVOUT 32
HVOUT 31
HVOUT 30
N/C
2
6
3
7
8
9
HVOUT 29
HVOUT 28
HVOUT 27
HVOUT 26
HVOUT 25
HVOUT 24
HVOUT 23
HVOUT 22
HVOUT 21
HVOUT 20
HVOUT 19
N/C
N/C
4
HVOUT 13
HVOUT 12
HVOUT 11
HVOUT 10
5
6
10
11
12
13
14
15
16
17
18
19
20
21
22
7
8
9
10 11 12 13 14 15 16 17
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
HVOUT
Data In
VDD
9
8
7
6
5
4
3
2
1
top view
HVOUT 18
HVOUT 17
Strobe
GND
12/13/010
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
5
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
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