VN610SP-E [STMICROELECTRONICS]
SINGLE CHANNEL HIGH SIDE DRIVER; 单路高侧驱动器
| 型号： | VN610SP-E |
| 厂家： | 
ST |
| 描述： | SINGLE CHANNEL HIGH SIDE DRIVER |
| 文件： | 总18页 (文件大小：189K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VN610SP-E
SINGLE CHANNEL HIGH SIDE DRIVER
Figure 1. Package
Table 1. General Features
Type
R
DS(on)
I
V
CC
out
VN610SP-E
10 mΩ
45 A
36 V
■OUTPUT CURRENT: 45 A
■ CMOS COMPATIBLE INPUT
■ PROPORTIONAL LOAD CURRENT SENSE
■ UNDERVOLTAGE AND OVERVOLTAGE
10
SHUT-DOWN
■ OVERVOLTAGE CLAMP
■ THERMAL SHUT DOWN
■ CURRENT LIMITATION
1
PowerSO-10™
■ VERY LOW STAND-BY POWER DISSIPATION
■ PROTECTION AGAINST:
LOSS OF GROUND AND LOSS OF V
CC
■ REVERSE BATTERY PROTECTION (*)
■ IN COMPLIANCE WITH THE 2002/95/EC
EUROPEAN DIRECTIVE
DESCRIPTION
This device integrates an analog current sense
which delivers a current proportional to the load
current (according to a known ratio). Active current
limitation combined with thermal shut-down and
automatic restart protect the device against
overload. Device automatically turns off in case of
ground pin disconnection.
The VN610SP-E is a monolithic device made
using
STMicroelectronics
VIPower
M0-3
technology. It is intended for driving resistive or
inductive loads with one side connected to ground.
Active V
pin voltage clamp protects the device
CC
against low energy spikes (see ISO7637 transient
compatibility table).
Table 2. Order Codes
Package
Tube
Tape and Reel
PowerSO-10™
VN610SP-E
VN610SPTR-E
Note: (*) See application schematic at page 9
Rev. 1
1/18
October 2004
VN610SP-E
Figure 2. Block Diagram
V
CC
OVERVOLTAGE
UNDERVOLTAGE
V
CC
CLAMP
PwCLAMP
DRIVER
OUTPUT
GND
I
LIM
V
DSLIM
LOGIC
I
OUT
CURRENT
SENSE
INPUT
K
OVERTEMP.
Table 3. Absolute Maximum Ratings
Symbol
Parameter
Value
41
Unit
V
V
DC supply voltage
CC
-V
Reverse DC supply voltage
DC reverse ground pin current
DC output current
-0.3
-200
V
CC
- I
mA
A
GND
I
Internally limited
OUT
- I
Reverse DC output current
DC input current
-50
A
OUT
I
+/- 10
mA
IN
-3
V
V
V
Current sense maximum voltage
CSENSE
+15
Electrostatic Discharge (Human Body Model:
R=1.5KΩ; C=100pF)
4000
2000
5000
5000
V
V
V
V
- INPUT
V
ESD
- CURRENT SENSE
- OUTPUT
- V
CC
Maximum Switching Energy
(L=0.05mH; R =0Ω; V =13.5V; T =150ºC;
jstart
E
MAX
193
mJ
L
bat
I =75A)
L
P
Power dissipation at T <25°C
139
W
°C
°C
°C
tot
C
T
Junction operating temperature
Case operating temperature
Storage temperature
Internally limited
-40 to 150
j
T
c
T
-55 to 150
STG
2/18
VN610SP-E
Figure 3. Configuration Diagram (Top View) & Suggested Connections for Unused and N.C. Pins
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
5
4
3
6
7
8
9
GROUND
INPUT
C.SENSE
N.C.
2
1
N.C.
10
11
VCC
Connection / Pin
Current Sense
N.C.
Output
Input
Floating
X
X
X
Through
1KΩresistor
To Ground
X
Through 10KΩ resistor
Figure 4. Current and Voltage Conventions
I
S
V
CC
V
F
V
CC
I
OUT
OUTPUT
I
V
IN
OUT
INPUT
V
IN
I
SENSE
CURRENT SENSE
GND
V
SENSE
I
GND
Table 4. Thermal Data
Symbol
Parameter
Value
Unit
°C/W
°C/W
°C/W
R
Thermal resistance junction-case
(MAX)
0.9
thj-case
1
50.9 ( )
R
Thermal resistance junction-ambient
(MAX)
thj-amb
2
36( )
(1)
2
Note:
Note:
When mounted on a standard single-sided FR-4 board with 0.5cm of Cu (at least 35µm thick).
(2)
2
When mounted on a standard single-sided FR-4 board with 6 cm of Cu (at least 35µm thick).
3/18
VN610SP-E
ELECTRICAL CHARACTERISTICS
(8V<V <36V; -40°C<T <150°C; unless otherwise specified)
CC
j
(Per each channel)
Table 5. Power
Symbol
Parameter
Test Conditions
Min.
5.5
3
Typ.
13
4
Max.
36
Unit
V
V
Operating supply voltage
Undervoltage shutdown
Overvoltage shutdown
CC
V
USD
5.5
V
V
OV
(See Note 1)
36
V
I
I
I
=15A; T =25°C
10
20
35
mΩ
mΩ
mΩ
OUT
OUT
OUT
j
R
On state resistance
Clamp Voltage
=15A; T =150°C
j
ON
=9A; V =6V
CC
V
clamp
I
=20 mA (see note 1)
41
48
10
55
25
V
CC
Off State; V =13V; V =V
=0V
CC
IN
OUT
µA
Off State; V =13V; V =V
=0V;
OUT
CC
IN
I
S
Supply current
T =25°C
j
10
20
5
µA
On State; V =13V; V =5V; I =0A
OUT
CC
IN
mA
R
=3.9K
SENSE
I
I
I
I
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
V =V =0V
OUT
0
50
0
µA
µA
µA
µA
L(off1)
L(off2)
L(off3)
L(off4)
IN
V =0V; V
=3.5V
-75
IN
OUT
V =V
=0V; V =13V; T =125°C
OUT
5
IN
CC
j
V =V
=0V; V =13V; T =25°C
OUT
3
IN
CC
j
Note: 1. V
and V are correlated. Typical difference is 5V.
OV
clamp
Table 6. Protection (see note 2)
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
=13V
45
75
120
120
A
A
CC
I
lim
DC Short circuit current
5.5V<V <36V
CC
Thermal shutdown
temperature
T
150
175
200
°C
TSD
Thermal reset tempera-
ture
T
135
7
°C
°C
R
T
Thermal hysteresis
15
HYST
I
I
=2A; V =0; L=6mH
IN
Turn-off output voltage
clamp
OUT
V
V
CC
-41
V
-48
V -55
CC
V
DEMAG
CC
Output voltage drop limi-
tation
V
ON
=1.5A; T = -40°C...+150°C
50
mV
OUT
j
Note: 2. To ensure long term reliability under heavy overload or short circuit conditions, protection and related diagnostic signals must be
used together with a proper software strategy. If the device is subjected to abnormal conditions, this software must limit the duration
and number of activation cycles
Table 7. V - Output Diode
CC
Symbol
Parameter
Test Conditions
=8A; T =150°C
Min
Typ
Max
Unit
V
F
Forward on Voltage
-I
0.6
V
OUT
j
4/18
VN610SP-E
ELECTRICAL CHARACTERISTICS (continued)
Table 8. Current Sense (9V≤VCC≤16V) (See Figure 5)
Symbol
Parameter
Test Conditions
Min
Typ
Max
Unit
I
=1.5A; V
=0.5V;
OUT
SENSE
K
I
/I
3300
4400
6000
1
OUT SENSE
T = -40°C...150°C
j
I
=1.5A; V
=0.5V;
OUT
SENSE
dK1/K1
Current Sense Ratio Drift
I /I
OUT SENSE
-10
+10
%
T = -40°C...150°C
j
I
=15A; V
=4V; T=-40°C
4200
4400
4900
4900
6000
5750
OUT
SENSE
j
K
2
T =25°C...150°C
j
I
=15A; V
=4V; T=-40°C
OUT
SENSE j
dK2/K2
Current Sense Ratio Drift
I /I
OUT SENSE
-6
+6
%
%
T =25°C...150°C
j
I
=45A; V
=4V; T=-40°C
4200
4400
4900
4900
5500
5250
OUT
SENSE
j
K
3
T =25°C...150°C
j
I
=45A; V
=4V; T=-40°C
OUT
SENSE j
dK3/K3
Current Sense Ratio Drift
Analog sense current
-6
+6
T =25°C...150°C
j
Vcc=6...16V; I
40°C...150°C
=0A; V
=0V; Tj=-
OUT
SENSE
I
SENSE0
Off State; V =0V
IN
0
0
5
µA
µA
V
On State; V =5V
IN
10
Max analog sense
output voltage
V
V
=5.5V; I
=7.5A; R =10KΩ
SENSE
3.5
5
CC
CC
OUT
V
SENSE
>8V; I
=15A; R =10KΩ
SENSE
V
OUT
Analog sense output
voltage in overtemperature
condition
V
V
=13V; R =3.9KΩ
SENSE
5.5
V
SENSEH
CC
CC
Analog sense output
impedance in
R
V
=13V; T >T ; Output Open
TSD
400
Ω
VSENSEH
j
overtemperature condition
Current sense delay
reponse
t
to 90% I
(see note 3)
500
µs
DSENSE
SENSE
Note: 3. Current sense signal delay after positive input slope.
Table 9. Switching (V =13V)
CC
Symbol
Parameter
Turn-on delay time
Turn-off delay time
Test Conditions
Min
Typ
50
50
Max
Unit
µs
µs
t
t
R =0.87Ω
L
d(on)
d(off)
R =0.87Ω
L
See
(dV
(dV
/dt)
Turn-on voltage slope
Turn-off voltage slope
R =0.87Ω
relative
V/µs
V/µs
OUT
OUT
on
off
L
diagram
See
/dt)
R =0.87Ω
L
relative
diagram
5/18
VN610SP-E
Table 10. Logic Input
Symbol
Parameter
Input low level voltage
Test Conditions
Min
Typ
Max
Unit
V
V
IL
1.25
I
Low level input current V =1.25V
1
µA
V
IL
IN
V
Input high level voltage
3.25
IH
IH
I
High level input current V =3.25V
10
8
µA
V
IN
V
Input hysteresis voltage
0.5
6
I(hyst)
I =1mA
6.8
V
IN
V
Input clamp voltage
ICL
I =-1mA
IN
-0.7
V
Figure 5.
IOUT/ISENSE
6500
6000
5500
5000
4500
4000
3500
3000
max.Tj=-40°C
max.Tj=25...150°C
min.Tj=25...150°C
typical value
min.Tj=-40°C
0
5
10
15
20
25
30
35
40
45
50
IOUT
Table 11. Truth Table
CONDITIONS
INPUT
OUTPUT
SENSE
L
H
L
L
H
L
L
L
L
L
L
L
L
L
H
H
0
Normal operation
Overtemperature
Undervoltage
Nominal
0
H
L
V
SENSEH
0
0
H
L
0
0
0
Overvoltage
H
L
Short circuit to GND
H
H
L
(T <T
) 0
) V
0
j
TSD
TSD
(T >T
j
SENSEH
Short circuit to V
CC
H
< Nominal
Negative output voltage
clamp
L
L
0
6/18
VN610SP-E
Figure 6. Switching Characteristics (Resistive load R =0.87Ω)
L
V
OUT
90%
80%
dV /dt
OUT (off)
dV /dt
OUT (on)
10%
t
f
t
r
t
I
SENSE
90%
t
t
DSENSE
INPUT
t
d(on)
t
d(off)
t
Table 12. Electrical Transient Requirements On V
ISO T/R 7637/1
Pin
CC
TEST LEVELS
III
I
II
IV
Delays and
Impedance
Test Pulse
1
2
-25 V
+25 V
-25 V
-50 V
+50 V
-50 V
-75 V
+75 V
-100 V
+75 V
-6 V
-100 V
+100 V
-150 V
+100 V
-7 V
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
3a
3b
4
+25 V
-4 V
+50 V
-5 V
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
ISO T/R 7637/1
Test Pulse
TEST LEVELS RESULTS
I
II
C
C
C
C
C
E
III
C
C
C
C
C
E
IV
C
C
C
C
C
E
1
2
C
C
C
C
C
C
3a
3b
4
5
CLASS
CONTENTS
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
7/18
VN610SP-E
Figure 7. Waveforms
NORMAL OPERATION
INPUT
LOAD CURRENT
SENSE CURRENT
UNDERVOLTAGE
V
CC
VUSDhyst
VUSD
INPUT
LOAD CURRENT
SENSE CURRENT
OVERVOLTAGE
VOV
VCC > VUSD
V
CC
VOVhyst
INPUT
LOAD CURRENT
SENSE
SHORT TO GROUND
INPUT
LOAD CURRENT
LOAD VOLTAGE
SENSE CURRENT
SHORT TO V
CC
INPUT
LOAD VOLTAGE
LOAD CURRENT
SENSE CURRENT
<Nominal
<Nominal
OVERTEMPERATURE
TTSD
TR
T
j
INPUT
LOAD CURRENT
SENSE CURRENT
I
=V
SENSE
/(R
SENSEH
+R
SENSE
)
SENSEH
8/18
VN610SP-E
Figure 8. Application Schematic
+5V
V
CC
R
prot
INPUT
D
ld
R
prot
µC
OUTPUT
CURRENT SENSE
R
SENSE
GND
R
GND
V
GND
D
GND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift ( 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
Series resistor in INPUT line is also required to prevent
that, during battery voltage transient, the current exceeds
the Absolute Maximum Rating.
Safest configuration for unused INPUT pin is to leave it
unconnected, while unused SENSE pin has to be
connected to Ground pin.
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
GND
The following is an indication on how to dimension the
R
resistor.
GND
1) R
2) R
≤ 600mV / (I
).
GND
GND
S(on)max
≥ (−V ) / (-I
)
GND
CC
where -I
is the DC reverse ground pin current and can
GND
be found in the absolute maximum rating section of the
device’s datasheet.
LOAD DUMP PROTECTION
Power Dissipation in R
(when V <0: during reverse
CC
GND
battery situations) is:
D
is necessary (Voltage Transient Suppressor) if the
ld
2
load dump peak voltage exceeds V
max DC rating.
CC
P = (-V ) /R
D
CC
GND
The same applies if the device will be subject to
transients on the V
shown in the ISO T/R 7637/1 table.
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
line that are greater than the ones
CC
calculated with formula (1) where I
becomes the
S(on)max
µC I/Os PROTECTION:
sum of the maximum on-state currents of the different
devices.
If a ground protection network is used and negative
Please note that if the microprocessor ground is not
transients are present on the V line, the control pins will
CC
common with the device ground then the R
will
be pulled negative. ST suggests to insert a resistor (R
in line to prevent the µC I/Os pins to latch-up.
)
GND
prot
produce a shift (I
* R
) in the input thresholds
GND
S(on)max
and the status output values. This shift will vary
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up
limit of µC I/Os.
depending on how many devices are ON in the case of
several high side drivers sharing the same R
.
GND
If the calculated power dissipation leads to a large
resistor or several devices have to share the same
resistor then the ST suggests to utilize Solution 2 (see
below).
-V
/I
≤ R
≤ (V
-V -V
OHµC IH GND
) / I
CCpeak latchup
prot
IHmax
Calculation example:
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
CCpeak
latchup
OHµC
Solution 2: A diode (D
) in the ground line.
GND
5kΩ ≤ R
≤ 65kΩ.
prot
A resistor (R
GND
=1kΩ) should be inserted in parallel to
GND
D
if the device will be driving an inductive load.
Recommended R
value is 10kΩ.
prot
9/18
VN610SP-E
Figure 9. Off State Output Current
Figure 10. High Level Input Current
IL(off1) (µA)
Iih (uA)
9
5
4.5
8
Vin=3.25V
Off state
Vcc=36V
4
7
Vin=Vout=0V
3.5
3
6
5
4
3
2
1
0
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 11. Input Low Level
Figure 13. Input High Level
Vil (V)
Vih (V)
3.6
2.6
2.4
2.2
2
3.4
3.2
3
1.8
1.6
1.4
1.2
1
2.8
2.6
2.4
2.2
2
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Figure 12. Input Clamp Voltage
Figure 14. Input Hysteresis Voltage
Vhyst (V)
Vicl (V)
1.5
8
1.4
1.3
1.2
1.1
1
7.8
Iin=1mA
7.6
7.4
7.2
7
0.9
0.8
0.7
0.6
0.5
6.8
6.6
6.4
6.2
6
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
10/18
VN610SP-E
Figure 15. Overvoltage Shutdown
Figure 18. I Vs T
LIM case
Vov (V)
Ilim (A)
50
160
48
46
44
42
40
38
36
34
32
30
140
120
100
80
Vcc=13V
60
40
20
0
-50
-25
0
25
50
75
100
125
150
175
175
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (ºC)
Figure 16. Turn-on Voltage Slope
Figure 19. Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
900
700
650
800
Vcc=13V
Rl=0.87Ohm
Vcc=13V
Rl=0.87Ohm
600
700
550
500
450
400
350
300
250
600
500
400
300
200
100
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
175
Tc (ºC)
Figure 17. On State Resistance Vs T
Figure 20. On State Resistance Vs V
case
CC
Ron (mOhm)
Ron (mOhm)
25
25
22.5
22.5
Iout=15A
Iout=15A
Vcc=8V; 36V
20
20
Tc= 125ºC
17.5
17.5
15
12.5
10
15
12.5
10
Tc= 25ºC
7.5
5
7.5
Tc= - 40ºC
5
2.5
0
2.5
0
-50
-25
0
25
50
75
100 125 150
5
10
15
20
25
30
35
40
Tc (ºC)
Vcc (V)
11/18
VN610SP-E
Figure 21. Maximum turn off current versus load inductance
LMAX (A)
I
1000
100
A
B
C
10
1
0.01
0.1
1
10
100
L(mH)
A = Single Pulse at T
=150ºC
Values are generated with R =0Ω
L
Jstart
B= Repetitive pulse at T
=100ºC
Jstart
In case of repetitive pulses, T
(at beginning of
jstart
each demagnetization) of every pulse must not
exceed the temperature specified above for
curves B and C.
C= Repetitive Pulse at T
=125ºC
Jstart
Conditions:
V
=13.5V
CC
V , I
IN
L
Demagnetization
Demagnetization
Demagnetization
t
12/18
VN610SP-E
PowerSO-10™ Thermal Data
Figure 22. PowerSO-10™ PC Board
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
th
th
2
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm ).
Figure 23. R
Vs PCB copper area in open box free air condition
thj-amb
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
13/18
VN610SP-E
Figure 24. PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
100
10
Footprint
2
6 cm
1
0.1
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
Time (s)
Figure 25. Thermal fitting model of a double
channel HSD in PowerSO-10
Pulse calculation formula
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Table 13. Thermal Parameter
2
Area/island (cm )
Footprint
6
22
5
Tj_1
C1
R1
C1
R1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
R1 (°C/W)
0.05
0.3
R2 (°C/W)
R3( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Pd1
0.3
C2
Tj_2
0.8
R2
12
Pd2
37
0.001
T_amb
5.00E-03
0.02
0.3
0.75
3
14/18
VN610SP-E
PACKAGE MECHANICAL
Table 14. PowerSO-10™ Mechanical Data
millimeters
Typ
Symbol
Min
Max
A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
3.35
3.4
3.65
3.6
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30
1.27
0.50
1.25
1.20
13.80
13.85
1.35
1.40
14.40
14.35
H (*)
h
L
L (*)
a
1.20
0.80
0º
1.80
1.10
8º
α (*)
2º
8º
Note: (*) Muar only POA P013P
Figure 26. PowerSO-10™ Package Dimensions
B
0.10
A B
10
H
E
E2
E4
1
SEATING
PLANE
DETAIL "A"
e
B
A
C
0.25
D
=
=
=
=
h
D1
SEATING
PLANE
A
F
A1
L
A1
DETAIL "A"
P095A
α
15/18
VN610SP-E
Figure 27. PowerSO-10™ Suggested Pad Layout and Tube Shipment (no suffix)
CASABLANCA
MUAR
14.6 - 14.9
B
10.8 - 11
C
6.30
C
A
A
B
0.67 - 0.73
1
2
3
10
9
0.54 - 0.6
8
9.5
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (± 0.5)
7
4
5
1.27
6
A
B
C (± 0.1)
Casablanca
Muar
50
50
1000
1000
532
532
10.4 16.4
4.9 17.2
0.8
0.8
Figure 28. Tape And Reel Shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
600
600
330
1.5
13
20.2
24.4
60
G (+ 2 / -0)
N (min)
T (max)
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 (± 0.1)
P
24
4
Tape Hole Spacing
Component Spacing
Hole Diameter
24
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
11.5
6.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
End
All dimensions are in mm.
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
16/18
VN610SP-E
REVISION HISTORY
Date
Revision
Description of Changes
Oct. 2004
1
- First Issue.
17/18
VN610SP-E
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
© 2004 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
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www.st.com
18/18
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