VN610SP13TR [ETC]
SINGLE CHANNEL HIGH SIDE SOLID STATE RELAY ; 单路高侧固态继电器\n
| 型号： | VN610SP13TR |
| 厂家： | 
ETC |
| 描述： | SINGLE CHANNEL HIGH SIDE SOLID STATE RELAY
|
| 文件： | 总17页 (文件大小：277K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
®
VN610SP
SINGLE CHANNEL HIGH SIDE SOLID STATE RELAY
TYPE
R
I
V
CC
DS(on)
OUT
VN610SP
10mΩ
45A
36 V
■OUTPUT CURRENT: 45 A
■ CMOS COMPATIBLE INPUT
10
■ PROPORTIONAL LOAD CURRENT SENSE
■ UNDERVOLTAGE AND OVERVOLTAGE
1
PowerSO-10™
SHUT-DOWN
■ OVERVOLTAGE CLAMP
ORDER CODES
TUBE
■ THERMAL SHUT DOWN
PACKAGE
T&R
■ CURRENT LIMITATION
VN610SP VN610SP13TR
PowerSO-10™
■ VERY LOW STAND-BY POWER DISSIPATION
■ PROTECTION AGAINST:
voltage clamp protects the device against low
energy spikes (see ISO7637 transient
LOSS OF GROUND AND LOSS OF VCC
■ REVERSE BATTERY PROTECTION (*)
compatibility table). This device integrates an
analog current sense which delivers a current
proportional to the load current (according to a
known ratio). Active current limitation combined
with thermal shut-down and automatic restart
protect the device against overload. Device
automatically turns off in case of ground pin
disconnection.
DESCRIPTION
The VN610SP is a monolithic device made using
STMicroelectronics VIPower M0-3 technology. It
is intended for driving resistive or inductive loads
with one side connected to ground. Active VCC pin
BLOCK DIAGRAM
V
CC
OVERVOLTAGE
UNDERVOLTAGE
V
CC
CLAMP
PwCLAMP
DRIVER
OUTPUT
GND
I
LIM
V
DSLIM
LOGIC
I
OUT
CURRENT
SENSE
INPUT
K
OVERTEMP.
(*) See application schematic at page 9
October 2002
1/17
1
VN610SP
ABSOLUTE MAXIMUM RATING
Symbol
Parameter
Value
Unit
V
V
DC supply voltage
41
CC
-V
Reverse DC supply voltage
DC reverse ground pin current
DC output current
-0.3
V
CC
- I
-200
mA
A
GND
I
Internally limited
OUT
- I
Reverse DC output current
DC input current
-50
+/- 10
-3
A
OUT
I
mA
V
IN
V
Current sense maximum voltage
CSENSE
+15
V
Electrostatic Discharge (Human Body Model: R=1.5KΩ; C=100pF)
- INPUT
4000
2000
5000
5000
V
V
V
V
V
- CURRENT SENSE
- OUTPUT
ESD
MAX
- V
CC
Maximum Switching Energy
(L=0.05mH; R =0Ω; V =13.5V; T
E
193
mJ
=150ºC; I =75A)
L
bat
jstart
L
P
Power dissipation at T <25°C
139
W
°C
°C
°C
tot
C
T
Junction operating temperature
Case operating temperature
Storage temperature
Internally limited
-40 to 150
j
T
c
T
-55 to 150
STG
CONNECTION DIAGRAM (TOP VIEW)
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
5
4
3
2
1
6
7
8
9
GROUND
INPUT
C.SENSE
N.C.
N.C.
10
11
VCC
CURRENT AND VOLTAGE CONVENTIONS
IS
VCC
VCC
IOUT
OUTPUT
IIN
INPUT
VIN
VOUT
ISENSE
CURRENT SENSE
GND
VSENSE
IGND
2/17
VN610SP
THERMAL DATA
Symbol
Parameter
Value
0.9
Unit
°C/W
°C/W
R
Thermal resistance junction-case
Thermal resistance junction-ambient
(MAX)
(MAX)
thj-case
R
50.9 (*)
thj-amb
2
(*) When mounted on a standard single-sided FR-4 board with 50mm of Cu (at least 35µm thick).
ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C<Tj<150°C; unless otherwise specified)
POWER
Symbol
Parameter
Test Conditions
Min
5.5
3
Typ
13
4
Max
36
Unit
V
V
Operating supply voltage
Undervoltage shutdown
Overvoltage shutdown
CC
V
5.5
V
USD
V
(See Note 1)
36
V
OV
ON
I
I
I
I
=15A; T =25°C
10
20
35
55
mΩ
mΩ
mΩ
V
OUT
OUT
OUT
j
R
On state resistance
Clamp Voltage
=15A; T =150°C
j
=9A; V =6V
CC
V
=20 mA (see note 1)
CC
41
48
10
clamp
Off State; V =13V; V =V
=0V
CC
IN
OUT
25
µA
Off State; V =13V; V =V
=0V;
CC
IN
OUT
I
Supply current
Tj=25°C
S
10
20
5
µA
On State; V =13V; V =5V; I =0A
CC
IN
OUT
mA
R
=3.9K
SENSE
I
I
I
I
Off State Output Current
Off State Output Current
Off State Output Current
Off State Output Current
V =V =0V
OUT
0
50
0
µA
µA
µA
µA
L(off1)
L(off2)
L(off3)
L(off4)
IN
V =0V; V
=3.5V
-75
IN
OUT
V =V
=0V; Vcc=13V; T =125°C
5
IN
OUT
OUT
j
V =V
=0V; Vcc=13V; T =25°C
3
IN
j
SWITCHING (VCC=13V)
Symbol
Parameter
Test Conditions
Min
Typ
50
Max Unit
t
Turn-on delay time
Turn-off delay time
R =0.87Ω
µs
µs
d(on)
L
t
R =0.87Ω
50
d(off)
L
See
(dV
(dV
/dt)
/dt)
Turn-on voltage slope
Turn-off voltage slope
R =0.87Ω
relative
diagram
See
V/µs
V/µs
OUT
OUT
on
off
L
R =0.87Ω
relative
diagram
L
PROTECTIONS
Symbol
Parameter
Test Conditions
Min
Typ
Max Unit
V
=13V
45
75
120
120
A
A
CC
I
DC Short circuit current
lim
5.5V<V <36V
CC
Thermal shutdown
temperature
T
150
175
15
200
°C
TSD
T
Thermal reset temperature
Thermal hysteresis
135
7
°C
°C
R
T
HYST
I
I
=2A; V =0; L=6mH
IN
OUT
V
Turn-off output voltage clamp
Output voltage drop limitation
V
-41 V -48 V -55
V
DEMAG
CC
CC
CC
V
=1.5A; T = -40°C...+150°C
50
mV
ON
OUT
j
3/17
1
VN610SP
ELECTRICAL CHARACTERISTICS (continued)
CURRENT SENSE (9V≤VCC≤16V) (See Figure 2)
Symbol
Parameter
Test Conditions
=1.5A; V
Min
Typ
Max
Unit
I
=0.5V;
SENSE
OUT
K
I
/I
3300
4400
6000
1
OUT SENSE
T = -40°C...150°C
j
I
=1.5A; V
=0.5V;
OUT
SENSE
dK1/K1
Current Sense Ratio Drift
-10
+10
%
T = -40°C...150°C
j
I
=15A; V
=4V; T =-40°C
4200
4400
4900
4900
6000
5750
OUT
SENSE
j
K
I
/I
2
OUT SENSE
T=25°C...150°C
j
I
=15A; V
=4V; T =-40°C
SENSE j
OUT
dK2/K2
Current Sense Ratio Drift
-6
+6
%
%
T=25°C...150°C
j
I
=45A; V
=4V; T =-40°C
4200
4400
4900
4900
5500
5250
OUT
SENSE
j
K
I
/I
3
OUT SENSE
T=25°C...150°C
j
I
=45A; V
=4V; T =-40°C
SENSE j
OUT
dK3/K3
Current Sense Ratio Drift
-6
+6
T=25°C...150°C
j
Vcc=6...16V; I
=0A; V
=0V;
SENSE
OUT
Tj=-40°C...150°C
I
Analog sense current
SENSE0
Off State; V =0V
0
0
5
µA
µA
IN
On State; V =5V
10
IN
V
R
=5.5V; I
=7.5A;
OUT
CC
Max analog sense
output voltage
3.5
5
V
V
=10KΩ
V
SENSE
SENSE
V
>8V; I
=15A; R
=10KΩ
SENSE
CC
OUT
Analog sense output
voltage in overtemperature
condition
V
V
=13V; R
=3.9KΩ
SENSE
5.5
V
SENSEH
CC
Analog sense output
impedance in
R
V
=13V; T >T ; Output Open
TSD
400
Ω
VSENSEH
CC
j
overtemperature condition
Current sense delay
reponse
t
to 90% I
(see note 2)
500
µs
DSENSE
SENSE
LOGIC INPUT
Symbol
Parameter
Test Conditions
V =1.25V
Min
Typ
Max
Unit
V
V
Input low level voltage
Low level input current
Input high level voltage
High level input current
Input hysteresis voltage
1.25
IL
I
1
µA
V
IL
IN
V
3.25
IH
I
V =3.25V
10
8
µA
V
IH
IN
V
0.5
6
I(hyst)
I =1mA
6.8
V
IN
V
Input clamp voltage
ICL
I =-1mA
-0.7
V
IN
Note 1: V
and V are correlated. Typical difference is 5V.
OV
clamp
Note 2: current sense signal delay after positive input slope.
Note: Sense pin doesn’t have to be left floating.
4/17
2
VN610SP
TRUTH TABLE
CONDITIONS
INPUT
OUTPUT
SENSE
L
H
L
L
H
L
L
L
L
L
L
L
L
L
H
H
0
Normal operation
Overtemperature
Undervoltage
Nominal
0
H
L
V
SENSEH
0
H
L
0
0
0
0
Overvoltage
H
L
Short circuit to GND
H
H
L
(T <T
) 0
) V
0
j
TSD
TSD
(T >T
j
SENSEH
Short circuit to V
CC
H
< Nominal
Negative output voltage
clamp
L
L
0
5/17
1
VN610SP
ELECTRICAL TRANSIENT REQUIREMENTS
ISO T/R 7637/1
TEST LEVELS
III
I
II
IV
Delays and
Impedance
Test Pulse
1
2
-25 V
+25 V
-25 V
-50 V
+50 V
-50 V
-75 V
+75 V
-100 V
+75 V
-6 V
-100 V
+100 V
-150 V
+100 V
-7 V
2 ms 10 Ω
0.2 ms 10 Ω
0.1 µs 50 Ω
0.1 µs 50 Ω
100 ms, 0.01 Ω
400 ms, 2 Ω
3a
3b
4
+25 V
-4 V
+50 V
-5 V
5
+26.5 V
+46.5 V
+66.5 V
+86.5 V
ISO T/R 7637/1
Test Pulse
TEST LEVELS RESULTS
I
II
C
C
C
C
C
E
III
C
C
C
C
C
E
IV
C
C
C
C
C
E
1
2
C
C
C
C
C
C
3a
3b
4
5
CLASS
CONTENTS
C
E
All functions of the device are performed as designed after exposure to disturbance.
One or more functions of the device is not performed as designed after exposure to disturbance
and cannot be returned to proper operation without replacing the device.
Figure 1: Switching Characteristics (Resistive load RL=0.87Ω)
V
OUT
90%
80%
dV
/dt
dV
/dt
OUT (off)
OUT (on)
10%
t
t
f
r
t
I
SENSE
90%
t
t
DSENSE
INPUT
t
t
d(on)
d(off)
t
6/17
1
VN610SP
Figure 2: I
/I
versus I
OUT SENSE
OUT
I
/I
OUT SENSE
6500
6000
5500
5000
4500
4000
3500
max.Tj=-40°C
max.Tj=25...150°C
min.Tj=25...150°C
typical value
min.Tj=-40°C
3000
0
5
10
15
20
25
30
35
40
45
50
I
OUT
7/17
1
VN610SP
Figure 3: Waveforms
NORMAL OPERATION
INPUT
LOAD CURRENT
SENSE CURRENT
UNDERVOLTAGE
V
CC
V
USDhyst
V
USD
INPUT
LOAD CURRENT
SENSE CURRENT
OVERVOLTAGE
V
OV
V
CC
V
V
> V
USD
OVhyst
CC
INPUT
LOAD CURRENT
SENSE
SHORT TO GROUND
INPUT
LOAD CURRENT
LOAD VOLTAGE
SENSE CURRENT
SHORT TO V
CC
INPUT
LOAD VOLTAGE
LOAD CURRENT
SENSE CURRENT
<Nominal
<Nominal
OVERTEMPERATURE
T
TSD
T
j
T
R
INPUT
LOAD CURRENT
SENSE CURRENT
I
=V
/(R
+R
)
SENSEH
SENSE SENSEH
SENSE
8/17
1
1
VN610SP
APPLICATION SCHEMATIC
+5V
V
R
CC
prot
INPUT
D
ld
R
prot
µC
OUTPUT
CURRENT SENSE
R
GND
SENSE
R
GND
V
GND
D
GND
This small signal diode can be safely shared amongst
several different HSD. Also in this case, the presence of
the ground network will produce a shift ( 600mV) in the
input threshold and the status output values if the
microprocessor ground is not common with the device
ground. This shift will not vary if more than one HSD
shares the same diode/resistor network.
GND PROTECTION NETWORK AGAINST
REVERSE BATTERY
Solution 1: Resistor in the ground line (R
can be used with any type of load.
only). This
GND
The following is an indication on how to dimension the
R
resistor.
GND
1) R
2) R
where -I
≤ 600mV / (I
).
S(on)max
LOAD DUMP PROTECTION
GND
GND
≥ (−V ) / (-I
)
CC
GND
D
is necessary (Voltage Transient Suppressor) if the
ld
is the DC reverse ground pin current and can
load dump peak voltage exceeds V max DC rating. The
GND
CC
be found in the absolute maximum rating section of the
device’s datasheet.
Power Dissipation in R
battery situations) is:
same applies if the device will be subject to transients on
the V
line that are greater than the ones shown in the
CC
ISO T/R 7637/1 table.
(when V <0: during reverse
CC
GND
µC I/Os PROTECTION:
2
P = (-V ) /R
D
CC
GND
If a ground protection network is used and negative
This resistor can be shared amongst several different
HSD. Please note that the value of this resistor should be
transients are present on the V line, the control pins will
CC
be pulled negative. ST suggests to insert a resistor (R
)
prot
calculated with formula (1) where I
becomes the
in line to prevent the µC I/Os pins to latch-up.
S(on)max
sum of the maximum on-state currents of the different
devices.
The value of these resistors is a compromise between the
leakage current of µC and the current required by the
HSD I/Os (Input levels compatibility) with the latch-up limit
of µC I/Os.
Please note that if the microprocessor ground is not
common with the device ground then the R
will
GND
produce a shift (I
* R
) in the input thresholds
S(on)max
GND
-V
/I
≤ R
≤ (V
-V -V
) / I
CCpeak latchup
prot
OHµC IH GND
IHmax
and the status output values. This shift will vary
depending on how many devices are ON in the case of
Calculation example:
several high side drivers sharing the same R
.
For V
= - 100V and I
≥ 20mA; V
≥ 4.5V
GND
CCpeak
latchup
OHµC
If the calculated power dissipation leads to a large resistor
or several devices have to share the same resistor then
the ST suggests to utilize Solution 2 (see below).
5kΩ ≤ R
≤ 65kΩ.
prot
Recommended R
value is 10kΩ.
prot
Solution 2: A diode (D
) in the ground line.
GND
A resistor (R
GND
=1kΩ) should be inserted in parallel to
GND
D
if the device will be driving an inductive load.
9/17
1
1
VN610SP
High Level Input Current
Off State Output Current
IL(off1) (µA)
Iih (uA)
9
5
4.5
8
Vin=3.25V
Off state
Vcc=36V
4
7
Vin=Vout=0V
3.5
3
6
5
4
3
2
1
0
2.5
2
1.5
1
0.5
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Input Clamp Voltage
Overvoltage Shutdown
Vicl (V)
Vov (V)
8
50
7.8
48
46
44
42
40
38
36
34
32
30
Iin=1mA
7.6
7.4
7.2
7
6.8
6.6
6.4
6.2
6
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
Turn-on Voltage Slope
Turn-off Voltage Slope
dVout/dt(on) (V/ms)
dVout/dt(off) (V/ms)
900
700
650
800
Vcc=13V
Vcc=13V
Rl=0.87Ohm
Rl=0.87Ohm
600
700
550
500
450
400
350
300
250
600
500
400
300
200
100
0
-50
-25
0
25
50
75
100 125
150
175
-50
-25
0
25
50
75
100 125
150
175
Tc (ºC)
10/17
1
VN610SP
On State Resistance Vs Tcase
On State Resistance Vs VCC
Ron (mOhm)
Ron (mOhm)
25
25
22.5
22.5
Iout=15A
Iout=15A
Vcc=8V; 36V
20
20
Tc= 125ºC
17.5
17.5
15
15
12.5
10
12.5
10
Tc= 25ºC
7.5
5
7.5
5
Tc= - 40ºC
2.5
0
2.5
0
-50
-25
0
25
50
75
100 125 150
175
5
10
15
20
25
30
35
40
Tc (ºC)
Vcc (V)
ILIM Vs Tcase
Input High Level
Vih (V)
Ilim (A)
3.6
160
3.4
3.2
3
140
120
100
80
Vcc=13V
2.8
2.6
2.4
2.2
2
60
40
20
0
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100 125
150
175
Tc (°C)
Tc (ºC)
Input Low Level
Input Hysteresis Voltage
Vil (V)
Vhyst (V)
1.5
2.6
1.4
1.3
1.2
1.1
1
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.9
0.8
0.7
0.6
0.5
-50
-25
0
25
50
75
100
125
150
175
-50
-25
0
25
50
75
100
125
150
175
Tc (°C)
Tc (°C)
11/17
1
VN610SP
Maximum turn off current versus load inductance
LMAX (A)
I
1000
100
10
A
B
C
1
0.01
0.1
1
10
100
L(mH)
A = Single Pulse at TJstart=150ºC
B= Repetitive pulse at TJstart=100ºC
C= Repetitive Pulse at TJstart=125ºC
Conditions:
VCC=13.5V
Values are generated with RL=0Ω
In case of repetitive pulses, Tjstart (at beginning of each demagnetization) of every pulse must not exceed
the temperature specified above for curves B and C.
VIN, IL
Demagnetization
Demagnetization
Demagnetization
t
12/17
1
VN610SP
PowerSO-10™ THERMAL DATA
PowerSO-10™ PC Board
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB thickness=2mm,
th
th
2
Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm ).
Rthj-amb Vs PCB copper area in open box free air condition
RTHj_amb (°C/W)
55
Tj-Tamb=50°C
50
45
40
35
30
0
2
4
6
8
10
PCB Cu heatsink area (cm^2)
13/17
1
VN610SP
PowerSO-10 Thermal Impedance Junction Ambient Single Pulse
ZTH (°C/W)
100
Footprint
2
6 cm
10
1
0.1
0.01
0.0001
0.001
0.01
0.1
1
10
100
1000
Time (s)
Thermal fitting model of a single channel HSD
in PowerSO-10
Pulse calculation formula
ZTHδ = RTH δ + ZTHtp(1 – δ)
δ = tp ⁄ T
where
Thermal Parameter
2
Area/island (cm )
R1 (°C/W)
Footprint
0.016
0.06
0.08
0.8
6
22
5
R2 (°C/W)
R3( °C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
Tj
C1
R1
C2
R2
C3
R3
C4
R4
C5
R5
C6
R6
12
Pd
37
T_amb
0.002
1.00E-02
0.04
0.3
0.75
3
14/17
1
VN610SP
PowerSO-10™ MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
MIN.
MAX.
A
A (*)
A1
B
B (*)
C
C (*)
D
D1
E
E2
E2 (*)
E4
E4 (*)
e
F
F (*)
H
3.35
3.4
3.65
3.6
0.132
0.134
0.000
0.016
0.014
0.013
0.009
0.370
0.291
0.366
0.283
0.287
0.232
0.232
0.144
0.142
0.004
0.024
0.021
0.022
0.0126
0.378
0.300
0.374
300
0.00
0.40
0.37
0.35
0.23
9.40
7.40
9.30
7.20
7.30
5.90
5.90
0.10
0.60
0.53
0.55
0.32
9.60
7.60
9.50
7.60
7.50
6.10
6.30
0.295
0.240
0.248
1.27
0.50
0.050
0.002
1.25
1.20
13.80
13.85
1.35
1.40
14.40
14.35
0.049
0.047
0.543
0.545
0.053
0.055
0.567
0.565
H (*)
h
L
L (*)
α
1.20
0.80
0º
1.80
1.10
8º
0.047
0.031
0º
0.070
0.043
8º
α (*)
2º
8º
2º
8º
(*) Muar only POA P013P
B
0.10
A B
10
H
E
E2
E4
1
SEATING
PLANE
DETAIL "A"
e
B
A
C
0.25
D
=
=
=
h
D1
=
SEATING
PLANE
A
F
A1
L
A1
DETAIL "A"
P095A
α
15/17
1
VN610SP
PowerSO-10™ SUGGESTED PAD LAYOUT
TUBE SHIPMENT (no suffix)
14.6 - 14.9
CASABLANCA
MUAR
B
10.8- 11
6.30
C
A
C
A
0.67 - 0.73
B
1
2
3
10
9
0.54 - 0.6
All dimensions are in mm.
Base Q.ty Bulk Q.ty Tube length (± 0.5)
8
9.5
7
4
5
1.27
A
B
C (± 0.1)
0.8
6
Casablanca
Muar
50
50
1000
1000
532
532
10.4 16.4
4.9 17.2
0.8
TAPE AND REEL SHIPMENT (suffix “13TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C (± 0.2)
F
600
600
330
1.5
13
20.2
24.4
60
G (+ 2 / -0)
N (min)
T (max)
30.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 (± 0.1)
P
24
4
Tape Hole Spacing
Component Spacing
Hole Diameter
24
D (± 0.1/-0) 1.5
Hole Diameter
D1 (min)
F (± 0.05)
K (max)
1.5
11.5
6.5
2
Hole Position
Compartment Depth
Hole Spacing
P1 (± 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
cover
tape
Empty components pockets
saled with cover tape.
500mm min
User direction of feed
16/17
1
1
VN610SP
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a trademark of STMicroelectronics
2002 STMicroelectronics - Printed in ITALY- All Rights Reserved.
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17/17
1
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