TS922AIYDT [STMICROELECTRONICS]
Rail-to-rail, high output current dual operational amplifier; 轨到轨，高输出电流双运算放大器
| 型号： | TS922AIYDT |
| 厂家： | 
ST |
| 描述： | Rail-to-rail, high output current dual operational amplifier |
| 文件： | 总24页 (文件大小：1079K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS922, TS922A
Rail-to-rail, high output current dual operational amplifier
Datasheet - production data
Features
• Rail-to-rail input and output
• Low noise: 9 nV/√Hz
• Low distortion
J
• High output current: 80 mA
Flip-chip with backcoating
(able to drive 32 Ω loads)
• High-speed: 4 MHz, 1 V/μs
• Operating from 2.7 to 12 V
• Low input offset voltage: 900 μV max.
(TS922A)
• ESD internal protection: 2 kV
MiniSO8
(plastic micropackage)
• Latch-up immunity
• Macromodel included in this specification
• Dual version available in Flip-chip package
Applications
D
SO8
• Headphone and servo amplifiers
• Sound cards, multimedia systems
• Line drivers, actuator drivers
(plastic micropackage)
• Mobile phones and portable equipment
• Instrumentation with low noise as key factor
• Piezoelectric speaker drivers
P
Description
TSSOP8
(thin shrink small outline package)
TS922 and TS922A devices are rail-to-rail dual
BiCMOS operational amplifiers optimized and
fully specified for 3 V and 5 V operation. These
devices have high output currents which allow
low-load impedances to be driven.
Very low noise, low distortion, low offset, and
a high output current capability make these
devices an excellent choice for high quality, low
voltage, or battery operated audio systems.
N
DIP8
(plastic package)
The devices are stable for capacitive loads up to
500 pF.
June 2013
DocID5150 Rev 11
1/24
This is information on a product in full production.
www.st.com
Contents
TS922, TS922A
Contents
1
2
3
4
Pin diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
TS922, TS922A macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1
4.2
4.3
Important note concerning this macromodel . . . . . . . . . . . . . . . . . . . . . . 12
Electrical characteristics from macromodelization . . . . . . . . . . . . . . . . . . 12
Macromodel code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1
5.2
5.3
5.4
5.5
8-bump Flip-chip package information . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
MiniSO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SO8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
TSSOP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
DIP8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6
7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
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DocID5150 Rev 11
TS922, TS922A
Pin diagrams
1
Pin diagrams
Figure 1.
Pinout for Flip-chip package (top view)
OUT2
-IN2
+IN2
-
+
V
-
V
+
CC
CC
+
-
OUT1
-IN1
+IN1
Figure 2.
Pin connections for MiniSO8, SO8, TSSOP8, and DIP8 (top view)
DocID5150 Rev 11
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24
Absolute maximum ratings and operating conditions
TS922, TS922A
2
Absolute maximum ratings and operating conditions
Table 1. Absolute maximum ratings (AMR)
Parameter
Symbol
Value
Unit
VCC
Vid
Supply voltage(1)
14
±1
Differential input voltage(2)
Input voltage(3)
V
Vin
VCC- -0.3 to VCC++0.3
-65 to +150
Tstg
Storage temperature
°C
Thermal resistance junction to ambient(4)
90
Flip-chip
SO8
TSSOP8
Rthja
125
120
°C/W
Thermal resistance junction to case(4)
Rthjc
40
37
SO8
TSSOP8
Tj
Maximum junction temperature
150
°C
V
HBM: human body model(5)
MM: machine model(6)
2000
120
ESD
CDM: charged device model(7)
1500
Output short-circuit duration
Latch-up immunity
See note(8)
200
mA
°C
Soldering temperature (10 s), leaded version
Soldering temperature (10 s), unleaded version
250
260
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. The differential voltage is the non-inverting input terminal with respect to the inverting input terminal. If
V
id > ±1 V, the maximum input current must not exceed ±1 mA. In this case (Vid > ±1 V), an input series
resistor must be added to limit the input current.
3. Do not exceed 14 V.
4. Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-
circuits on all amplifiers. These values are typical.
5. Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device, done for
all couples of pin combinations with other pins floating.
6. Machine model: a 200 pF capacitor is charged to the specified voltage, then discharged directly between
two pins of the device with no external series resistor (internal resistor < 5 Ω). This is done for all couples of
pin combinations with other pins floating.
7. Charged device model: all pins and plus package are charged together to the specified voltage and then
discharged directly to ground.
8. There is no short-circuit protection inside the device: short-circuits from the output to VCC can cause
excessive heating. The maximum output current is approximately 80 mA, independent of the magnitude of
V
CC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.
4/24
DocID5150 Rev 11
TS922, TS922A
Absolute maximum ratings and operating conditions
Table 2. Operating conditions
Symbol
Parameter
Value
Unit
VCC
Vicm
Supply voltage
Common mode input voltage range
2.7 to 12
VCC- -0.2 to VCC+ +0.2
-40 to +125
V
Toper Operating free air temperature range
°C
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24
Electrical characteristics
TS922, TS922A
3
Electrical characteristics
Table 3. Electrical characteristics measured at V = +3 V, V - = 0 V, V
= V /2,
CC
CC
CC
icm
T
= 25 °C, and R connected to V /2 (unless otherwise specified)
amb
L CC
Symbol
Parameter
Test conditions
Min.
Typ. Max.
Unit
TS922
3
TS922A
TS922IJ (Flip-chip)
0.9
1.5
Vio
Input offset voltage
mV
Tmin ≤ Tamb ≤ Tmax
TS922
5
TS922A
TS922IJ (Flip-chip)
1.8
2.5
ΔVio/ΔT Input offset voltage drift
2
μV/°C
Vout = VCC/2
Tmin ≤ Tamb ≤ Tmax
1
30
30
Iio
Iib
Input offset current
Input bias current
nA
Vout = VCC/2
Tmin ≤ Tamb ≤ Tmax
15
100
100
RL= 10 kΩ
Tmin ≤ Tamb ≤ Tmax
2.90
2.90
VOH
High level output voltage
Low level output voltage
RL = 600 Ω
2.87
2.87
V
Tmin ≤ Tamb ≤ Tmax
RL = 32 Ω
2.63
RL= 10 kΩ
Tmin ≤ Tamb ≤ Tmax
50
50
VOL
RL = 600 Ω
Tmin ≤ Tamb ≤ Tmax
100
100
mV
RL = 32 Ω
180
200
RL= 10 kΩ, Vout = 2 Vp-p
Tmin ≤ Tamb ≤ Tmax
70
15
Avd
Large signal voltage gain
Total supply current
RL = 600 Ω, Vout = 2 Vp-p
Tmin ≤ Tamb ≤ Tmax
35
V/mV
RL = 32 Ω, Vout = 2 Vp-p
16
2
No load, Vout = VCC/2
Tmin ≤ Tamb ≤ Tmax
3
3.2
ICC
mA
GBP Gain bandwidth product
RL = 600 Ω
4
MHz
Vicm = 0 to 3 V
Tmin ≤ Tamb ≤ Tmax
60
56
80
CMR Common mode rejection ratio
SVR Supply voltage rejection ratio
dB
VCC = 2.7 to 3.3 V
60
60
85
Tmin ≤ Tamb ≤ Tmax
Io
Output short-circuit current
Slew rate
50
80
mA
SR
0.7
1.3
V/μs
6/24
DocID5150 Rev 11
TS922, TS922A
Electrical characteristics
Table 3. Electrical characteristics measured at V = +3 V, V - = 0 V, V
= V /2,
CC
CC
CC
icm
T
= 25 °C, and R connected to V /2 (unless otherwise specified) (continued)
amb
L CC
Symbol
Parameter
Test conditions
Min.
Typ. Max.
Unit
φm
Phase margin at unit gain
Gain margin
68
12
Degrees
dB
RL = 600 Ω, CL = 100 pF
Gm
nV
Hz
Equivalent input noise
voltage
-----------
en
f = 1 kHz
9
V
out = 2 Vp-p, f = 1 kHz, Av = 1,
THD Total harmonic distortion
Cs Channel separation
0.005
120
%
RL = 600 Ω
dB
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24
Electrical characteristics
TS922, TS922A
Table 4. Electrical characteristics measured at V = 5 V, V - = 0 V, V
= V /2,
CC
CC
CC
icm
T
= 25 °C, and R connected to V /2 (unless otherwise specified)
amb
L CC
Symbol
Parameter
Conditions
Min.
Typ. Max.
Unit
TS922
3
TS922A
TS922IJ (Flip-chip)
0.9
1.5
Vio
Input offset voltage
mV
Tmin ≤ Tamb ≤ Tmax
TS922
5
TS922A
TS922IJ (Flip-chip)
1.8
2.5
ΔVio/ΔT Input offset voltage drift
2
μV/°C
Vout = VCC/2
Tmin ≤ Tamb ≤ Tmax
1
30
30
Iio
Iib
Input offset current
Input bias current
nA
Vout = VCC/2
Tmin ≤ Tamb ≤ Tmax
15
100
100
RL= 10 kΩ
Tmin ≤ Tamb ≤ Tmax
4.9
4.9
VOH
High level output voltage
Low level output voltage
RL = 600 Ω
4.85
4.85
V
Tmin ≤ Tamb ≤ Tmax
RL = 32 Ω
4.4
RL= 10 kΩ
Tmin ≤ Tamb ≤ Tmax
50
50
VOL
RL = 600 Ω
Tmin ≤ Tamb ≤ Tmax
120
120
mV
RL = 32 Ω
300
200
RL= 10 kΩ, Vout = 2 Vp-p
Tmin ≤ Tamb ≤ Tmax
70
20
Avd
Large signal voltage gain
Total supply current
RL = 600 Ω, Vout = 2 Vp-p
Tmin ≤ Tamb ≤ Tmax
35
V/mV
RL = 32 Ω, Vout = 2 Vp-p
16
2
No load, Vout = VCC/2
Tmin ≤ Tamb ≤ Tmax
3
3.2
Icc
mA
GBP Gain bandwidth product
RL = 600 Ω
4
MHz
Common mode rejection
Vicm = 0 to 5 V
Tmin ≤ Tamb ≤ Tmax
60
56
80
CMR
ratio
dB
V
CC = 4.5 to 5.5 V
60
60
85
SVR Supply voltage rejection ratio
Tmin ≤ Tamb ≤ Tmax
Io
Output short-circuit current
Slew rate
50
80
1.3
68
12
mA
V/μs
SR
φm
Gm
0.7
Phase margin at unit gain
Gain margin
Degrees
dB
RL = 600 Ω, CL =100 pF
Equivalent input noise
voltage
nV
Hz
en
f = 1 kHz
9
-----------
8/24
DocID5150 Rev 11
TS922, TS922A
Electrical characteristics
Table 4. Electrical characteristics measured at V = 5 V, V - = 0 V, V
= V /2,
CC
CC
CC
icm
T
= 25 °C, and R connected to V /2 (unless otherwise specified) (continued)
amb
L CC
Symbol
THD Total harmonic distortion
Cs Channel separation
Parameter
Conditions
Min.
Typ. Max.
Unit
Vout = 2 Vp-p, f = 1 kHz, Av = 1,
0.005
120
%
RL = 600 Ω
dB
DocID5150 Rev 11
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24
Electrical characteristics
TS922, TS922A
Figure 3. Output short-circuit current vs.
output voltage
Figure 4. Total supply current vs.
supply voltage
Figure 5. Voltage gain and phase vs.
frequency
Figure 6. Equivalent input noise voltage vs.
frequency
60
40
20
0
180
Phase
30
25
120
60
0
V
= ±1.5 V
= 100 Ω
CC
L
C
= 100 pF
l
Gain
R
20
15
10
5
0
0.01
0.1
1
10
100
-20
1E+02
-60
1E+08
Frequency (kHz)
1E+03
1E+04
1E+05
1E+06
1E+07
Frequency (Hz)
Figure 7. THD + noise vs. frequency
Figure 8. THD + noise vs. frequency
(R = 2 kΩ, V = 10 Vpp
,
V
= ± 6 V)
(R = 32 Ω, V = 4 Vpp
,
V = ± 2.5 V)
L
o
CC
L
o
CC
0.04
0.02
0.032
0.024
0.016
0.008
0.015
0.01
R
= 32 Ω, V = 4 Vpp
CC
R = 2 kΩ, V = 10 Vpp
L
o
L
o
V
= ±2.5 V, Av = 1
V
= ±6 V, Av = 1
CC
0.005
0
0
0.01
0.1
1
10
100
0.01
0.1
1
10
100
Frequency (kHz)
Frequency (kHz)
10/24
DocID5150 Rev 11
TS922, TS922A
Electrical characteristics
Figure 9. THD + noise vs. frequency
Figure 10. THD + noise vs. output voltage
(R = 32 Ω, V = 2 Vpp
,
V
= ± 1.5 V)
(R = 600 Ω, f = 1 kHz, V = 0/3 V)
L
o
CC
L
CC
10,000
1,000
0,100
0,010
0,001
0.7
0.6
0.5
0.4
0.3
0.2
0.1
R
= 32 Ω, V = 2 Vpp
o
CC
L
V
= ±1.5 V, Av = 10
R
= 600 Ω, f = 1 kHz
CC
L
V
= 0/3 V, Av = -1
0
0.01
0.1
1
10
100
0
0,2
0,4
0,6
0,8
1
1,2
Frequency (kHz)
V
(Vrms)
out
Figure 11. THD + noise vs. output voltage
Figure 12. THD + noise vs. output voltage
(R = 32 Ω, f = 1 kHz, V = ± 1.5 V)
(R = 2 kΩ, f = 1 kHz, V = ± 1.5 V)
L
CC
L
CC
10
10
1
R
CC
= 32 Ω, f = 1 kHz
L
1
V
= ±1.5 V, Av = -1
0.1
0.01
R
CC
= 2 kΩ, f = 1 kHz
L
V
= ±1.5 V, Av = -1
0.1
0.01
0
0.2
0.4
0.6
0.
0.001
V
out
(Vrms)
0
0.2
0.4
0.6
0.8
1
1.2
V
(Vrms)
out
Figure 13. Open loop gain and phase vs. frequency
50
40
30
20
10
0
180
120
60
0
C
= 500 pF
L
1E+2
1E+3
1E+4
1E+5
1E+6
1E+7
1E+8
Frequency (Hz)
DocID5150 Rev 11
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24
TS922, TS922A macromodel
TS922, TS922A
4
TS922, TS922A macromodel
4.1
Important note concerning this macromodel
•
•
All models are a trade-off between accuracy and complexity (i.e. simulation time).
Macromodels are not a substitute to breadboarding; rather, they confirm the validity of
a design approach and help to select surrounding component values.
•
A macromodel emulates the nominal performance of a typical device within specified
operating conditions (for example, temperature and supply voltage). Thus the
macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the
main parameters of the product.
Data derived from macromodels used outside of the specified conditions (for example, V
,
CC
temperature) or worse, outside of the device operating conditions (for example, V , V ),
CC
icm
are not reliable in any way.
Section 4.2 provides the electrical characteristics resulting from the use of the TS922,
TS922A macromodel.
4.2
Electrical characteristics from macromodelization
Table 5. Electrical characteristics resulting from macromodel simulation
at V = 3 V, V - = 0 V, R , C connected to V /2, T = 25 °C
CC
CC
L
L
CC
amb
(unless otherwise specified)
Symbol
Conditions
Value
Unit
Vio
Avd
0
200
mV
V/mV
mA
RL = 10 kΩ
ICC
No load, per operator
1.2
Vicm
VOH
VOL
Isink
Isource
GBP
SR
-0.2 to 3.2
2.95
V
RL = 10 kΩ
25
mV
mA
VO = 3 V
80
VO = 0 V
RL = 600 kΩ
RL = 10 kΩ, CL = 100 pF
RL = 600 kΩ
4
MHz
V/μs
1.3
68
φm
Degrees
12/24
DocID5150 Rev 11
TS922, TS922A
TS922, TS922A macromodel
4.3
Macromodel code
** Standard Linear Ics Macromodels, 1996.
** CONNECTIONS:
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
*
.SUBCKT TS92X 1 2 3 4 5
*
.MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F
*
* INPUT STAGE
CIP 2 5 1.000000E-12
CIN 1 5 1.000000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 8.125000E+00
RIN 15 16 8.125000E+00
RIS 11 15 2.238465E+02
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 153.5u
VOFN 13 14 DC 0
IPOL 13 5 3.200000E-05
CPS 11 15 1e-9
DINN 17 13 MDTH 400E-12
VIN 17 5 -0.100000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 0.400000E+00
FCP 4 5 VOFP 1.865000E+02
FCN 5 4 VOFN 1.865000E+02
FIBP 2 5 VOFP 6.250000E-03
FIBN 5 1 VOFN 6.250000E-03
* GM1 STAGE ***************
FGM1P 119 5 VOFP 1.1
FGM1N 119 5 VOFN 1.1
RAP 119 4 2.6E+06
RAN 119 5 2.6E+06
* GM2 STAGE ***************
G2P 19 5 119 5 1.92E-02
G2N 19 5 119 4 1.92E-02
R2P 19 4 1E+07
DocID5150 Rev 11
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24
TS922, TS922A macromodel
TS922, TS922A
R2N 19 5 1E+07
**************************
VINT1 500 0 5
GCONVP 500 501 119 4 19.38
VP 501 0 0
GCONVN 500 502 119 5 19.38
VN 502 0 0
********* orientation isink isource *******
VINT2 503 0 5
FCOPY 503 504 VOUT 1
DCOPYP 504 505 MDTH 400E-9
VCOPYP 505 0 0
DCOPYN 506 504 MDTH 400E-9
VCOPYN 0 506 0
***************************
F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 0.5
F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 0.5
F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 1.75
F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 1.75
* COMPENSATION ************
CC 19 119 25p
* OUTPUT ***********
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 6.250000E+02
VIPM 28 4 5.000000E+01
HONM 21 27 VOUT 6.250000E+02
VINM 5 27 5.000000E+01
VOUT 3 23 0
ROUT 23 19 6
COUT 3 5 1.300000E-10
DOP 19 25 MDTH 400E-12
VOP 4 25 1.052
DON 24 19 MDTH 400E-12
VON 24 5 1.052
.ENDS;TS92X
14/24
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Package information
5
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
®
®
ECOPACK packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
®
ECOPACK is an ST trademark.
DocID5150 Rev 11
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24
Package information
TS922, TS922A
5.1
8-bump Flip-chip package information
Figure 14. 8-bump Flip-chip package dimensions (top view)
1. Die size: 1600 μm x 1600 μm 30 μm
Die height: 350 µm ±20 µm
Die height (including bumps): 650 µm
Bump diameter: 315 µm ±50 µm
Bump height: 250 µm ±40 µm
Pitch: 500 µm ±10 µm
Backcoating
Figure 15. 8-bump Flip-chip footprint recommendation
16/24
DocID5150 Rev 11
TS922, TS922A
Package information
Figure 16. 8-bump Flip-chip marking (top view)
(4)
(1)
(2)
(3)
GAMS0306131526CB
1. ST logo
2. Part number
3. Date code: Y = year, WW = week
4. This dot indicates the bump corner 1A
Figure 17. 8-bump Flip-chip tape and reel specification (top view)
1
1
A
A
User direction of feed
1. Device orientation: the devices are oriented in the carrier pocket with bump number A1 adjacent to the
sprocket holes.
DocID5150 Rev 11
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24
Package information
TS922, TS922A
5.2
MiniSO8 package information
Figure 18. MiniSO8 package mechanical drawing
Table 6. MiniSO8 package mechanical data
Dimensions
Symbol
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A2
b
1.1
0.043
0.006
0.037
0.016
0.009
0.126
0.203
0.122
0
0.15
0.95
0.40
0.23
3.20
5.15
3.10
0
0.75
0.22
0.08
2.80
4.65
2.80
0.85
0.030
0.009
0.003
0.11
0.033
c
D
3.00
4.90
3.00
0.65
0.60
0.95
0.25
0.118
0.193
0.118
0.026
0.024
0.037
0.010
E
0.183
0.11
E1
e
L
0.40
0°
0.80
0.016
0°
0.031
L1
L2
k
8°
8°
ccc
0.10
0.004
18/24
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TS922, TS922A
Package information
5.3
SO8 package information
Figure 19. SO8 package mechanical drawing
Table 7. SO8 package mechanical data
Dimensions
Symbol
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
A1
A2
b
1.75
0.25
0.069
0.010
0.10
1.25
0.28
0.17
4.80
5.80
3.80
0.004
0.049
0.011
0.007
0.189
0.228
0.150
0.48
0.23
5.00
6.20
4.00
0.019
0.010
0.197
0.244
0.157
c
D
4.90
6.00
3.90
1.27
0.193
0.236
0.154
0.050
E
E1
e
h
0.25
0.40
0.50
1.27
0.010
0.016
0.020
0.050
L
L1
k
1.04
0.040
0
8°
1°
8°
ccc
0.10
0.004
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Package information
TS922, TS922A
5.4
TSSOP8 package information
Figure 20. TSSOP8 package mechanical drawing
Table 8. TSSOP8 package mechanical data
Dimensions
Symbol
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A2
b
1.20
0.15
1.05
0.30
0.20
3.10
6.60
4.50
0.047
0.006
0.041
0.012
0.008
0.122
0.260
0.177
0.05
0.80
0.19
0.09
2.90
6.20
4.30
0.002
0.031
0.007
0.004
0.114
0.244
0.169
1.00
0.039
c
D
3.00
6.40
4.40
0.65
0.118
0.252
0.173
0.0256
E
E1
e
k
0°
8°
0°
8°
L
0.45
0.60
1
0.75
0.018
0.024
0.039
0.030
L1
aaa
0.10
0.004
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Package information
5.5
DIP8 package information
Figure 21. DIP8 package mechanical drawing
Table 9. DIP8 package mechanical data
Dimensions
Symbol
Millimeters
Typ.
Inches
Typ.
Min.
Max.
Min.
Max.
A
A1
A2
b
5.33
0.210
0.38
2.92
0.36
1.14
0.20
9.02
7.62
6.10
0.015
0.115
0.014
0.045
0.008
0.355
0.300
0.240
3.30
0.46
1.52
0.25
9.27
7.87
6.35
2.54
7.62
4.95
0.56
1.78
0.36
10.16
8.26
7.11
0.130
0.018
0.060
0.010
0.365
0.310
0.250
0.100
0.300
0.195
0.022
0.070
0.014
0.400
0.325
0.280
b2
c
D
E
E1
e
eA
eB
L
10.92
3.81
0.430
0.150
2.92
3.30
0.115
0.130
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Ordering information
TS922, TS922A
6
Ordering information
Table 10. Order codes
Package
Temperature
range
Order codes
Packaging
Marking
TS922ID
TS922IDT
922I
SO-8
Tube or
tape and reel
TS922AID
TS922AIDT
922AI
TS922IYDT(1)
TS922AIYDT(1)
TS922IPT
922IY
922AIY
922I
SO-8
(automotive grade)
TSSOP8
TS922AIPT
Tape and reel
Tube
922AI
K158
-40 °C to +125 °C
TS922IST
MiniSO8
DIP8
TS922AIST
K159
TS922IN
TS922IN
922IY
922AY
K10A
K10B
922
TS922IYPT(2)
TS922AIYPT(2)
TS922IYST(2)
TS922AIYST(2)
TS922IJT/EIJT
TSSOP8
(automotive grade)
Tape and reel
MiniSO8
(automotive grade)
Flip-chip with backcoating
1. Qualified and characterized according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 and Q 002 or equivalent.
2. Qualification and characterization according to AEC Q100 and Q003 or equivalent, advanced screening
according to AEC Q001 and Q 002 or equivalent are ongoing.
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Revision history
7
Revision history
Table 11. Document revision history
Revision Changes
Date
01-Feb-2001
01-Jul-2004
1
2
First release.
Flip-chip package inserted in the document.
Modifications in AMR Table 1 on page 4 (explanation of Vid and Vi
limits, ESD MM and CDM values added, Rthja added).
02-May-2005
01-Aug-2005
01-Mar-2006
3
4
5
PPAP references inserted in the datasheet, see Table 6 on page 22.
TS922EIJT part number inserted in the datasheet, see
Table 6 on page 22.
Modifications in AMR Table 1 on page 4 (Rthjc added), parameter
limits on full temperature range added in Table 3 on page 6 and
Table 4 on page 8.
26-Jan-2007
12-Nov-2007
6
7
Added notes on ESD in AMR table.
Re-formatted package information.
Added notes for automotive grade in order codes table.
Document reformatted.
02-Feb-2010
15-Jan-2013
8
9
Added root part number TS922A on cover page.
Removed TS922AIYD order code from Table 10.
Added MiniSO8 package.
Modified test conditions for CMR in Table 3 and Table 4.
Replaced VDD by VCC- in title of Table 3, Table 4, and Table 5.
Updated titles of Figure 7 to Figure 12 (added conditions to
differentiate them).
Removed TS922IYD device from Table 10.
Minor corrections throughout document.
Features: updated package information for Flip-chip
Figure 2: Updated title
Table 1: updated footnotes 5, 6, and 7
04-Jun-2013
27-Jun-2013
10
11
Table 3 and Table 4: replaced DVio with ΔVio/ΔT
Figure 14: added backcoating to package information
Figure 16: updated footnote 3
Table 10: updated package information for Flip-chip
Figure 14: updated to include new height for backcoating
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TS922, TS922A
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