TS922AIYPT [STMICROELECTRONICS]
Rail-to-rail high output current dual operational amplifier; 轨至轨高输出电流双运算放大器
| 型号： | TS922AIYPT |
| 厂家： | 
ST |
| 描述： | Rail-to-rail high output current dual operational amplifier |
| 文件： | 总21页 (文件大小：481K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS922
Rail-to-rail high output current dual operational amplifier
Features
■ Rail-to-rail input and output
■ Low noise: 9nV/√Hz
■ Low distortion
J
(Flip-chip)
■ High output current: 80mA
(able to drive 32Ω loads)
■ High-speed: 4MHz, 1V/μs
■ Operating from 2.7V to 12V
N
DIP8
(Plastic package)
■ Low input offset voltage: 900μV max (TS922A)
■ ESD Internal protection: 2kV
■ Latch-up immunity
■ Macromodel included in this specification
■ Dual version available in flip-chip package
D
SO-8
Description
(Plastic micropackage)
The TS922 is a rail-to-rail dual BiCMOS
operational amplifier optimized and fully specified
for 3V and 5V operation.
The device’s high output current allows low-load
impedances to be driven.
P
TSSOP8
(Thin shrink small outline package)
Very low noise, low distortion, low offset and a
high output current capability make this device an
excellent choice for high quality, low voltage or
battery operated audio systems.
The device is stable for capacitive loads up to
500pF.
Applications
■ Headphone amplifier
■ Sound cards, multimedia systems
■ Line driver, actuator driver
■ Servo amplifier
■ Mobile phone and portable equipment
■ Instrumentation with low noise as key factor
■ Piezoelectric speaker driver
January 2007
Rev 6
1/21
www.st.com
21
Contents
TS922
Contents
1
2
3
4
Pin diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Absolute maximum ratings and operating conditions . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Macromodel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1
4.2
4.3
Important note concerning this macromodel . . . . . . . . . . . . . . . . . . . . . . 11
Electrical characteristics from macromodelization . . . . . . . . . . . . . . . . . . 11
Macromodel code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1
5.2
5.3
5.4
Flip-chip package (8 bumps) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
DIP8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
SO-8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TSSOP8 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6
7
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/21
TS922
Pin diagrams
1
Pin diagrams
Figure 1.
Pin connections (top view)
+
Output 1
Inverting Input 1
V
1
2
3
4
8
7
6
5
CC
Output 2
-
+
Non-inverting Input 1
-
Inverting Input 2
Non-inverting Input 2
+
V
CC
Figure 2.
Pin-out for flip-chip package (top view)
OUT2
VCC+
OUT1
-IN2
+IN2
-
+
GND
+
-
-IN1
+IN1
3/21
Absolute maximum ratings and operating conditions
TS922
2
Absolute maximum ratings and operating conditions
Table 1.
Symbol
Absolute maximum ratings (AMR)
Parameter
Value
Unit
VCC
Vid
Supply voltage (1)
14
±1
V
V
Differential input voltage (2)
Input voltage (3)
Vin
VDD-0.3 to VCC+0.3
-65 to +150
V
Tstg
Storage temperature
°C
Thermal resistance junction to ambient (4)
125
120
85
SO8
TSSOP8
DIP8
Rthja
°C/W
°C/W
Flip-chip
90
Thermal resistance junction to case
40
37
41
SO8
TSSOP8
DIP8
Rthjc
Tj
Maximum junction temperature
150
°C
kV
V
HBM: human body model(5)
MM: machine model(6)
2
ESD
100
1.5
CDM: charged device model
kV
Output short circuit duration
Latch-up immunity
see note(7)
200
mA
°C
Soldering temperature (10sec), leaded version
Soldering temperature (10sec), unleaded version
250
260
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal. If
V
id > ±1V, the maximum input current must not exceed ±1mA. In this case (Vid > ±1V) an input series
resistor must be added to limit input current.
3. Do not exceed 14V.
4. Rth are typical values.
5. Human body model, 100pF discharged through a 1.5kΩ resistor into pin of device.
6. Machine model ESD, a 200pF cap is charged to the specified voltage, then discharged directly into the IC
with no external series resistor (internal resistor < 5Ω), into pin of device.
7. There is no short-circuit protection inside the device: short-circuits from the output to VCC can cause
excessive heating. The maximum output current is approximately 80mA, independent of the magnitude of
V
CC. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.
Table 2.
Symbol
Operating conditions
Parameter
Value
Unit
VCC
Vicm
Supply voltage
Common mode input voltage range
2.7 to 12
VDD -0.2 to VCC +0.2
-40 to +125
V
V
Toper Operating free air temperature range
°C
4/21
TS922
Electrical characteristics
3
Electrical characteristics
Table 3.
Symbol
Electrical characteristics measured at V = +3V, V = 0V, V
= V /2,
icm CC
CC
DD
T
= 25°C, and R connected to V /2 (unless otherwise specified)
amb
L CC
Parameter
Test conditions
Min.
Typ. Max.
Unit
TS922, T=25°C
3
TS922A, T=25°C
TS922IJ (flip-chip), T=25°C
0.9
1.5
Vio
Input offset voltage
mV
Tmin ≤ Tamb ≤ Tmax TS922
5
Tmin ≤ Tamb ≤ Tmax TS922A
Tmin ≤ Tamb ≤ Tmax TS922IJ (flip-chip)
1.8
2.5
DVio
Iio
Input offset voltage drift
2
μV/°C
Input offset current
Vout = VCC/2
1
30
30
T=25°C
Tmin ≤ Tamb ≤ Tmax
nA
Input bias current
Vout = VCC/2
T=25°C
15
100
100
Iib
nA
V
Tmin ≤ Tamb ≤ Tmax
RL= 10k, T=25°C
Tmin ≤ Tamb ≤ Tmax
2.90
2.90
VOH
High level output voltage
RL = 600Ω, T=25°C
Tmin ≤ Tamb ≤ Tmax
2.87
2.87
V
V
RL = 32Ω, T=25°C
2.63
RL= 10k, T=25°C
Tmin ≤ Tamb ≤ Tmax
50
50
mV
VOL
Low level output voltage
Large signal voltage gain
RL = 600Ω, T=25°C
Tmin ≤ Tamb ≤ Tmax
100
100
mV
mV
RL = 32Ω, T=25°C
180
200
RL= 10k, T=25°C
RL= 10k, Tmin ≤ Tamb ≤ Tmax
70
15
Avd
RL = 600Ω, T=25°C
RL = 600Ω, Tmin ≤ Tamb ≤ Tmax
35
V/mV
(Vout = 2Vp-p
)
RL = 32Ω, T=25°C
16
2
Total supply current
T=25°C
3
ICC
mA
MHz
dB
No load, Vout = VCC/2,
Tmin ≤ Tamb ≤ Tmax
3.2
GBP Gain bandwidth product
RL = 600Ω
4
T=25°C
60
56
80
CMR Common mode rejection ratio
Tmin ≤ Tamb ≤ Tmax
T=25°C
60
60
85
Supply voltage rejection ratio
VCC = 2.7 to 3.3V
SVR
dB
Tmin ≤ Tamb ≤ Tmax
Io
Output short circuit current
Slew rate
50
80
1.3
68
mA
V/μs
SR
φm
0.7
Phase margin at unit gain
RL = 600Ω, CL =100pF
Degrees
5/21
Electrical characteristics
TS922
Table 3.
Electrical characteristics measured at V = +3V, V = 0V, V
= V /2,
icm CC
CC
DD
T
= 25°C, and R connected to V /2 (unless otherwise specified) (continued)
amb
L CC
Symbol
Parameter
Gain margin
Test conditions
Min.
Typ. Max.
Unit
Gm
RL = 600Ω, CL =100pF
12
dB
nV
-----------
en
Equivalent input noise voltage f = 1kHz
9
Hz
THD Total harmonic distortion
Cs Channel separation
Vout= 2Vp-p, F= 1kHz, Av= 1, RL=600Ω
0.005
120
%
dB
6/21
TS922
Electrical characteristics
Table 4.
Symbol
Electrical characteristics measured at V = 5V, V = 0V, V
= Vcc/2,
CC
DD
icm
T
= 25°C, and R connected to V /2 (unless otherwise specified)
amb
L cc
Parameter
Conditions
Min.
Typ. Max.
Unit
TS922, T=25°C
3
TS922A, T=25°C
TS922IJ (flip-chip), T=25°C
0.9
1.5
Vio
Input offset voltage
mV
Tmin ≤ Tamb ≤ Tmax TS922
5
Tmin ≤ Tamb ≤ Tmax TS922A
Tmin ≤ Tamb ≤ Tmax TS922IJ (flip-chip)
1.8
2.5
DVio
Iio
Input offset voltage drift
2
μV/°C
Input offset current
Vout = VCC/2
T=25°C
1
30
30
nA
Tmin ≤ Tamb ≤ Tmax
Input bias current
Vout = VCC/2
T=25°C
15
100
100
Iib
nA
Tmin ≤ Tamb ≤ Tmax
RL= 10k, T=25°C
Tmin ≤ Tamb ≤ Tmax
4.9
4.9
VOH
High level output voltage
RL = 600Ω, T=25°C
Tmin ≤ Tamb ≤ Tmax
4.85
4.85
V
RL = 32Ω, T=25°C
4.4
RL= 10k, T=25°C
Tmin ≤ Tamb ≤ Tmax
50
50
VOL
Low level output voltage
Large signal voltage gain
RL = 600Ω, T=25°C
Tmin ≤ Tamb ≤ Tmax
120
120
mV
RL = 32Ω, T=25°C
300
200
RL= 10k, T=25°C
V/mV
RL= 10k, Tmin ≤ Tamb ≤ Tmax
70
20
Avd
RL = 600Ω, T=25°C
RL = 600Ω, Tmin ≤ Tamb ≤ Tmax
35
(Vout = 2Vp-p
)
RL = 32Ω, T=25°C
16
2
Total supply current
T=25°C
3
Icc
mA
MHz
dB
No load, Vout = VCC/2,
Tmin ≤ Tamb ≤ Tmax
3.2
GBP Gain bandwidth product
RL = 600Ω
4
T=25°C
60
56
80
Common mode rejection
CMR
ratio
Tmin ≤ Tamb ≤ Tmax
T=25°C
60
60
85
Supply voltage rejection ratio
VCC = 4.5 to 5.5V
SVR
dB
Tmin ≤ Tamb ≤ Tmax
Io
Output short circuit current
Slew rate
50
80
1.3
68
12
mA
V/μs
SR
φm
Gm
0.7
Phase margin at unit gain
Gain margin
RL = 600Ω, CL =100pF
RL = 600Ω, CL =100pF
Degrees
dB
Equivalent input noise
voltage
nV
en
f = 1kHz
9
-----------
Hz
7/21
Electrical characteristics
TS922
Table 4.
Symbol
Electrical characteristics measured at V = 5V, V = 0V, V
= Vcc/2,
CC
DD
icm
T
= 25°C, and R connected to V /2 (unless otherwise specified) (continued)
amb
L cc
Parameter
Conditions
Min.
Typ. Max.
Unit
THD Total harmonic distortion
Cs Channel separation
Vout= 2Vp-p, F= 1kHz, Av= 1, RL=600Ω
0.005
120
%
dB
8/21
TS922
Electrical characteristics
Figure 3.
Output short circuit current vs.
output voltage
Figure 4.
Total supply current vs. supply
voltage
100
80
60
Sink
40
20
Vcc=0/3V
0
-20
-40
-60
-80
Source
-100
0
0,5
1
1,5
2
2,5
3
Output Voltage (V)
Figure 5.
Voltage gain and phase vs.
frequency
Figure 6.
Equivalent input noise voltage vs.
frequency
60
180
120
60
30
25
20
15
10
5
phase
40
20
0
V
=±1.5V
Rl=10k
Cl=100pF
CC
L
R =100Ω
gain
0
0
0.01
0.1
1
10
100
-20
-60
Frequency (kHz)
1E+02
1E+03
1E+04
1E+05
1E+06
1E+07
1E+08
Frequency (Hz)
Figure 7.
THD + noise vs. frequency
Figure 8.
THD + noise vs. frequency
0.04
0.032
0.024
0.016
0.008
0.02
0.015
0.01
R =32Ω Vo=4Vpp
CC
L
R =2k Vo=10Vpp
L
CC
V
=±2.5V Av= 1
V
=±6V Av= 1
0.005
0
0
0.01
0.1
1
10
100
0.01
0.1
1
10
100
Frequency (kHz)
Frequency (kHz)
9/21
Electrical characteristics
TS922
Figure 9.
THD + noise vs. frequency
Figure 10. THD + noise vs. output voltage
10,000
1,000
0,100
0,010
0,001
0.7
0.6
0.5
0.4
0.3
0.2
0.1
R =32Ω Vo=2Vpp
CC
L
R =600Ω f=1kHz
CC
V
=±1.5V Av= 10
L
V
=0/3V Av= -1
0
0.01
0.1
1
10
100
0
0,2
0,4
0,6
0,8
1
1,2
Frequency (kHz)
Vout (Vrms)
Figure 11. THD + noise vs. output voltage
Figure 12. THD + noise vs. output voltage
10
10
1
1
R =32Ω f=1kHz
CC
L
V
=±1.5V Av= -1
0.1
R =2kΩ f=1kHz
CC
L
V
=±1.5V Av= -1
0.1
0.01
0.01
0
0.2
0.4
0.6
0.8
1
0.001
Vout (Vrms)
0
0.2
0.4
0.6
0.8
1
1.2
Vout (Vrms)
Figure 13. Open loop gain and phase vs.
frequency
50
40
30
180
120
60
0
C =500pF
L
20
10
0
1E+2
1E+3
1E+4
1E+5
Frequency (Hz)
1E+6
1E+7
1E+8
10/21
TS922
Macromodel
4
Macromodel
4.1
Important note concerning this macromodel
Please consider the following remarks before using this macromodel.
●
All models are a trade-off between accuracy and complexity (i.e. simulation time).
●
Macromodels are not a substitute to breadboarding; rather, they confirm the validity of
a design approach and help to select surrounding component values.
●
A macromodel emulates the nominal performance of a typical device within specified
operating conditions (temperature, supply voltage, for example). Thus the
macromodel is often not as exhaustive as the datasheet, its purpose is to illustrate the
main parameters of the product.
Data derived from macromodels used outside of the specified conditions (V , temperature,
CC
for example) or even worse, outside of the device operating conditions (V , V , for
CC icm
example), is not reliable in any way.
Section 4.2 presents the electrical characteristics resulting from the use of these
macromodels.
4.2
Electrical characteristics from macromodelization
Table 5.
Electrical characteristics resulting from macromodel simulation at V
=
CC
3V, V = 0V, R , C connected to V /2, T = 25°C (unless otherwise
DD
L
L
CC
amb
specified)
Symbol
Conditions
Value
Unit
Vio
Avd
0
200
1.2
mV
V/mV
mA
V
RL = 10kΩ
ICC
No load, per operator
Vicm
VOH
VOL
Isink
Isource
GBP
SR
-0.2 to 3.2
2.95
25
RL = 10kΩ
V
RL = 10kΩ
mV
mA
mA
MHz
V/μs
VO = 3V
80
VO = 0V
80
RL = 600kΩ
RL = 10kΩ, CL = 100pF
RL = 600kΩ
4
1.3
φm
68
Degrees
11/21
Macromodel
TS922
4.3
Macromodel code
** Standard Linear Ics Macromodels, 1996.
** CONNECTIONS:
* 1 INVERTING INPUT
* 2 NON-INVERTING INPUT
* 3 OUTPUT
* 4 POSITIVE POWER SUPPLY
* 5 NEGATIVE POWER SUPPLY
*
.SUBCKT TS92X 1 2 3 4 5
*
.MODEL MDTH D IS=1E-8 KF=2.664234E-16 CJO=10F
*
* INPUT STAGE
CIP 2 5 1.000000E-12
CIN 1 5 1.000000E-12
EIP 10 5 2 5 1
EIN 16 5 1 5 1
RIP 10 11 8.125000E+00
RIN 15 16 8.125000E+00
RIS 11 15 2.238465E+02
DIP 11 12 MDTH 400E-12
DIN 15 14 MDTH 400E-12
VOFP 12 13 DC 153.5u
VOFN 13 14 DC 0
IPOL 13 5 3.200000E-05
CPS 11 15 1e-9
DINN 17 13 MDTH 400E-12
VIN 17 5 -0.100000e+00
DINR 15 18 MDTH 400E-12
VIP 4 18 0.400000E+00
FCP 4 5 VOFP 1.865000E+02
FCN 5 4 VOFN 1.865000E+02
FIBP 2 5 VOFP 6.250000E-03
FIBN 5 1 VOFN 6.250000E-03
* GM1 STAGE ***************
FGM1P 119 5 VOFP 1.1
FGM1N 119 5 VOFN 1.1
RAP 119 4 2.6E+06
RAN 119 5 2.6E+06
* GM2 STAGE ***************
G2P 19 5 119 5 1.92E-02
G2N 19 5 119 4 1.92E-02
R2P 19 4 1E+07
R2N 19 5 1E+07
**************************
VINT1 500 0 5
GCONVP 500 501 119 4 19.38
VP 501 0 0
GCONVN 500 502 119 5 19.38
VN 502 0 0
12/21
TS922
Macromodel
********* orientation isink isource *******
VINT2 503 0 5
FCOPY 503 504 VOUT 1
DCOPYP 504 505 MDTH 400E-9
VCOPYP 505 0 0
DCOPYN 506 504 MDTH 400E-9
VCOPYN 0 506 0
***************************
F2PP 19 5 poly(2) VCOPYP VP 0 0 0 0 0.5
F2PN 19 5 poly(2) VCOPYP VN 0 0 0 0 0.5
F2NP 19 5 poly(2) VCOPYN VP 0 0 0 0 1.75
F2NN 19 5 poly(2) VCOPYN VN 0 0 0 0 1.75
* COMPENSATION ************
CC 19 119 25p
* OUTPUT ***********
DOPM 19 22 MDTH 400E-12
DONM 21 19 MDTH 400E-12
HOPM 22 28 VOUT 6.250000E+02
VIPM 28 4 5.000000E+01
HONM 21 27 VOUT 6.250000E+02
VINM 5 27 5.000000E+01
VOUT 3 23 0
ROUT 23 19 6
COUT 3 5 1.300000E-10
DOP 19 25 MDTH 400E-12
VOP 4 25 1.052
DON 24 19 MDTH 400E-12
VON 24 5 1.052
.ENDS;TS92X
13/21
Package mechanical data
TS922
5
Package mechanical data
In order to meet environmental requirements, STMicroelectronics offers these devices in
®
ECOPACK packages. These packages have a Lead-free second level interconnect. The
category of second level interconnect is marked on the package and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com.
5.1
Flip-chip package (8 bumps)
Figure 14. Top view and dimensions of 8-bump flip-chip
1600 µm
■ Die size: 1600µm x 1600µm ±30µm
■ Die height: 350µm ±20µm
1600 µm
■ Die height (including bumps):
500µm
600µm
■ Bumps diameter: 315µm ±50µm
■ Bumps height: 250µm ±40µm
■ Pitch: 500µm ±10µm
500µm
∅ 315µm
600 µm
Figure 15. Flip-chip footprint recommendation
TS922IJ Footprint
75µm min.
100μm max.
500μm
500μm
Φ=250μm
Φ=400μm
Track
150μm min.
Solder mask opening
Pad in Cu 18μm with Flash NiAu (6μm, 0.15μm)
14/21
TS922
Package mechanical data
Figure 16. Flip-chip marking (top view)
BUMP 1A CORNER
n
n
n
n
Logo: ST
Part Number: 922
Date Code: YWW
The dot is for marking the bump
1A corner
LEADFREE
E
922
YWW
1
1
A
A
User direction of feed
Note:
Device orientation: the devices are oriented in the carrier pocket with bump number A1
adjacent to the sprocket holes.
15/21
Package mechanical data
TS922
5.2
DIP8 package
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
a1
B
3.3
0.130
0.7
0.028
0.055
0.036
1.39
0.91
1.65
1.04
0.065
0.041
B1
b
0.5
0.020
b1
D
E
0.38
0.5
9.8
0.015
0.020
0.386
8.8
0.346
0.100
0.300
0.300
e
2.54
7.62
7.62
e3
e4
F
7.1
4.8
0.280
0.189
I
L
3.3
0.130
Z
0.44
1.6
0.017
0.063
16/21
TS922
Package mechanical data
5.3
SO-8 package
Dimensions
Ref.
Millimeters
Typ.
Inches
Min.
Max.
Min.
Typ.
Max.
A
A1
A2
B
1.35
0.10
1.10
0.33
0.19
4.80
3.80
1.75
0.25
1.65
0.51
0.25
5.00
4.00
0.053
0.04
0.069
0.010
0.065
0.020
0.010
0.197
0.157
0.043
0.013
0.007
0.189
0.150
C
D
E
e
1.27
0.050
H
5.80
0.25
0.40
6.20
0.50
1.27
0.228
0.010
0.016
0.244
0.020
0.050
h
L
k
8° (max.)
ddd
0.1
0.04
17/21
Package mechanical data
TS922
5.4
TSSOP8 package
Dimensions
Ref.
Millimeters
Typ.
Inches
Typ.
Min.
Max.
Min.
Max.
A
A1
A2
b
1.2
0.047
0.006
0.041
0.012
0.008
0.122
0.260
0.177
0.05
0.80
0.19
0.09
2.90
6.20
4.30
0.15
1.05
0.30
0.20
3.10
6.60
4.50
0.002
0.031
0.007
0.004
0.114
0.244
0.169
1.00
0.039
c
D
3.00
6.40
4.40
0.65
0.118
0.252
0.173
0.0256
E
E1
e
K
0°
8°
0°
8°
L
0.45
0.60
1
0.75
0.018
0.024
0.039
0.030
L1
18/21
TS922
Ordering information
6
Ordering information
Table 6.
Order codes
Temperature
Part number
Package
DIP8
Packaging
Marking
range
TS922IN
TS922IN
TS922AIN
922I
Tube
TS922AIN
TS922ID/IDT
TS922AID/AIDT
TS922IPT
Tube or tape &
reel
SO-8
922AI
922I
TSSOP8
(Thin shrink outline package)
Tape & reel
Tape & reel
TS922AIPT
-40°C, +125°C
922AI
922
TS922IJT/EIJT
TS922IYD/IYDT
TS922AIYD/AIYDT
TS922IYPT
Flip-chip
922IY
922AIY
922IY
922AY
SO-8
Tube or tape &
reel
(automotive grade level)
TSSOP8
(automotive grade level)
Tape & reel
TS922AIYPT
19/21
Revision history
TS922
7
Revision history
Table 7.
Date
Document revision history
Revision
Changes
1-Feb-2001
1-Jul-2004
1
2
First release.
Flip-chip package inserted in the document.
Modifications in AMR Table 1 on page 4 (explanation of Vid and Vi
limits, ESD MM and CDM values added, Rthja added).
2-May-2005
1-Aug-2005
1-Mar-2006
3
4
5
PPAP references inserted in the datasheet, see Table 6 on page 19.
TS922EIJT part number inserted in the datasheet, see
Table 6 on page 19.
Modifications in AMR Table 1 on page 4 (Rthjc added), parameter
limits on full temperature range added in Table 3 on page 5 and
Table 4 on page 7.
26-Jan-2007
6
20/21
TS922
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