TS472_06 [STMICROELECTRONICS]
Very low noise microphone preamplifier with 2.0V bias output and active low standby mode; 非常低的噪声麦克风前置放大器偏压2.0V输出低电平待机模式
| 型号： | TS472_06 |
| 厂家： | 
ST |
| 描述： | Very low noise microphone preamplifier with 2.0V bias output and active low standby mode |
| 文件： | 总24页 (文件大小：625K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TS472
Very low noise microphone preamplifier with
2.0V bias output and active low standby mode
Features
Flip-chip - 12 bumps
■ Low noise: 10nV/√Hz typ. equivalent input
noise @ F = 1kHz
■ Fully differential input/output
■ 2.2V to 5.5V single supply operation
■ Low power consumption @20dB: 1.8mA
■ Fast start up time @ 0dB: 5ms typ.
■ Low distortion: 0.1% typ.
Pin Connections (top view)
C1
C2
VCC
OUT-
STDBY
OUT+
GND
■ 40kHz bandwidth regardless of the gain
■ Active low standby mode function (1μA max)
■ Low noise 2.0V microphone bias output
OUTPUT
BIAS
GS
■ Available in flip-chip lead-free package and in
IN+
BYPASS
IN-
QFN24 4x4mm package
■ ESD protection (2kV)
QFN24
Description
The TS472 is a differential-input microphone
preamplifier optimized for high-performance, PDA
and notebook audio systems.
This device features an adjustable gain from 0dB
to 40dB with excellent power-supply and
common-mode rejection ratios. In addition, the
TS472 has a very low-noise microphone bias
generator of 2V.
Pin Connection (top view)
It also includes a complete shutdown function,
with active low standby mode.
Applications
■ Video and photo cameras with sound input
■ Sound acquisition & voice recognition
■ Video conference systems
■ Notebook computers and PDAs
September 2006
Rev 4
1/24
www.st.com
24
Contents
TS472
Contents
1
2
3
4
5
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Typical application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.1
5.2
5.3
5.4
5.5
5.6
5.7
5.8
5.9
Differential configuration principle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Higher cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Lower cut-off frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Low-noise microphone bias source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Gain settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Wake-up time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Single-ended input configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
5.10 Demo board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6
7
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.1
6.2
Flip-chip package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
QFN24 package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
2/24
TS472
Ordering information
1
Ordering information
Table 1.
Order codes
Temperature
Part number
Package
Packing
Marking
range
TS472EIJT
TS472IQT
-40°C, +85°C
-40°C, +85°C
Flip-chip
Tape & reel
Tape & reel
472
QFN24 4x4mm
K472
3/24
Typical application schematic
TS472
2
Typical application schematic
Figure 1 shows a typical application schematic for the TS472.
Figure 1. Application schematic (flip-chip)
Table 2.
External component descriptions
Functional description
Components
Input coupling capacitors that block the DC voltage at the amplifier input
terminal.
Cin+, Cin-
Output coupling capacitors that block the DC voltage coming from the
amplifier output terminal (pins C2 and D2) and determine Lower cut-off
frequency.
Cout+, Cout-
Output load resistors used to charge the output coupling capacitors Cout
.
Rout+, Rout-
These output resistors can be represented by an input impedance of a
following stage.
Rpos, Rneg
Cs
Polarizing resistors for biasing of a microphone.
Supply bypass capacitor that provides power supply filtering.
Bypass pin capacitor that provides half-supply filtering.
Low pass filter capacitors allowing to cut the high frequency.
Cb
C1, C2
4/24
TS472
Absolute maximum ratings
3
Absolute maximum ratings
Table 3.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VCC
Vi
Supply voltage (1)
6
V
V
Input voltage
-0.3 to VCC+0.3
-40 to + 85
-65 to +150
150
Toper
Tstg
Tj
Operating free air temperature range
Storage temperature
°C
°C
°C
Maximum junction temperature
Thermal resistance junction to ambient:
180
110
Rthja
°C/W
Flip-chip
QFN24
ESD
ESD
Human body model
2
kV
V
Machine model
200
250
Lead temperature (soldering, 10sec)
°C
1. All voltages values are measured with respect to the ground pin.
Table 4.
Symbol
Operating conditions
Parameter
Value
Unit
VCC
A
Supply voltage
2.2 to 5.5
20
V
Typical differential gain (GS connected to 4.7kΩ or bias)
Standby voltage input:
dB
VSTBY
1.5 ≤VSTBY ≤VCC
GND ≤VSTBY ≤0.4
V
Device ON
Device OFF
Top
Operational free air temperature range
-40 to +85
°C
Thermal resistance junction to ambient:
150
60
Rthja
°C/W
Flip-chip
QFN24
5/24
Electrical characteristics
TS472
4
Electrical characteristics
Table 5.
Electrical characteristics at V = 3V
CC
with GND = 0V, T
= 25°C (unless otherwise specified)
amb
Symbol
Parameter
Min.
Typ.
Max.
Unit
Equivalent input noise voltage density
REQ=100Ω at 1KHz
nV
en
10
-----------
Hz
Total harmonic distortion + noise
20Hz ≤F ≤ 20kHz, Gain=20dB, Vin=50mVRMS
THD+N
Vin
0.1
10
%
Input voltage, Gain=20dB
70
mVRMS
Bandwidth @ -3dB
Bandwidth @ -1dB
pin A3, B3 floating
40
20
BW
kHz
dB
Overall output voltage gain (Rgs variable):
G
Minimum gain, Rgs infinite
Maximum gain, Rgs=0
-3
39.5
-1.5
41
0
42.5
Zin
Input impedance referred to GND
80
10
100
120
kΩ
kΩ
pF
RLOAD Resistive load
CLOAD Capacitive load
100
2.4
1
ICC
Supply current, Gain=20dB
1.8
mA
μA
ISTBY
Standby current
Power supply rejection ratio, Gain=20dB, F=217Hz,
V
ripple=200mVpp, inputs grounded
PSRR
dB
Differential output
Single-ended outputs,
-70
-46
Table 6.
Symbol
Bias output: V = 3V, GND = 0V, T
= 25°C (unless otherwise specified)
CC
amb
Parameter
Min.
Typ. Max.
Unit
Vout
Rout
Iout
No load condition
Output resistance
Output bias current
1.9
80
2
100
2
2.1
V
W
120
mA
Power supply rejection ratio, F=217Hz,
Vripple=200mVpp
PSRR
70
80
dB
6/24
TS472
Electrical characteristics
Output noise voltage
Table 7.
Differential RMS noise voltage
Input referred noise voltage
Gain
(dB)
(μVRMS
)
(μVRMS
)
Unweighted filter
A-weighted filter
Unweighted filter A-weighted filter
0
15
3.4
1.4
10
2.3
0.9
15
34
10
23
91
20
40
141
Table 8.
Bias output RMS noise voltage
Cout
Unweighted filter
A-weighted filter
(μF)
(μVRMS
)
(μVRMS)
1
5
4.4
1.2
10
2.2
Table 9.
SNR (signal to noise ratio), THD+N < 0.5%
Unweighted filter
(dB)
A-weighted filter
(dB)
Gain
(dB)
VCC=2.2V
VCC=3V
VCC=5.5V
VCC=2.2V
VCC=3V
VCC=5.5V
0
75
82
70
76
83
72
76
83
74
79
89
80
80
90
82
80
90
84
20
40
Note:
Unweighted filter = 20Hz ≤F ≤20kHz
7/24
Electrical characteristics
TS472
Table 10. Index of graphics
Description
Figure
Current consumption vs. power supply voltage
Current consumption vs. standby voltage
Standby threshold voltage vs. power supply voltage
Frequency response
Figure 2 and Figure 3
Figure 4 and Figure 5
Figure 6
Figure 7
Bias output voltage vs. bias output current
Bias output voltage vs. power supply voltage
Bias PSRR vs. frequency
Figure 8
Figure 9
Figure 10 and Figure 11
Figure 12 to Figure 15
Figure 16
Differential output PSRR vs. frequency
Single-ended output PSRR vs. frequency
Equivalent input noise voltage density
Δgain vs. power supply voltage
Figure 17
Figure 18
Dgain vs. ambient temperature
Figure 19
Maximum input voltage vs. gain, THD+N<1%
Maximum input voltage vs. power supply voltage, THD+N<1%
THD+N vs. input voltage
Figure 20
Figure 21
Figure 22 to Figure 27
Figure 28 to Figure 29
Figure 30 to Figure 31
THD+N vs. frequency
Transient response
8/24
TS472
Electrical characteristics
Figure 2.
Current consumption vs. power
supply voltage
Figure 3.
Current consumption vs. power
supply voltage
3.0
2.5
2.0
1.5
1.0
0.5
3.0
2.5
2.0
1.5
1.0
0.5
Tamb=85°C
Tamb=25°C
Tamb=85°C
Tamb=25°C
Tamb=-40°C
Tamb=-40°C
No Loads
No Loads
GS grounded
GS floating
0.0
0
0.0
0
1
2
3
4
5
6
1
2
3
4
5
6
Power Supply Voltage (V)
Power Supply Voltage (V)
Figure 4.
Current consumption vs. standby Figure 5.
voltage
Current consumption vs. standby
voltage
2.5
2.0
1.5
1.0
0.5
2.5
2.0
1.5
Vcc=5V
Vcc=3V
Vcc=3V
Vcc=5V
1.0
0.5
0.0
No Loads
GS floating
Tamb = 25°C
No Loads
GS grounded
Tamb = 25°C
0.0
0
1
2
3
4
5
0
1
2
3
4
5
Standby Voltage (V)
Standby Voltage (V)
Figure 6.
Standby threshold voltage vs.
power supply voltage
Figure 7.
Frequency response
30
1.0
0.8
0.6
0.4
0.2
Cb=1μF, TAMB=25°C, Gain=20dB, Rout=100kΩ
20
10
0
no C1,C2
C1,C2=100pF
Cin,Cout=100nF
C1,C2=220pF
-10
Cin,Cout=10nF
No Loads
Tamb = 25°C
0.0
2.2
-20
10
3
4
5
5.5
100
1000
10000
100000
Power Supply Voltage (V)
Frequency (Hz)
9/24
Electrical characteristics
TS472
Figure 8.
Bias output voltage vs. bias output Figure 9.
current
Bias output voltage vs. power
supply voltage
2.2
2.2
2.0
1.8
1.6
1.4
Vcc=2.5-6V
Tamb=25°C
Ibias=0mA
Ibias=2mA
Ibias=4mA
2.0
1.8
1.6
1.4
Tamb=85°C
Tamb=-40°C
Tamb=25°C
5.5
3
4
5
0
1
2
3
4
2.2
Bias Output Current (mA)
Power Supply Voltage (V)
Figure 10. Bias PSRR vs. frequency
Figure 11. Bias PSRR vs. frequency
0
0
Vripple=200mVpp
Vcc=5V
Vripple=200mVpp
Vcc=3V
-20
-40
Cb=1
Tamb=25
μF
-20
-40
Cb=1
Tamb =25
μF
°
C
°
C
Bias = 1k
Ω to GND
Bias floating or 1k
Ω to GND
-60
-60
-80
-80
Bias floating
-100
-100
50
20k
100
1000
Frequency (Hz)
10000
50
20k
100
1000
Frequency (Hz)
10000
Figure 12. Differential output PSRR vs.
frequency
Figure 13. Differential output PSRR vs.
frequency
0
0
Vripple=200mVpp
Vripple=200mVpp
Inputs grounded
Vcc=3V
Inputs grounded
Vcc=5V
-10
-20
-30
-40
-50
-60
-70
-80
-10
-20
-30
-40
-50
-60
-70
-80
Cb=1
Cin=100nF
Tamb=25
μ
F
Cb=1
Cin=100nF
Tamb=25°C
μF
°
C
GS grounded
GS=bias
GS floating
GS grounded
GS=bias
GS floating
50
20k
50
20k
100
1000
Frequency (Hz)
10000
100
1000
Frequency (Hz)
10000
10/24
TS472
Electrical characteristics
Figure 14. Differential output PSRR vs.
frequency
Figure 15. Differential output PSRR vs.
frequency
0
0
-20
VRIPPLE=200mVPP, Inputs grounded
VRIPPLE=200mVPP, Inputs grounded
VCC=3V, Minimum Gain, Cin=1μF, TAMB =25°C
VCC=3V, Gain=20dB, Cin=1μF, TAMB =25°C
-20
-40
-40
Cb=1μF
Cb=1μF
Cb=100nF
No Cb
No Cb
-60
-60
-80
-80
Cb=100nF
-100
-100
50
100
1k
Frequency (Hz)
10k
20k
50
100
1k
Frequency (Hz)
10k
20k
Figure 16. Single-ended output PSRR vs.
frequency
Figure 17. Equivalent input noise voltage
density
0
1000
Vripple=200mVpp
Cin=100nF
-10 Inputs grounded
REQ=100
Ω
Cb=1
Cin=100nF
Tamb=25
μF
Vcc=3V
TAMB=25
°
C
-20
-30
-40
-50
-60
-70
-80
°
C
100
10
1
Vcc=2.2V
100
Vcc=5V
10000
10
100
1k
10k
100k
50
20k
1000
Frequency (Hz)
Frequency (Hz)
Figure 18. Δgain vs. power supply voltage
Figure 19. Δgain vs. ambient temperature
1.0
0.50
F=1kHz
F=1kHz
Vin=5mV
Tamb=25°C
VIN=5mV
0.8
0.6
0.25
Maximum Gain
0.00
0.4
-0.25
Maximum Gain
0.2
-0.50
Gain=20dB
0.0
Minimum Gain
Gain=20dB
-0.75
-0.2
-0.4
Minimum Gain
-1.00
5.5
3
4
5
-40
-20
0
20
40
60
80
2.2
Power Supply Voltage (V)
Ambient Temperature (°C)
11/24
Electrical characteristics
TS472
Figure 20. Maximum input voltage vs. gain,
THD+N<1%
Figure 21. Maximum input voltage vs. power
supply voltage, THD+N<1%
150
TAMB=25°C, F=1kHz, THD+N<1%
140
120
100
80
Gain=0dB
TAMB=25°C
VCC=5.5V
F=1kHz
THD+N<1%
100
60
Gain=30dB
Gain=20dB
50
Gain=40dB
40
VCC=3V
20
VCC=2.2V
0
0
3
4
Power Supply Voltage (V)
5
5.5
2.2
0
10
20
30
40
Gain (dB)
Figure 22. THD+N vs. input voltage
Figure 23. THD+N vs. input voltage
10
10
GS floating
GS floating
GS=bias
GS=bias
1
1
0.1
0.1
GS grounded
GS grounded
Tamb=25°C, Vcc=3V, F=100Hz,
Tamb=25°C, Vcc=5V, F=100Hz,
0.01
1E-3
0.01
1E-3
Cb=1
μ
F, RL=10k
Ω
, BW=100Hz-120kHz
Cb=1
μ
F, RL=10k
Ω
, BW=100Hz-120kHz
0.3
0.3
0.01
0.1
0.01
0.1
Input Voltage (V)
Input Voltage (V)
Figure 24. THD+N vs. input voltage
Figure 25. THD+N vs. input voltage
10
10
GS floating
GS floating
GS=bias
GS=bias
1
1
0.1
0.1
GS grounded
GS grounded
Tamb=25°C, Vcc=5V, F=1kHz,
Tamb=25°C, Vcc=3V, F=1kHz,
Cb=1 F, RL=10k , BW=100Hz-120kHz
0.01
1E-3
0.01
1E-3
Cb=1
μ
F, RL=10k
Ω
, BW=100Hz-120kHz
μ
Ω
0.3
0.3
0.01
Input Voltage (V)
0.1
0.01
0.1
Input Voltage (V)
12/24
TS472
Electrical characteristics
Figure 26. THD+N vs. input voltage
Figure 27. THD+N vs. input voltage
10
10
GS floating
GS floating
GS grounded
GS=bias
GS=bias
1
1
0.1
0.1
0.01
GS grounded
Tamb=25°C, Vcc=5V, F=20kHz,
Tamb=25°C, Vcc=3V, F=20kHz,
0.01
Cb=1
μ
F, RL=10k
Ω
, BW=100Hz-120kHz
Cb=1
μ
F, RL=10k
Ω
, BW=100Hz-120kHz
0.01
0.3
0.3
1E-3
0.1
1E-3
0.01
0.1
Input Voltage (V)
Input Voltage (V)
Figure 28. THD+N vs. frequency
Figure 29. THD+N vs. frequency
10
10
Tamb=25°C
Vcc=3V
Tamb=25
Vcc=5V
°C
GS=bias, Vin=100mV
RL=10k
Cb=1
BW=100Hz-120kHz
Ω
RL=10k
Cb=1
BW=100Hz-120kHz
Ω
μ
F
μ
F
GS=bias, Vin=100mV
GS grounded, Vin=20mV
1
1
GS grounded, Vin=20mV
GS floating, Vin=100mV
GS floating, Vin=100mV
0.1
0.1
50
100
1000
10000 20k
50
100
1000
10000 20k
Frequency (Hz)
Frequency (Hz)
Figure 30. Transient response
Figure 31. Transient response
13/24
Application information
TS472
5
Application information
5.1
Differential configuration principle
The TS472 is a full-differential input/output microphone preamplifier. The TS472 also
includes a common mode feedback loop that controls the output bias value to average it at
/2. This allows the device to always have a maximum output voltage swing, and by
V
CC
consequence, maximize the input dynamic voltage range.
The advantages of a full-differential amplifier are:
●
●
●
Very high PSRR (power supply rejection ratio).
High common mode noise rejection.
In theory, the filtering of the internal bias by an external bypass capacitor is not
necessary. But, to reach maximum performance in all tolerance situations, it is better to
keep this option.
5.2
Higher cut-off frequency
The higher cut-off frequency F of the microphone preamplifier depends on the external
CH
capacitors C , C .
1
2
TS472 has an internal first order low pass filter (R=40kΩ, C=100pF) to limit the highest cut-
off frequency on 40kHz (with a 3dB attenuation). By connecting C , C you can decrease
1
2
F
by applying the following formula:
CH
1
FCH = ---------------------------------------------------------------------------------------------
2π ⋅ 40× 103 ⋅ (C1, 2 + 100× 10–12
)
Figure 32 below indicates directly the higher cut-off frequency in Hz versus the value of the
output capacitors C , C in nF.
1
2
Figure 32. Higher cut-off frequency vs. output
capacitors
40
10
1
200
400
600
800
1000
C1, C2 (pF)
For example, F is almost 20kHz with C =100pF.
CH
1,2
14/24
TS472
Application information
5.3
Lower cut-off frequency
The lower cut-off frequency F of the microphone preamplifier depends on the input
CL
capacitors C and output capacitors C . These input and output capacitors are mandatory
in
out
in an application because of DC voltage blocking.
The input capacitors C in series with the input impedance of the TS472 (100kΩ) are
in
equivalent to a first order high pass filter. Assuming that F is the lowest frequency to be
CL
amplified (with a 3dB attenuation), the minimum value of C is:
in
1
Cin = ------------------------------------------------------
2π ⋅ FCL ⋅ 100× 103
The capacitors C in series with the output resistors R (or an input impedance of the
out
out
next stage) are also equivalent to a first order high pass filter. Assuming that F is the
CL
lowest frequency to be amplified (with a 3dB attenuation), the minimum value of C is:
out
1
C
out= ------------------------------------------
2π ⋅ FCL ⋅ Rout
Figure 33. Lower cut-off frequency vs. input
capacitors
Figure 34. Lower cut-off frequency vs. output
capacitors
1000
1000
Rout=10k
Ω
ZinMAX
Typical Zin
100
100
ZinMIN
Rout=100k
Ω
10
10
1
10
Cin (nF)
100
1
10
100
1000
Cout (nF)
Figure 33 and Figure 34 give directly the lower cut-off frequency (with 3dB attenuation)
versus the value of the input or output capacitors
Note:
In case F is kept the same for calculation, take into account that the 1st order high-pass
CL
filter on the input and the 1st order high-pass filter on the output create a 2nd order high-
pass filter in the audio signal path with an attenuation of 6dB on F and a rolloff of
CL
40dB⁄ decade.
5.4
Low-noise microphone bias source
The TS472 provides a very low noise voltage and power supply rejection BIAS source
designed for biasing an electret condenser microphone cartridge. The BIAS output is
typically set at 2.0 V (no load conditions), and can typically source 2mA with respect to
DC
drop-out, determined by the internal resistance 100Ω (for detailed load regulation curves
see Figure 8).
15/24
Application information
TS472
5.5
Gain settings
The gain in the application depends mainly on:
●
●
●
●
the sensitivity of the microphone
the distance to the microphone
the audio level of the sound
the desired output level
The sensitivity of the microphone is generally expressed in dB/Pa, referenced to 1V/Pa. For
example, the microphone used in testing had an output voltage of 6.3mV for a sound
pressure of 1 Pa (where Pa is the pressure unit, Pascal). Expressed in dB, the sensitivity is:
20Log(0.0063) = -44 dB/Pa
To facilitate the first approach, Table 11 below gives voltages and gains used with a low cost
omnidirectional electret condenser microphone of -44dB/Pa.
Table 11. Typical TS472 gain vs. distance to the microphone (sensitivity -44dB/Pa)
Distance to microphone
Microphone output voltage
TS472 Gain
1cm
30mVRMS
3mVRMS
20
20cm
100
The gain of the TS472 microphone preamplifier can be set:
1. From -1.5 dB to 41 dB by connecting an external grounded resistor R to the GS pin.
GS
It allows to adapt more precisely the gain to each application.
Table 12. Selected gain vs. gain select resistor
Gain (dB)
GS (Ω)
0
10
20
30
1k
40
68
R
470k
27k
4k7
Figure 35. Gain in dB vs. gain select resistor
Figure 36. Gain in V/V vs. gain select resistor
50
Tamb=25°C
Tamb=25°C
100
10
1
40
30
20
10
0
-10
10
10
100
1k
10k
100k
1M
100
1k
10k
100k
1M
RGS (Ω)
RGS (Ω)
2. To 20dB by applying V > 1V on Gain Select (GS) pin. This setting can help to
GS
DC
reduce a number of external components in an application, because 2.0 V is
DC
provided by TS472 itself on BIAS pin.
16/24
TS472
Application information
Figure 37 below gives other values of the gain vs. voltage applied on GS pin.
Figure 37. Gain vs. gain select voltage
Tamb=25°C
40
20
0
-20
-40
-60
-80
0
0.2
0.4
0.6
0.8
4
5
VGS (V)
5.6
Wake-up time
When the standby is released to put the device ON, a signal appears on the output a few
microseconds later, and the bypass capacitor C is charged in a few milliseconds. As C is
b
b
directly linked to the bias of the amplifier, the bias will not work properly until the C voltage
b
is correct.
In the typical application, when a biased microphone is connected to the differential input via
the input capacitors (C ), (and the output signal is in line with the specification), the wake-up
in
time will depend upon the values of the input capacitors C and the gain. When gain is
in
lower than 0dB, the wake-up time is determined only by the bypass capacitor C , as
b
described above. For a gain superior to 0dB, see Figure 38 below.
Figure 38. Wake-up time in the typical application vs. input capacitors
60
Tamb = 25°C
Vcc=3V
Cb=1μF
50
40
30
20
10
0
Maximum Gain
Gain=20dB
20
40
60
80
100
Input capacitors CIN (nF)
17/24
Application information
TS472
5.7
Standby mode
When the standby command is set, the time required to set the output stages (differential
outputs and 2.0V bias output) in high impedance and the internal circuitry in shutdown mode
is a few microseconds.
5.8
Layout considerations
The TS472 has sensitive pins to connect C1, C2 and Rgs. To obtain high power supply
rejection and low noise performance, it is mandatory that the layout track to these
component is as short as possible.
Decoupling capacitors on V and bypass pin are needed to eliminate power supply drops.
CC
In addition, the capacitor location for the dedicated pin should be as close to the device as
possible.
5.9
Single-ended input configuration
It’s possible to use the TS472 in a single-ended input configuration. The schematic in
Figure 39 provides an example of this configuration.
Figure 39. Single ended input typical application
Optional
C1
VCC
Cs
1uF
C2
C3
1uF
Rpos
U1
TS472
Vcc
Rout+
Rout-
Cout+
Cout-
Cin+
Cin-
IN+
OUT+
OUT-
A1
B1
C2
D2
Positive Output
Negative Output
+
IN-
Electret Mic
GAIN
SELECT
B2
D1
G
BYPASS
BIAS
2.0V
A2
Bias
Cb
1uF
Standby Control
18/24
TS472
Application information
5.10
Demo board
A demo board for the TS472 is available. For more information about this demo board,
please refer to Application Note AN2240, which can be found on www.st.com.
Figure 40. PCB top layer
Figure 41. PCB bottom layer
Figure 42. Component location
19/24
Package mechanical data
TS472
6
Package mechanical data
In order to meet environmental requirements, STMicroelectronics offers these devices in
®
ECOPACK packages. These packages have a Lead-free second level interconnect. The
category of second level interconnect is marked on the package and on the inner box label,
in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an STMicroelectronics
trademark. ECOPACK specifications are available at: www.st.com.
6.1
Flip-chip package
Figure 43. TS472 footprint recommendation
75µm min.
100μm max.
500μm
500μm
Φ=250μm
Track
Φ=400μm typ.
Φ=340μm min.
150μm min.
Non Solder mask opening
Pad in Cu 18μm with Flash NiAu (2-6μm, 0.2μm max.)
Figure 44. Pin-out (top view)
C1
C2
VCC
OUT-
STDBY
OUT+
GND
3
2
1
OUTPUT
BIAS
GS
IN+
IN-
BYPASS
B
D
C
A
Balls are underneath
20/24
TS472
Package mechanical data
Figure 45. Marking (top view)
■
■
■
■
■
ST logo
E
Part number: 472
E Lead free bumps
Three digits datecode: YWW
The dot indicates pin A1
472
YWW
Figure 46. Flip-chip - 12 bumps
■
■
■
■
■
■
■
■
Die size: 2.1mm x 1.6mm ± 30µm
Die height (including bumps): 600µm
Bumps diameter: 315µm ±50µm
Bump diameter before reflow: 300µm ±10µm
Bump height: 250µm ±40µm
Die height: 350µm ±20µm
2.1 mm
1.6 mm
0.5mm
0.5mm
∅
0.315mm
Pitch: 500µm ±50µm
Coplanarity: 50µm max
600µm
Figure 47. Tape & reel specification (top view)
1.5
4
1
1
A
A
8
Die size X + 70µm
4
All dimensions are in mm
User direction of feed
21/24
Package mechanical data
TS472
6.2
QFN24 package
Figure 48. QFN24 package mechanical data
22/24
TS472
Revision history
7
Revision history
Table 13. Document revision history
Date
Revision
Changes
1-Jul-05
1-Oct-05
1
2
Initial release corresponding to product preview version.
First release of fully mature product datasheet.
Added single-ended input operation in Section 5: Application
information.
1-Dec-05
3
4
Added QFN package information. Updated curves, added new ones
in Section 4: Electrical characteristics.
12-Sep-2006
23/24
TS472
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24/24
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