STRH40N6SY1 [STMICROELECTRONICS]
40A, 60V, 0.034ohm, N-CHANNEL, Si, POWER, MOSFET, HERMETIC SEALED, SMD-0.5, 3 PIN;
| 型号： | STRH40N6SY1 |
| 厂家： | 
ST |
| 描述： | 40A, 60V, 0.034ohm, N-CHANNEL, Si, POWER, MOSFET, HERMETIC SEALED, SMD-0.5, 3 PIN 开关 脉冲 晶体管 |
| 文件： | 总13页 (文件大小：243K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
STRH40N6SY1
STRH40N6SY3
N-channel 60V - 0.032Ω - SMD-0.5
rad-hard low gate charge STripFET™ Power MOSFET
Features
Type
VDSS
STRH40N6SY1
STRH40N6SY3
60 V
2
60 V
1
3
■ Low R
DS(on)
■ Fast switching
■ Single event effect (SEE) hardned
■ Low total gate charge
SMD-0.5
■ Light weight
■ 100% avalanche tested
■ Application oriented characterization
■ Hermetically sealed
Figure 1.
Internal schematic diagram
■ Heavy ion SOA
■ 100kRad TID
■ SEL & SEGR with 34Mev/cm²/mg LET ions
Applications
■ Satellite
■ High reliability
Description
This Power MOSFET series realized with
STMicroelectronics unique STripFET process has
specifically been designed to sustain high TID
and provide immunity to heavy ion effects. It is
therefore suitable as power switch in mainly high-
efficiency DC-DC converters. It is also intended
for any application with low gate charge drive
requirements.
Table 1.
Device summary
Part number
Marking
Package
SMD-0.5
SMD-0.5
Packaging
STRH40N6SY1 (1)
STRH40N6SY3 (2)
RH40N6SY1
RH40N6SY3
Individual strip pack
Individual strip pack
1. Mil temp range
2. Space flights parts (full ESCC flow screening)
November 2007
Rev 5
1/13
www.st.com
13
Contents
STRH40N6SY1 - STRH40N6SY3
Contents
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
2.2
2.3
Pre-irradiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Post-irradiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics (curves)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3
4
5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2/13
STRH40N6SY1 - STRH40N6SY3
Electrical ratings
1
Electrical ratings
Table 2.
Symbol
Absolute maximum ratings (pre-irradiation)
Parameter
Value
Unit
VDS
VGS
Drain-source voltage (VGS = 0)
60
V
Gate-source voltage
14
40
V
A
(1)
ID
Drain current (continuous) at TC= 25°C
Drain current (continuous) at TC= 100°C
Drain current (pulsed)
(1)
ID
32
A
(2)
IDM
160
3
A
(3)
PTOT
Total dissipation at TC= 25°C
Total dissipation at TC= 25°C
Peak diode recovery voltage slope
Storage temperature
W
(1)
PTOT
80
W
dv/dt (4)
Tstg
2.5
V/ns
°C
°C
-55 to 150
150
Tj
Max. operating junction temperature
1. Rated according to the Rthj-case + Rthc-s
2. Pulse width limited by safe operating area
3. Rated according to the Rthj-amb
4. ISD ≤ 40 A, di/dt ≤ 1060 A/µs, VDD = 80 %V(BR)DSS
Table 3.
Symbol
Thermal data
Parameter
Value
Unit
Rthj-case Thermal resistance junction-case
Rthc-s Case-to-sink
1.67
0.21
50
°C/W
°C/W
°C/W
Rthj-amb(1) Thermal resistance junction -amb
1. When mounted on heat sink of 300mm², t < 10sec
Table 4.
Symbol
Avalanche characteristics
Parameter
Value
Unit
Avalanche current, repetitive or not-repetitive
(pulse width limited by Tj max)
IAR
20
A
Single pulse avalanche energy
EAS
512
20
mJ
mJ
(starting Tj=25°C, Id=Iar, Vdd=50V)
(1)
EAR
Repetitive avalanche
1. Pulse number = 10; f= 10 KHz; D.C. = 50%
3/13
Electrical characteristics
STRH40N6SY1 - STRH40N6SY3
2
Electrical characteristics
(T
= 25°C unless otherwise specified)
CASE
2.1
Pre-irradiation
Table 5.
Symbol
On/off states
Parameter
Test conditions
80% BVDss
Min.
Typ. Max. Unit
Zero gate voltage drain
current (VGS = 0)
IDSS
10
µA
nA
Gate body leakage current
(VDS = 0)
IGSS
VGS = 14 V
±100
Drain-to-source breakdown
voltage
BVDSS
VGS = 0, ID = 1 mA
60
2
V
V
Ω
VGS(th) Gate threshold voltage
VDS = VGS, ID = 1 mA
4.5
VGS = 12 V
ID = 20 A
Static drain-source on
resistance
RDS(on)
0.032 0.034
Table 6.
Symbol
Dynamic
Parameter
Test conditions
Min.
Typ. Max. Unit
Input capacitance
Ciss
Coss
Crss
1624 2030 2436
pF
pF
pF
VGS = 0, VDS = 25 V,
f=1MHz
Output capacitance
289
103
362
129
434
154
Reverse transfer
capacitance
Total gate charge
Qg
Qgs
Qgd
45.6
10
57
12.5
18
68.4
15
nC
nC
nC
VDD = 30 V, ID = 20 A,
VGS=12 V
Gate-to-source charge
Gate-to-drain (“Miller”)
charge
14.4
21.6
f=1MHz Gate DC Bias=0
Test signal level=20 mV
open drain
RG
Gate input resistance
1.04
1.3
1.56
Ω
Table 7.
Symbol
Switching times
Parameter
Test conditions
Min. Typ.
Max
Unit
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
16
38.4
32
20
48
40
13
24
48
40
13
ns
ns
ns
ns
VDD = 30 V, ID = 20 A,
Turn-off-delay time
Fall time
RG = 4.7 Ω, VGS = 12 V
10.4
4/13
STRH40N6SY1 - STRH40N6SY3
Electrical characteristics
Min. Typ. Max Unit
Table 8.
Symbol
Source drain diode
Parameter
Test conditions
ISD
Source-drain current
40
A
A
(1)
ISDM
Source-drain current (pulsed)
160
(2)
VSD
Forward on voltage
ISD = 40 A, VGS = 0
1.1
V
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
294 368
441
537
ns
µC
A
ISD = 40 A, di/dt = 100 A/µs
VDD= 30 V, Tj = 25 °C
Qrr
3.5
19
IRRM
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
358 448
ns
µC
A
ISD = 40 A, di/dt = 100 A/µs
VDD= 30 V, Tj = 150 °C
Qrr
4.7
21
IRRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
2.2
Post-irradiation
The ST rad-hard Power MOSFETs are tested to verify the radiation capability. The
technology is extremely resistant to assurance well functioning of the device inside the
radiation environments. Every manufacturing lot is tested for total ionizing dose.
(a)
(@Tj= 25 °C up to 100 Krad
)
Table 9.
Symbol
On/off states
Parameter
Test conditions
80% BVDss
Min. Typ. Max Unit
Zero gate voltage drain
current (VGS = 0)
IDSS
10
µA
nA
Gate body leakage current
(VDS = 0)
IGSS
VGS = 14 V
±100
Drain-to-source breakdown
voltage
BVDSS
VGS = 0V, ID = 1 mA
VDS =VGS, ID = 1 mA
60
2
V
V
Ω
VGS(th) Gate threshold voltage
4.5
VGS = 12 V
ID = 20 A
Static drain-source on
resistance
RDS(on)
0.032 0.034
a. According to ESCC 22900 specification, Co60 gamma rays, dose rags:0.1rad/sec.
5/13
Electrical characteristics
STRH40N6SY1 - STRH40N6SY3
(1)
Table 10. Single event effect, SOA
VDS (V) @VGS0V
Ion
Let (Mev/(mg/cm2))
Energy (MeV)
Range (µm)
Kr
34
316
459
43
43
60
60
Xe
55.9
1. Rad-Hard Power MOSFETs have been characterized in heavy ion environment for single event effect
(SEE). Single event effect characterization is illustrated
Figure 2.
Bias condition during radiation
Table 11. Source drain diode
Symbol
Parameter
Test conditions
Min. Typ. Max Unit
ISD
Source-drain current
40
A
A
(1)
ISDM
Source-drain current (pulsed)
160
(2)
VSD
Forward on voltage
ISD = 40A, VGS = 0
1.1
V
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
294 368
441
537
ns
µC
A
ISD = 40A, di/dt = 100A/µs
Qrr
3.5
19
VDD= 30V, Tj = 25°C
IRRM
trr
Reverse recovery time
Reverse recovery charge
Reverse recovery current
358 448
ns
µC
A
I
SD = 40A, di/dt = 100A/µs
Qrr
4.7
21
VDD= 30V, Tj = 150°C
IRRM
1. Pulse width limited by safe operating area
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%
6/13
STRH40N6SY1 - STRH40N6SY3
Electrical characteristics
2.3
Electrical characteristics (curves)
Figure 3.
Safe operating area
Figure 4.
Thermal impedance
Figure 5.
Output characteristics
Figure 6.
Transfer characteristics
Figure 7.
Gate charge vs gate-source voltage Figure 8.
Capacitance variations
7/13
Electrical characteristics
STRH40N6SY1 - STRH40N6SY3
Figure 9.
Normalized BV
vs temperature Figure 10. Static drain-source on resistance
DSS
Figure 11. Normalized gate threshold voltage Figure 12. Normalized on resistance vs
vs temperature
temperature
Figure 13. Source drain-diode forward
characteristics
8/13
STRH40N6SY1 - STRH40N6SY3
Test circuit
3
Test circuit
(1)
Figure 14. Switching times test circuit for resistive load
1. Max driver VGS slope = 1V/ns (no DUT)
Figure 15. Unclamped inductive load test circuit (single pulse and repetitive)
9/13
Package mechanical data
STRH40N6SY1 - STRH40N6SY3
4
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
10/13
STRH40N6SY1 - STRH40N6SY3
Package mechanical data
SMD-0.5 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
A1
b
3.00
0.118
0.38
7.26
5.72
2.41
3.05
10.16
0.015
0.286
0.225
0.095
0.120
0.400
b1
b2
b3
D
D1
E
0.76
0.030
7.52
1.91
0.296
0.075
e
7386434A
11/13
Revision history
STRH40N6SY1 - STRH40N6SY3
5
Revision history
Table 12. Document revision history
Date
Revision
Changes
13-Jul-2006
18-Dec-2006
15-Mar-2007
22-Oct-2007
1
2
3
4
First release
New value on Table 5.: On/off states
Complete version
Modified Figure 1, Note 2 on device summary has been corrected
Added figures: 2 and 15.
15-Nov-2007
5
Updated values on tables: 6, 7, 8 and 11
Minor text changes to improve readability
12/13
STRH40N6SY1 - STRH40N6SY3
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13/13
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