STRH60N20FSY3 [STMICROELECTRONICS]

53A, 200V, N-CHANNEL, Si, POWER, MOSFET, TO-254AA, HERMETIC SEALED PACKAGE-3;
STRH60N20FSY3
型号: STRH60N20FSY3
厂家: ST    ST
描述:

53A, 200V, N-CHANNEL, Si, POWER, MOSFET, TO-254AA, HERMETIC SEALED PACKAGE-3

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STRH60N20FSY1  
STRH60N20FSY3  
N-channel 200V - 0.044- TO-254AA  
Rad-hard low gate charge STripFET™ Power MOSFET  
Features  
Type  
VDSS  
STRH60N20FSY1  
STRH60N20FSY3  
200V  
200V  
Low R  
DS(on)  
3
2
Fast switching  
1
Single event effect (SEE) hardned  
Low total gate charge  
O-254AA  
Light weight  
100% avalanche tested  
Application oriented characterization  
Hermetically sealed  
Figure 1.  
Internal schematic diagram  
Heavy ion SOA  
100kRad TID  
SEL & SEGR with 34Mev/cm²/mg LET ions  
Applications  
Satellite  
High reliabiliy  
Description  
Ts Power MOSFET series realized with  
STMicroelectronics unique STripFET process has  
specifically been designed to sustain hgh TID and  
provide immunity to heavy ion effects. It is  
therefore suitable as power switch in mainly high-  
efficiency DC-DC converters. It is also intended  
for any application with low gate charge drive  
requirements.  
Table 1.  
Device summary  
Order codes  
Marking  
Package  
TO-254AA  
TO-254AA  
Packaging  
STRH60N20FSY1 (1)  
STRH60N20FSY3 (2)  
1. Mil temp range  
RH60N20FSY1  
RH60N20FSY3  
Individual strip pack  
Individual strip pack  
2. Space flights parts (full ESCC flow screening)  
November 2007  
Rev 5  
1/13  
www.st.com  
13  
Contents  
STRH60N20FSY1 - STRH60N20FSY3  
Contents  
1
2
Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
2.1  
2.2  
2.3  
Pre-irradiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Post-irradiation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
Electrical characteristics (curves)  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
3
4
5
Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12  
2/13  
STRH60N20FSY1 - STRH60N20FSY3  
Electrical ratings  
1
Electrical ratings  
Table 2.  
Symbol  
Absolute maximum ratings (pre-irradiation)  
Parameter  
Value  
Unit  
VDS  
VGS  
Drain-source voltage (VGS = 0)  
200  
V
Gate-source voltage  
16  
53  
V
A
(1)  
ID  
Drain current (continuous) at TC= 25°C  
Drain current (continuous) at TC= 100°C  
Drain current (pulsed)  
(1)  
ID  
38  
A
(2)  
IDM  
160  
312  
4
A
(1)  
PTOT  
Total dissipation at TC= 25°C  
Peak diode recovery voltage slope  
Storage temperature  
W
dv/dt (3)  
Tstg  
V/ns  
–5o 150  
150  
°C  
°C  
Tj  
Max. operating junction temperature  
1. Rated according to the Rthj-case  
2. Pulse width limited by safe operating area  
3. ISD 45 A, di/dt 400 A/µs, VDD = 80 %V(BR)DSS  
Table 3.  
Symbol  
Thermal data  
Parameter  
Value  
Unit  
Rthj-case Thermal resistance junction-case max  
Rthc-s Case-to-sink typ  
0.4  
0.21  
48  
°C/W  
°C/W  
°C/W  
Rthj-amb Thermal resistance junction -amb max  
Tale 4.  
Symbol  
Avalanche characteristics  
Parameter  
Value  
Unit  
Avalanche current, repetitive or not-repetitive  
(pulse width limited by Tj Max)  
IAR  
40  
A
Single pulse avalanche energy  
EAS  
360  
20  
mJ  
mJ  
(starting Tj=2 5°C, ID=IAR, VDD= 50 V)  
(1)  
EAR  
Repetitive avalanche  
1. Pulse number = 10; f= 10 KHz; D.C. = 50%  
3/13  
Electrical characteristics  
STRH60N20FSY1 - STRH60N20FSY3  
2
Electrical characteristics  
(T  
= 25°C unless otherwise specified)  
CASE  
2.1  
Pre-irradiation  
Table 5.  
Symbol  
On/off states  
Parameter  
Test conditions  
80% BVDss  
Min.  
Typ. Max. Unit  
Zero gate voltage drain  
current (VGS = 0)  
IDSS  
10  
µA  
nA  
Gate body leakage current  
(VDS = 0)  
IGSS  
VGS = 16 V  
±100  
Drain-to-source breakdown  
voltage  
BVDSS  
ID = 1 mA, VGS = 0  
VDS =VGS, ID = 1 mA  
VGS = 12 V, ID = 20 A  
200  
2
V
V
VGS(th) Gate threshold voltage  
4.5  
Static drain-source on  
resistance  
RDS(on)  
0.044 0.050  
Table 6.  
Symbol  
Dynamic  
Parameter  
Test conditions  
Min.  
Typ. Max. Unit  
Input capacitance  
Ciss  
Coss  
Crss  
9280 11600 13920  
pF  
pF  
pF  
VGS = 0, VDS = 25 V,  
f= 1MHz  
Output capacitance  
732  
915  
22  
1098  
26.4  
Reverse transfer  
capacitance  
17.6  
Qg  
Qgs  
Qgd  
Total te charge  
17.4  
37.6  
50.4  
218  
47  
261.6  
56.4  
75.6  
nC  
nC  
nC  
VDD = 160 V, ID = 20 A,  
VGS=12 V  
G-to-source charge  
Gate-to-drain charge  
63  
f=1MHz Gate DC Bias=0  
Test signal level=20 mV  
open drain  
RG  
Gate input resistance  
0.88  
1.1  
1.32  
Table 7.  
Symbol  
Switching times  
Parameter  
Test conditions  
Min.  
Typ.  
Max  
Unit  
td(on)  
tr  
td(off)  
tf  
Turn-on delay time  
Rise time  
32.8  
56  
41  
70  
49.2  
84  
ns  
ns  
ns  
ns  
VDD = 100 V, ID = 40 A  
Turn-off-delay time  
Fall time  
RG = 4.7 , VGS = 10 V  
87.2  
53.6  
109  
67  
131  
80.4  
4/13  
 
 
STRH60N20FSY1 - STRH60N20FSY3  
Electrical characteristics  
Min. Typ. Max Unit  
Table 8.  
Symbol  
Source drain diode  
Parameter  
Test conditions  
ISD  
Source-drain current  
53  
A
A
(1)  
ISDM  
Source-drain current (pulsed)  
160  
(2)  
VSD  
Forward on voltage  
ISD = 40 A, VGS = 0  
1.5  
V
trr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
413 516 619  
ns  
µC  
A
ISD = 40 A, di/dt = 100 A/µs  
VDD= 60 V, Tj=25°C  
Qrr  
11.6  
45  
IRRM  
trr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
486 608 729  
ns  
µC  
A
ISD = 40 A, di/dt = 100 A/µs  
VDD= 60 V, Tj=150 °C  
Qrr  
15.8  
468  
IRRM  
1. Pulse width limited by safe operating area  
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%  
2.2  
Post-irradiation  
The ST Rad-Hard Power MOSFETs are tested to verify the radiation capability. The  
technology is extremely resistant to assurance well functioning of the device inside the  
radiation environments. Every manufacturing lot is tested for total ionizing dose.  
(a)  
(@Tj=25 °C up to 100 Krad  
)
Table 9.  
Symbol  
On/off states  
Parameter  
Test conditions  
80% BVDss  
Min. Typ. Max Unit  
Zero gate voltage drain current  
(VGS = 0)  
IDSS  
10  
µA  
nA  
Gate dy leakage current  
(VDS = 0)  
IGSS  
VGS = 16 V  
±100  
Drain-to-source breakdown  
voltage  
BVDSS  
ID = 1 mA, VGS = 0  
VDS =VGS, ID = 1mA  
200  
2
V
V
VGS(th) Gate threshold voltage  
4.5  
Static drain-source on  
resistance  
RDS(on)  
VGS = 12 V, ID = 20 A  
0.044 0.050  
a. According to ESCC 22900 specification, Co60 gamma rays, dose rags:0.1rad/sec.  
5/13  
 
Electrical characteristics  
STRH60N20FSY1 - STRH60N20FSY3  
(1)  
Single event effect, SOA  
VDS (V) @VGS0V  
Ion  
Let (Mev/(mg/cm2))  
Energy (MeV)  
Range (µm)  
Kr  
34  
316  
459  
43  
43  
200  
195  
Xe  
55.9  
1. Rad-Hard Power MOSFETs have been characterized in heavy ion environment for single event effect  
(SEE). Single event effect characterization is illustred  
Figure 2.  
Bias condition during radiation  
Table 10. Source drain diode  
Symbol  
Parameter  
Test conditions  
Min Typ Max Unit  
Source-drain current  
ISD  
53  
A
A
Source-drain current  
(pulsed)  
(1)  
ISDM  
160  
(2)  
VSD  
Forwad on voltage  
ISD = 40 A, VGS = 0  
1.5  
V
trr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
413 516 619 ns  
ISD = 40 A, di/dt = 100 A/µs  
VDD= 60 V, Tj=25°C  
Qrr  
11.6  
45  
µC  
A
IRRM  
trr  
Reverse recovery time  
Reverse recovery charge  
Reverse recovery current  
486 608 729 ns  
ISD = 40 A, di/dt = 100 A/µs  
VDD= 60 V, Tj=150°C  
Qrr  
15.8  
468  
µC  
A
IRRM  
1. Pulse width limited by safe operating area  
2. Pulsed: pulse duration = 300µs, duty cycle 1.5%  
6/13  
 
STRH60N20FSY1 - STRH60N20FSY3  
Electrical characteristics  
2.3  
Electrical characteristics (curves)  
Figure 3.  
Safe operating area  
Figure 4.  
Thermal impedance  
Figure 5.  
Output characteristics  
Figure 6.  
Transfer characteristics  
Figure 7.  
Gate charge vs gate-source voltage Figure 8.  
Capacitance variations  
7/13  
Electrical characteristics  
STRH60N20FSY1 - STRH60N20FSY3  
Figure 9.  
Normalized BV  
vs temperature Figure 10. Static drain-source on resistance  
DSS  
Figure 11. Normalized gate threshold voltage Figure 12. Normalized oesistance vs  
vs temperature  
temperaure  
Figure 13. Source drain-diode forward  
characteristics  
8/13  
STRH60N20FSY1 - STRH60N20FSY3  
Test circuit  
3
Test circuit  
(1)  
Figure 14. Switching times test circuit for resistive load  
1. Max driver VGS slope = 1V/ns (no DUT)  
Figure 15. Unclamped inductive load test circuit (single pulse and repetitive)  
9/13  
Package mechanical data  
STRH60N20FSY1 - STRH60N20FSY3  
4
Package mechanical data  
In order to meet environmental requirements, ST offers these devices in ECOPACK®  
packages. These packages have a lead-free second level interconnect. The category of  
second level interconnect is marked on the package and on the inner box label, in  
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering  
conditions are also marked on the inner box label. ECOPACK is an ST trademark.  
ECOPACK specifications are available at: www.st.com  
10/13  
STRH60N20FSY1 - STRH60N20FSY3  
Package mechanical data  
Table 11. TO-254AA mechanical data  
mm.  
TYP  
inch  
DIM.  
MIN.  
MAX.  
MIN.  
TYP.  
MAX.  
A
B
13.59  
13.59  
20.07  
6.32  
13.84  
13.84  
20.32  
6.60  
0.535  
0.535  
0.790  
0.249  
0.040  
0.139  
0.665  
0.545  
0.545  
0.80  
C
D
E
0.260  
0.050  
0.149  
0.685  
1.02  
1.27  
F
3.53  
3.78  
G
H
I
16.89  
17.40  
6.86  
0.270  
0.89  
1.14  
0.035  
0.510  
0.045  
0.570  
J
3.81  
3.81  
0.150  
0.150  
K
L
12.95  
14.50  
M
N
R1  
R2  
3.05  
0.120  
0.065  
.71  
1.0  
0.025  
0.040  
1.65  
Figure 16. Mechanical drawing  
11/13  
Revision history  
STRH60N20FSY1 - STRH60N20FSY3  
5
Revision history  
Table 12. Revision history  
Date  
Revision  
Changes  
23-Jun-2006  
18-Dec-2006  
26-Mar-2007  
22-Oct-2007  
1
2
3
4
First release  
New value on On/off states  
Complete version  
Note 2 on device summary has been updated  
Added figures: 2 and 15.  
15-Nov-2007  
5
Updated values on tables: 6, 7, 8 and 10  
Minor text changes to improve readability  
12/13  
STRH60N20FSY1 - STRH60N20FSY3  
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13/13  

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