STP60NF10 [STMICROELECTRONICS]
N-CHANNEL 100V - 0.019ohm - 80A D2PAK/TO-220 STripFET II POWER MOSFET; N沟道100V - 0.019ohm - 80A D2PAK / TO- 220的STripFET II功率MOSFET型号: | STP60NF10 |
厂家: | ST |
描述: | N-CHANNEL 100V - 0.019ohm - 80A D2PAK/TO-220 STripFET II POWER MOSFET |
文件: | 总10页 (文件大小:232K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
STB60NF10
STP60NF10
N-CHANNEL 100V - 0.019 Ω - 80A D²PAK/TO-220
STripFET™ II POWER MOSFET
Table 1: General Features
Figure 1:Package
V
DSS
R
I
D
TYPE
DS(on)
STB60NF10
STP60NF10
100 V
100 V
< 0.023 Ω
< 0.023 Ω
80 A
80 A
■
■
■
■
TYPICAL RDS(on) = 0.019 Ω
EXTREMELY HIGHL dv/dt CAPABILITY
100% AVALANCHE TESTED
3
SURFACE-MOUNTING D²PAK (TO-263)
POWER PACKAGE IN TAPE & REEL
(SUFFIX “T4")
1
3
2
2
D PAK
TO-263
1
(Suffix “T4”)
TO-220
DESCRIPTION
This MOSFET series realized with STMicroelec-
tronics unique STripFET™ process has specifical-
ly been designed to minimize input capacitance
and gate charge. It is therefore suitable as primary
switch in advanced high-efficiency, high-frequency
isolated DC-DC converters for Telecom and Com-
puter applications. It is also intended for any appli-
cations with low gate drive requirements.
Figure 2: Internal Schematic Diagram
APPLICATIONS
■
HIGH EFFICIENCY DC/DC CONVERTERS,
INDUSTRIAL, AND LIGHTING EQUIPMENT.
MOTOR CONTROL
■
Table 2: Ordering Information
SALES TYPE
STB60NF10T4
MARKING
B60NF10
P60NF10
PACKAGE
TO-263
TO-220
PACKAGING
TAPE & REEL
TUBE
STP60NF10
Table 3:ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
V
DS
Drain-source Voltage (V = 0)
100
GS
V
DGR
Drain-gate Voltage (R = 20 kΩ)
100
V
GS
V
Gate- source Voltage
± 20
V
GS
I (*)
D
Drain Current (continuous) at T = 25°C
80
A
C
I
Drain Current (continuous) at T = 100°C
66
A
D
C
I
(•)
Drain Current (pulsed)
320
A
DM
P
tot
Total Dissipation at T = 25°C
300
W
C
Derating Factor
2
W/°C
V/ns
mJ
°C
(1)
Peak Diode Recovery voltage slope
Single Pulse Avalanche Energy
Storage Temperature
16
485
dv/dt
(2)
E
AS
T
stg
-55 to 175
(•) Pulse width limited by safe operating area.
(**) Current Limited by Package
(1) I ≤80A, di/dt ≤300A/µs, V ≤ V
, T ≤ T
j JMAX
SD
DD
(BR)DSS
o
(2) Starting T = 25 C, I = 40A, V = 30V
j
D
DD
Rev. 2.0
May 2005
1/10
STB60NF10 STP60NF10
Table 4: THERMAL DATA
Rthj-case
Rthj-amb
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Maximum Lead Temperature For Soldering Purpose
Max
Max
0.5
62.5
300
°C/W
°C/W
°C
T
l
ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)
Table 5: OFF
Symbol
Parameter
Drain-source
Test Conditions
Min.
Typ.
Max.
Unit
I
D
= 250 µA, V = 0
100
V
V
GS
(BR)DSS
Breakdown Voltage
V
= Max Rating
DS
Zero Gate Voltage
1
10
µA
µA
I
I
DSS
Drain Current (V = 0)
V
DS
= Max Rating T = 125°C
GS
C
Gate-body Leakage
V
GS
= ± 20 V
±100
nA
GSS
Current (V = 0)
DS
Table 6: ON (*)
Symbol
Parameter
Test Conditions
Min.
Typ.
3
Max.
4
Unit
V
V
R
V
V
= V
I
= 250 µA
= 40 A
Gate Threshold Voltage
2
GS(th)
DS
GS
D
D
= 10 V
I
Static Drain-source On
Resistance
0.019
0.023
Ω
GS
DS(on)
Table 7: DYNAMIC
Symbol
Parameter
Test Conditions
25 V = 40 A
Min.
Typ.
Max.
Unit
(*)
V
DS =
I
D
g
Forward Transconductance
78
S
fs
C
V = 25V f = 1 MHz V = 0
DS GS
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
4270
470
140
pF
pF
pF
iss
C
oss
C
rss
2/10
STB60NF10 STP60NF10
ELECTRICAL CHARACTERISTICS (continued)
Table 8: SWITCHING ON
Symbol
Parameter
Test Conditions
= 50 V
Min.
Typ.
Max.
Unit
V
R
I
D
= 40 A
= 10 V
t
Turn-on Delay Time
Rise Time
17
56
ns
ns
DD
d(on)
= 4.7 Ω
V
GS
t
G
r
(Resistive Load, Figure )
Q
V
DD
= 50V I = 80A V = 10V
D GS
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
104
20
32
nC
nC
nC
g
Q
gs
Q
gd
Table 9: SWITCHING OFF
Symbol
Parameter
Test Conditions
= 50 V
Min.
Min.
Typ.
Max.
Max.
Unit
V
R
I
D
= 40 A
= 10 V
Turn-off Delay Time
Fall Time
82
23
ns
ns
t
DD
d(off)
= 4.7Ω,
V
GS
t
f
G
(Resistive Load, Figure 3)
Table 10: SOURCE DRAIN DIODE
Symbol
Parameter
Test Conditions
Typ.
Unit
I
Source-drain Current
Source-drain Current (pulsed)
80
320
A
A
SD
( )
I
•
SDM
(*)
I
I
= 80 A
V
= 0
GS
V
Forward On Voltage
1.3
V
SD
SD
t
rr
= 80 A
= 50 V
di/dt = 100A/µs
T = 150°C
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
92
340
7.4
ns
µC
A
SD
Q
V
rr
DD
j
I
(see test circuit, Figure 5)
RRM
(*)
(
Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
•)Pulse width limited by safe operating area.
Figure 4: Thermal Impedance
Figure 3: Safe Operating Area
3/10
STB60NF10 STP60NF10
Figure 5: Output Characteristics
Figure 6: Transfer Characteristics
Figure 7: Transconductance
Figure 8: Static Drain-source On Resistance
Figure 9: Gate Charge vs Gate-source Voltage
Figure 10: Capacitance Variations
4/10
STB60NF10 STP60NF10
Figure 11: Normalized Gate Threshold Voltage vs
Figure 12: Normalized on Resistance vs Temperature
Temperature
Figure 13: Source-drain Diode Forward Characteristics
Figure 14: Normalized Breakdown Voltage vs
Temperature.
.
.
.
5/10
STB60NF10 STP60NF10
Figure 16: Unclamped Inductive Waveform
Figure 15: Unclamped Inductive Load Test Circuit
Figure 17: Switching Times Test Circuits For Resis-
tive Load
Figure 18: Gate Charge test Circuit
Figure 19: Test Circuit For Inductive Load Switch-
ing And Diode Recovery Times
6/10
STB60NF10 STP60NF10
2
D PAK MECHANICAL DATA
mm.
inch.
DIM.
MIN.
4.4
TYP.
MAX.
4.6
MIN.
0.173
0.098
0.001
0.028
0.045
0.018
0.048
0.352
TYP.
TYP.
0.181
0.106
0.009
0.037
0.067
0.024
0.054
0.368
A
A1
A2
B
2.49
0.03
0.7
2.69
0.23
0.93
1.7
B2
C
1.14
0.45
1.21
8.95
0.6
C2
D
1.36
9.35
D1
E
8
0.315
0.334
10
10.4
0.394
0.409
E1
G
8.5
4.88
15
5.28
15.85
1.4
0.192
0.591
0.050
0.055
0.094
0.208
0.624
0.055
0.069
0.126
L
L2
L3
M
1.27
1.4
1.75
3.2
2.4
R
0.4
0.015
V2
0°
8°
0°
8°
7/10
STB60NF10 STP60NF10
TO-220 MECHANICAL DATA
mm.
inch.
TYP.
DIM.
MIN.
TYP.
MAX.
4.6
MIN.
0.173
0.048
0.094
0.019
0.024
0.044
0.044
0.194
0.094
0.393
TYP.
0.181
0.051
0.107
0.027
0.034
0.067
0.067
0.203
0.106
0.409
A
C
4.4
1.23
2.40
0.49
0.61
1.14
1.14
4.95
2.40
10
1.32
2.72
0.70
0.88
1.70
1.70
5.15
2.70
10.40
D
E
F
F1
F2
G
G1
H2
L2
L3
L4
L5
L6
L7
L9
DIA
16.40
28.90
0.645
1.137
13
14
0.511
0.104
0.600
0.244
0.137
0.147
0.551
0.116
0.620
0.260
0.154
0.151
2.65
15.25
6.20
3.50
3.75
2.95
15.75
6.60
3.93
3.85
8/10
STB60NF10 STP60NF10
Table 11:Revision History
Date
Revision
Description of Changes
May 2005
May 2005
1.0
2.0
FIRST ISSUE
ADDED PACKAGE D²PAK
9/10
STB60NF10 STP60NF10
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners.
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