STP50NE10 [STMICROELECTRONICS]

N - CHANNEL 100V - 0.021ohm - 50A TO-220 STripFET POWER MOSFET; N - CHANNEL 100V - 0.021ohm - 50A TO- 220的STripFET功率MOSFET
STP50NE10
型号: STP50NE10
厂家: ST    ST
描述:

N - CHANNEL 100V - 0.021ohm - 50A TO-220 STripFET POWER MOSFET
N - CHANNEL 100V - 0.021ohm - 50A TO- 220的STripFET功率MOSFET

晶体 晶体管 功率场效应晶体管 开关 脉冲 局域网
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STP50NE10  
N - CHANNEL 100V - 0.021- 50A TO-220  
STripFET POWER MOSFET  
TYPE  
VDSS  
RDS(on)  
ID  
STP50NE10  
100 V  
<0.027 Ω  
50 A  
TYPICAL RDS(on) = 0.021 Ω  
EXCEPTIONAL dv/dt CAPABILITY  
100% AVALANCHE TESTED  
LOW GATE CHARGE AT 100 oC  
APPLICATIONORIENTED  
CHARACTERIZATION  
3
2
1
DESCRIPTION  
This Power MOSFET is the latest developmentof  
STMicroelectronics unique ”Single Feature  
TO-220  
Size ” strip-based  
process. The resulting  
transistor shows extremely high packing density  
for low on-resistance, rugged avalanche  
characteristics and less critical alignment steps  
therefore  
reproducibility.  
a
remarkable  
manufacturing  
INTERNAL SCHEMATIC DIAGRAM  
APPLICATIONS  
HIGH CURRENT, HIGH SPEED SWITCHING  
SOLENOID AND RELAY DRIVERS  
MOTOR CONTROL, AUDIO AMPLIFIERS  
DC-DC & DC-AC CONVERTERS  
AUTOMOTIVE ENVIRONMENT  
ABSOLUTE MAXIMUM RATINGS  
Symbol  
VDS  
VDGR  
VGS  
ID  
Parameter  
Value  
100  
Unit  
Drain-source Voltage (VGS = 0)  
Drain- gate Voltage (RGS = 20 k)  
Gate-source Voltage  
V
V
100  
± 20  
50  
V
o
Drain Current (continuous) at Tc = 25 C  
Drain Current (continuous) at Tc = 100 oC  
Drain Current (pulsed)  
A
ID  
35  
A
I
DM()  
200  
A
o
Ptot  
Total Dissipation at Tc = 25 C  
150  
W
Derating Factor  
1
W/oC  
V/ns  
oC  
oC  
dv/dt (1) Peak Diode Recovery voltage slope  
6
Tstg  
Storage Temperature  
-65 to 175  
Tj  
Max. Operating Junction Temperature  
175  
() Pulse width limited by safe operating area  
( ) ISD 50 A, di/dt 300 A/µs, VDD V(BR)DSS, Tj TJMAX  
1
1/8  
April 1999  
STP50NE10  
THERMAL DATA  
Rthj-case Thermal Resistance Junction-case  
Max  
Max  
Typ  
1
62.5  
0.5  
oC/W  
oC/W  
oC/W  
oC  
Thermal Resistance Junction-ambient  
Rthj-amb  
Rthc-sink Thermal Resistance Case-sink  
Tl  
Maximum Lead Temperature For Soldering Purpose  
300  
AVALANCHE CHARACTERISTICS  
Symbol  
Parameter  
Max Value  
Unit  
IAR  
Avalanche Current, Repetitive or Not-Repetitive  
(pulse width limited by Tj max)  
50  
A
EAS  
Single Pulse Avalanche Energy  
(starting Tj = 25 C, ID = IAR, VDD = 50 V)  
300  
mJ  
o
(Tcase = 25 oC unless otherwisespecified)  
ELECTRICAL CHARACTERISTICS  
OFF  
Symbol  
V(BR)DSS Drain-source  
Breakdown Voltage  
Zero Gate Voltage  
Drain Current (VGS = 0) VDS = Max Rating  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
ID = 250  
A
VGS = 0  
100  
V
µ
IDSS  
IGSS  
VDS = Max Rating  
1
10  
A
µ
µA  
o
Tc = 125 C  
Gate-body Leakage  
Current (VDS = 0)  
VGS  
=
20 V  
100  
±
nA  
±
ON ( )  
Symbol  
VGS(th)  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
V
Gate Threshold Voltage VDS = VGS ID = 250 µA  
2
3
4
RDS(on)  
Static Drain-source On VGS = 10V ID = 25 A  
Resistance  
0.021 0.027  
ID(on)  
On State Drain Current VDS > ID(on) x RDS(on)max  
VGS = 10 V  
50  
A
DYNAMIC  
Symbol  
Parameter  
Forward  
Test Conditions  
VDS > ID(on) x RDS(on)max ID =25 A  
Min.  
Typ.  
Max.  
Unit  
gfs ( )  
20  
35  
S
Transconductance  
Ciss  
Coss  
Crss  
Input Capacitance  
Output Capacitance  
Reverse Transfer  
Capacitance  
VDS = 25 V f = 1 MHz VGS = 0  
4350  
500  
175  
6000  
675  
238  
pF  
pF  
pF  
2/8  
STP50NE10  
ELECTRICAL CHARACTERISTICS  
(continued)  
SWITCHING ON  
Symbol  
Parameter  
Turn-on Time  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
td(on)  
tr  
VDD = 50 V  
G =4.7  
ID = 25 A  
VGS = 10 V  
25  
100  
34  
135  
ns  
ns  
Rise Time  
R
(see test circuit, figure 3)  
Qg  
Qgs  
Qgd  
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
VDD = 80 V ID = 50 A VGS = 10 V  
123  
24  
47  
166  
nC  
nC  
nC  
SWITCHING OFF  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
tr(Voff)  
tf  
tc  
Off-voltage Rise Time  
Fall Time  
Cross-over Time  
VDD = 80 V ID = 50 A  
RG =4.7 VGS = 10 V  
(see test circuit, figure 5)  
45  
35  
65  
61  
48  
88  
ns  
ns  
ns  
SOURCE DRAIN DIODE  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
ISD  
ISDM ()  
Source-drain Current  
Source-drain Current  
(pulsed)  
50  
200  
A
A
VSD ( ) Forward On Voltage  
ISD = 50 A VGS = 0  
1.5  
V
trr  
Reverse Recovery  
Time  
Reverse Recovery  
Charge  
Reverse Recovery  
Current  
ISD = 50 A  
VDD = 30 V  
(see test circuit, figure 5)  
di/dt = 100 A/ s  
Tj = 150 C  
155  
815  
10.5  
210  
ns  
µ
o
Qrr  
1100  
15  
nC  
A
IRRM  
( ) Pulsed: Pulse duration = 300 s, duty cycle 1.5 %  
µ
() Pulse width limited by safe operating area  
Safe Operating Area  
Thermal Impedance  
3/8  
STP50NE10  
Output Characteristics  
Transfer Characteristics  
Transconductance  
Static Drain-source On Resistance  
Gate Charge vs Gate-sourceVoltage  
CapacitanceVariations  
4/8  
STP50NE10  
Normalized Gate ThresholdVoltage vs  
Temperature  
Normalized On Resistance vs Temperature  
Source-drainDiode Forward Characteristics  
5/8  
STP50NE10  
Fig. 1:  
Fig. 2:  
UnclampedInductive Waveform  
Unclamped Inductive Load Test Circuit  
Fig. 3: Switching Times Test Circuits For  
Fig. 4: Gate Charge test Circuit  
Resistive Load  
Fig. 5:  
Test Circuit For InductiveLoad Switching  
And Diode Recovery Times  
6/8  
STP50NE10  
TO-220 MECHANICAL DATA  
mm  
inch  
TYP.  
DIM.  
MIN.  
4.40  
1.23  
2.40  
TYP.  
MAX.  
4.60  
1.32  
2.72  
MIN.  
0.173  
0.048  
0.094  
MAX.  
0.181  
0.051  
0.107  
A
C
D
D1  
E
1.27  
0.050  
0.49  
0.61  
1.14  
1.14  
4.95  
2.4  
0.70  
0.88  
1.70  
1.70  
5.15  
2.7  
0.019  
0.024  
0.044  
0.044  
0.194  
0.094  
0.393  
0.027  
0.034  
0.067  
0.067  
0.203  
0.106  
0.409  
F
F1  
F2  
G
G1  
H2  
L2  
L4  
L5  
L6  
L7  
L9  
DIA.  
10.0  
10.40  
16.4  
0.645  
13.0  
2.65  
15.25  
6.2  
14.0  
2.95  
15.75  
6.6  
0.511  
0.104  
0.600  
0.244  
0.137  
0.147  
0.551  
0.116  
0.620  
0.260  
0.154  
0.151  
3.5  
3.93  
3.85  
3.75  
L2  
Dia.  
L5  
L9  
L7  
L6  
L4  
P011C  
7/8  
STP50NE10  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parites which may result from its use. No license is  
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specificationmentioned in this publication are  
subject tochange without notice. This publication supersedes and replaces all informaiton previouslysupplied. STMicroelectronics products  
are not authorized for use as critical components in life support devices or systemswithout express written approval of STMicroelectronics.  
The ST logo is a trademark of STMicroelectronics  
1999 STMicroelectronics – Printed in Italy – All Rights Reserved  
STMicroelectronics GROUP OF COMPANIES  
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Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.  
http://www.st.com  
.
8/8  

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