STMAV340TTR [STMICROELECTRONICS]

Low ON Resistance Quad, SPDT, Wide-Bandwidth Video Switch; 低导通电阻四路, SPDT ,宽带宽视频开关
STMAV340TTR
型号: STMAV340TTR
厂家: ST    ST
描述:

Low ON Resistance Quad, SPDT, Wide-Bandwidth Video Switch
低导通电阻四路, SPDT ,宽带宽视频开关

复用器 开关 复用器或开关 信号电路 光电二极管 输出元件
文件: 总21页 (文件大小:1029K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
STMAV340  
Low ON Resistance Quad, SPDT, Wide-Bandwidth Video Switch  
Features  
Bi-directional operation  
4 input/output channels analog video switch  
Wide bandwidth 300MHz  
Low 4Ω switch resistance between two ports  
Excellent R matching between channels  
ON  
Minimal propagation delay through the switch  
Low quiescent current consumption  
TSSOP16  
V
Operating Range: 4.0V to 5.5V  
CC  
Zero bounce in flow-through mode  
Description  
Control inputs compatible with TTL level  
The STMAV340 is a bidirectional quad (4  
channel), high speed single pole/double throw  
(SPDT), low power CMOS TTL-compatible analog  
video switch designed for advanced video  
All input/output pins are on the same side  
facilitates PCB routing  
Data and control inputs provide the  
undershoot clamp diode  
applications which demand  
superior image  
quality. The low ON Resistance (R ) of the  
ON  
Guaranteed break-before-make timing  
High ESD rating: > 2kV HBM  
switch allows inputs to be connected to outputs  
without adding propagation delay or generating  
additional ground bounce noise.  
–40°C to 85°C operating temperature range  
Suitable for both RGB and Composite-Video  
Switching  
STMAV340 is designed for very low cross-talk,  
low bit-to-bit skew, high channel-to-channel noise  
isolation, and low I/O capacitance. The switch  
offers very little or practically no attenuation of the  
high speed signals at the outputs, thus preserving  
the signal integrity enough to pass stringent  
requirements.  
Available in a small TSSOP16 package  
Applications  
Advanced TVs  
The STMAV340 is able to simplify the PCB routing  
on inputs and outputs as well as reduce the  
overall BOM costs by eliminating the need for  
more costly input-output controllers.  
Front projectors  
LCD Monitors  
Notebook PCs  
DVD Players  
Order Codes  
Part Number  
Temperature Range  
Package  
Comments  
STMAV340  
–40°C to +85°C  
TSSOP16  
STMAV340TTR  
Rev. 1  
1/21  
September 2005  
www.st.com  
21  
STMAV340  
Contents  
1
Summary Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.1  
Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
2
3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4  
Application Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
3.1  
Power Supply Sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
4
5
6
7
8
Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7  
Test Circuit and Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
Package Mechanical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20  
2/21  
STMAV340  
1 Summary Description  
1
Summary Description  
1.1  
Functional Description  
The STMAV340 is a high bandwidth, analog video switch. It is low ON-resistance and low I/O  
capacitance result in a very small propagation delay.  
When OE_N is set to LOW, the select (S) pin connects port A to the selected port B or port C  
output. When OE_N is set to HIGH, the switch is OPEN and a high-impedance state exists  
between the A port and B/C ports.  
Low differential gain and phase make this switch ideal for component and RGB video  
applications. This device has high bandwith and low crosstalk, making it ideal for high  
frequency applications as well.  
Figure 1.  
Functional Diagram  
1B  
1A  
1C  
2B  
2C  
3B  
3C  
4B  
4C  
2A  
3A  
4A  
Flow Control  
OE_N  
S
3/21  
 
 
2 Pin Configuration  
STMAV340  
2
Pin Configuration  
Figure 2. Pin Configuration (Top View )  
1B  
1C  
2B  
2C  
3B  
3C  
4B  
4C  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
OE_N  
S
1A  
2A  
3A  
4A  
GND  
Table 1.  
Pin Description  
Symbol  
Type  
Name and Functions  
OE_N  
S
IN  
Bus Switch Enable Note: 1  
Select Input  
IN  
1A ,2A ,3A ,4A  
1B ,2B ,3B ,4B  
1C, 2C, 3C, 4C  
IN/OUT  
IN/OUT  
IN/OUT  
Port A; Analog Video I/Os  
Bus B; Analog Video I/Os  
Bus C; Analog Video I/Os  
Power supply  
V
CC  
GND  
Ground  
Note: 1 Tie to V through a pull-up resistor. The minimum value of the resistor is determined by the  
CC  
current-sinking capability of the driver.  
Table 2.  
Truth Table  
OE_N  
S
ON Switch  
0
0
1
0
1
X
1B,2B,3B,4B  
1C,2C,3C,4C  
Disabled  
4/21  
 
STMAV340  
3 Application Diagrams  
3
Application Diagrams  
Figure 3. STMAV340 2-to-1 Analog Video Switch Used in an LCD TV  
Figure 4. STMAV340 1-to-2 Analog Video Switch Used in a PC  
3.1  
Power Supply Sequencing  
Proper power-supply sequencing is advised for all CMOS devices. Applying V before  
CC  
sending any signals to the input/output or control pins is recommended.  
5/21  
 
 
4 Maximum Ratings  
STMAV340  
4
Maximum Ratings  
Stressing the device above the rating listed in the “Absolute Maximum Ratings” table may  
cause permanent damage to the device. These are stress ratings only and operation of the  
device at these or any other conditions above those indicated in the Operating sections of this  
specification is not implied. Exposure to Absolute Maximum Rating conditions for extended  
periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and  
other relevant quality documents.  
Table 3.  
Absolute Maximum Ratings  
T = 25°C, GND= 0V  
A
Symbol  
Parameter  
Supply Voltage to Ground  
Value  
Unit  
V
-0.5 to + 7.0  
-0.5 to + 7.0  
-0.5 to + 7.0  
-50  
V
V
CC  
V
DC Switch Voltage  
S
IN  
IK  
V
DC Input Voltage  
V
I
DC Input Diode Current  
DC Output Sink Current  
mA  
mA  
mA  
°C  
I
128  
OUT  
I
/I  
DC V /GND Current  
±100  
CC GND  
CC  
T
Storage Temperature Range  
-65 to 150  
STG  
Note:  
Absolute maximum ratings are those values above which damage to the device may occur.  
Functional operation under these conditions is not implied. All voltages are referenced to GND.  
6/21  
 
STMAV340  
5 Electrical Characteristics  
5
Electrical Characteristics  
Table 4.  
Recommended Operating Conditions  
T = -20 to +70°C  
A
Symbol  
Parameter (Note: 1)  
Power Supply Voltage  
Input Voltage  
Test Conditions  
Min.  
4.0  
0
Typ.  
Max.  
5.5  
Unit  
V
V
CC  
V
5.5  
V
IN  
V
Output Voltage  
0
0
5.5  
5
V
OUT  
t t  
Input Rise and Fall Time  
Switch Control Input  
Switch I/O  
ns/V  
ns/V  
°C  
r, f  
0
DC  
+85  
T
Free Air Operating Temperature  
-40  
A
V
ESD-Human Body Model (HMB) Note: 1  
-2  
+2  
kV  
ESD  
Note: 1 Unused control inputs must be held HIGH or LOW. They should not float.  
2 In accordance with IEC61000-4-2, level 4  
Table 5.  
DC Electrical Characteristics  
T = -40°C to +85°C  
A
V
(V)  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
CC  
Analog Signal Range  
Clamp Diode Voltage  
5
0
2.0  
V
V
V
V
I
= -18mA  
4.5  
-1.2  
IK  
IH  
IN  
HIGH Level Input Voltage  
LOW Level Input Voltage  
Input Leakage Current  
4.0-5.5  
4.0-5.5  
5.5  
2.0  
V
V
V
I
0.8  
±10  
±10  
IL  
I
0 V 5.5V  
μA  
μA  
IN  
I
OFF-STATE Leakage  
Current  
0 A, B V , C V  
CC  
5.5  
OFF  
CC  
R
V
V
= 1.0V, I = 13mA  
4.5  
4.5  
5.5  
5.5  
3
7
7
10  
3
Ω
Ω
ON  
IN  
IN  
ON  
Switch ON resistance (1)  
= 2.0V, I = 26mA  
ON  
I
Quiescent Supply Current V = V or GND, I = 0  
OUT  
μA  
mA  
CC  
IN  
CC  
Increase in I per Input One input at 3.4V  
2.5  
ΔI  
CC  
CC  
Other inputs at V or GND  
CC  
Note: 1 Measured by the voltage drop between pin A and B/C pins at the indicated current through the  
switch. ON Resistance is determined by the lower of the voltages on the two (A or B/C) pins.  
7/21  
 
5 Electrical Characteristics  
STMAV340  
Table 6.  
AC Electrical Characteristics  
T = -40°C to +85°C, C = 20pF, RU = RD = 75Ω  
A
L
V
= 4.5 - 5.5V  
V
= 4.0V  
Unit  
CC  
CC  
Symbol  
Parameter  
Output Enable Time, Select to Bus B/C V = 7V for t  
PZL  
Test conditions  
Min. Typ. Max. Min. Max.  
t
t
, t  
5.2  
5.1  
5.7  
5.6  
ns  
ns  
PZH PZL  
I
Output Enable Time, OE_N to Bus A,  
B/C  
V = OPEN for t  
I
PHZ  
, t  
Output Disable Time, Select to Bus B/C V = 7V for t  
PLZ  
5.2  
5.5  
5.5  
5.5  
ns  
ns  
PHZ PLZ  
I
Output Disable Time, Output Enable  
time OE_N to Bus A, B/C  
V = OPEN for t  
I
PHZ  
B
-3dB Bandwidth  
R = 150Ω  
300  
MHz  
dB  
W
L
T = 25°C  
A
X
Crosstalk  
R
= 10Ω  
IN  
-58  
TALK  
R = 150Ω, 10 MHz  
L
D
Differential Gain  
Differential Phase  
Off Isolation  
RL = 150Ω  
f = 3.58 MHz  
RL = 150Ω  
f = 3.58 MHz  
RL = 150Ω  
10 MHz  
0.64  
0.1  
%
Deg.  
dB  
G
D
P
P
-60  
IRR  
Table 7.  
Symbol  
Capacitance  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
C
V
V
= 5.0V  
Control Pin Input Capacitance  
Input/Output Capacitance A Port  
Input/Output Capacitance B/C Port  
Switch On Capacitance  
3
7
pF  
pF  
pF  
pF  
IN  
CC  
C
I/O  
CC  
OE_N = 5.0V  
= 5.0V,  
5
C
V
12  
ON  
CC  
OE_N = 0.0V  
8/21  
STMAV340  
6 Test Circuit and Diagrams  
6
Test Circuit and Diagrams  
Note:  
CL includes probe and jig capacitance.  
All input pulses are supplied by generators having the following characteristics: PRR = 10MHz,  
ZO = 50Ω, tr,tf = 2.5ns.  
Figure 5. AC Test Circuit  
V
I
RU  
FROM OUTPUT  
UNDER TEST  
20 pF  
RD 75  
C
L
9/21  
 
6 Test Circuit and Diagrams  
Figure 6. AC Waveforms  
t f = 2.5ns  
STMAV340  
tr = 2. 5ns  
3. 0V  
90%  
90%  
1.5V  
ENABLE  
INPUT  
1. 5V  
10%  
10%  
GND  
tPLZ  
tPZL  
1. 5 V  
OUTPUT  
VOL + 0. 3V  
VOL  
tPZH  
tPHZ  
VOH  
VOH 0.3V  
1.5 V  
OUTPUT  
10/21  
STMAV340  
6 Test Circuit and Diagrams  
Figure 7. ON Resistance Test Circuit  
11/21  
6 Test Circuit and Diagrams  
STMAV340  
Table 8.  
Test  
Test Circuit  
V
R
C
V
V
CC  
L
L
2B  
2C  
GND  
V
4.75V ± 0.75V  
4.75V ± 0.75V  
75  
75  
20  
20  
CC  
t
t
ON  
V
GND  
CC  
GND  
V
4.75V ± 0.75V  
4.75V ± 0.75V  
75  
75  
20  
20  
CC  
OFF  
V
GND  
CC  
Figure 8. Turn-on/Turn-off Test Circuit and Timing Diagram  
12/21  
STMAV340  
6 Test Circuit and Diagrams  
Differential gain and phase are measured at the output of the ON channel. For example, when  
= 0, V = 0 and 1A is the input, the output is measured at 1B.  
V
SEL  
OE_N  
Figure 9. Differential Gain/Phase Measurement Test Circuit  
13/21  
6 Test Circuit and Diagrams  
STMAV340  
Frequency response is measured at the output of the ON channel. For example, when V  
=
SEL  
0, V  
= 0 and 1A is the input, the output is measured at 1B. All unused analog I/O ports are  
OE_N  
left open.  
Figure 10. Frequency Response (BW) Test Circuit  
14/21  
STMAV340  
6 Test Circuit and Diagrams  
A 50Ω termination resistor is needed for the network analyzer. Crosstalk is measured at the  
output of the non-adjacent ON channel. For example, V = 0, V = 0, and 1A is the input,  
SEL  
OE_N  
the output is measured at 1C. All unused analog input ports are connected to GND through IO-  
ports and the output ports are connected to GND through the 50Ω pull down resistors.  
Figure 11. Crosstalk Test Circuit  
15/21  
6 Test Circuit and Diagrams  
STMAV340  
A 50Ω termination resistor is needed for the network analyzer. Off-isolation is measured at the  
output of the OFF channel. For example, when V = V , V = 0 and 1A is the input, the  
SEL  
CC  
OE_N  
output is measured at 1B. All unsued analog input ports are left open, and the output ports are  
connected to GND through the 50Ω pulldown resistors.  
Figure 12. Off-Isolation Test Circuit  
16/21  
STMAV340  
6 Test Circuit and Diagrams  
Figure 13. I/O Pin (Input Side) ESD Protection Circuit  
Figure 14. I/O Pin (Output Side) ESD Protection Circuit  
Figure 15. S and OE_N Input ESD Protection Circuit  
17/21  
7 Package Mechanical Data  
STMAV340  
7
Package Mechanical Data  
®
In order to meet environmental requirements, ST offers these devices in ECOPACK  
packages. These packages have a Lead-free second level interconnect . The category of  
second Level Interconnect is marked on the package and on the inner box label, in compliance  
with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also  
marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are  
available at: www.st.com.  
18/21  
 
STMAV340  
7 Package Mechanical Data  
Figure 16. TSSOP16 Mechanical Data  
TSSOP16 MECHANICAL DATA  
mm  
inch  
DIM.  
MIN.  
TYP.  
MAX.  
1.1  
MIN.  
TYP.  
MAX.  
0.433  
0.006  
0.374  
0.0118  
0.0079  
0.201  
0.256  
0.176  
A
A1  
A2  
b
0.05  
0.85  
0.19  
0.09  
4.9  
0.10  
0.9  
0.15  
0.95  
0.30  
0.20  
5.1  
0.002  
0.335  
0.0075  
0.0035  
0.193  
0.246  
0.169  
0.004  
0.354  
c
D
5
6.4  
0.197  
0.252  
E
6.25  
4.3  
6.5  
E1  
e
4.4  
4.48  
0.173  
0.65 BSC  
4o  
0.0256 BSC  
4o  
K
0o  
8o  
0o  
8o  
L
0.50  
0.60  
0.70  
0.020  
0.024  
0.028  
A2  
A
K
L
b
e
A1  
c
E
D
E1  
PIN 1 IDENTIFICATION  
1
19/21  
8 Revision History  
STMAV340  
8
Revision History  
Date  
Revision  
Description of Change  
09-Sep-2005  
1
First issue  
20/21  
 
STMAV340  
8 Revision History  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted  
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject  
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not  
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics.  
All other names are the property of their respective owners  
© 2005 STMicroelectronics - All rights reserved  
STMicroelectronics group of companies  
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -  
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America  
www.st.com  
21/21  

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