STMEC001BTTR [STMICROELECTRONICS]

3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20, LEAD FREE, TSSOP-20;
STMEC001BTTR
型号: STMEC001BTTR
厂家: ST    ST
描述:

3-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO20, LEAD FREE, TSSOP-20

电源电路 开关 电源管理电路 光电二极管
文件: 总19页 (文件大小:246K)
中文:  中文翻译
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STMEC001  
Power interface switch for ExpressCardTM  
Features  
Compliant with PC Cardstandard for  
ExpressCard  
3-channel power interface switch  
Built-in under-voltage lockout (UVLO) circuit  
Ultra-low standby-mode current  
QFN16  
Additional 5 V or 12 V power supply not  
required  
High reliability ensured with integrated over-  
current, thermal and undervoltage protection  
circuitries applied to each voltage rail  
TSSOP20  
Soft start function for non-rush current  
Ultra-low standby-mode current for power  
saving  
Description  
Ultra-low ON resistance for fast switching  
The STMEC001 is an ExpressCard power  
interface switch which provides the complete  
power management solution required by the  
ExpressCard specification.  
The STMEC001 consists of 3 internal switches  
distributing 3.3 V, 3.3V  
, and 1.5 V to the  
AUX  
ExpressCard socket without the need of additional  
charge pump or external switches.  
The STMEC001 ExpressCard power switch is  
ideal for notebook computers, desktop computers,  
personal digital assistants (PDA), or other  
handheld devices implementing the ExpressCard  
schematic.  
.
Table 1.  
Device summary  
Order code  
Package  
Packing  
STMEC001QTR  
STMEC001ATTR  
QFN16  
Tape and reel  
Tape and reel  
TSSOP20  
April 2008  
Rev 4  
1/19  
www.st.com  
19  
Contents  
STMEC001  
Contents  
1
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3  
1.1  
Pin functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5  
2
3
4
Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6  
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8  
Power states . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
4.1  
Power states description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9  
5
6
7
8
9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10  
Logic characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13  
Switching times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14  
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16  
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18  
2/19  
STMEC001  
Pin description  
1
Pin description  
Figure 1.  
STMEC001 pin configuration (top view)  
15  
16  
14 13  
/STBY  
1
2
12  
11  
VIN_3.3AUX  
VO_3.3AUX  
VIN_1.5V  
VIN_3.3V  
VO_3.3V  
3
4
10  
9
VO_1.5V  
VO_3.3V  
6
5
7
8
QFN16  
NC  
24  
NC  
1
2
/SYSRST  
23  
22  
/OC  
/SHDN  
/STBY  
3
RCLKEN  
21  
20  
19  
4
5
6
VIN_3.3VAUX  
V0_3.3VAUX  
VIN_3.3V  
VIN_3.3V  
VIN_1.5V  
VIN_1.5V  
VO_3.3V  
VO_3.3V  
7
8
9
18  
17  
VO_1.5V  
16  
15  
VO_1.5V  
/CPPE  
/PERST  
NC  
10  
GND  
NC  
11  
12  
/CPUSB  
NC  
14  
13  
TSSOP20  
3/19  
 
Pin description  
STMEC001  
Table 2.  
Pin assignments  
Name  
Pin  
Type  
Description  
QFN16 TSSOP20  
-
1
2
NC  
-
I
No connection  
System Reset input - active low, logic level signal,  
internal 150 KΩ pull-up  
15  
/SYSRST  
Shutdown input - active low, logic level signal,  
internal 150 KΩ pull-down  
16  
1
3
4
/SHDN  
/STBY  
I
I
Standby input - active low, logic level signal, internal  
150 KΩ pull-down  
2
-
5
6
VIN_3.3V  
VIN_3.3V  
I
I
3.3 V input for VO_3.3V  
3.3 V input for VO_3.3V  
Switched output that delivers 0 V, 3.3 V or high  
impedance to card  
3
4
7
8
VO_3.3V  
VO_3.3V  
O
O
Switched output that delivers 0 V, 3.3 V or high  
impedance to card  
5
-
9
/PERST  
NC  
O
-
A logic level power good to slot (delayed)  
No connection  
10  
11  
12  
13  
6
-
GND  
NC  
-
Ground  
-
No connection  
-
NC  
-
No connection  
Card Present input for USB cards, internal 150 KΩ  
7
8
9
-
14  
15  
16  
17  
/CPUSB  
/CPPE  
I
pull-up  
Card Present input for PCI ExpressCard, internal  
150 KΩ pull-up  
I
Switched output that delivers 0 V, 1.5 V or high  
impedance to card  
VO_1.5V  
VO_1.5V  
O
O
Switched output that delivers 0 V, 1.5 V or high  
impedance to card  
10  
-
18  
19  
VIN_1.5V  
VIN_1.5V  
I
I
1.5 V input for 1.5Vout  
1.5 V input for 1.5VOUT  
Switched output that delivers 0 V, 3.3 V or high  
impedance to card  
11  
12  
20  
21  
VO_3.3VAUX  
VIN_3.3VAUX  
O
I
3.3 V input for VO_3.3VAUX and chip power  
Reference Clock Enable signal. As an output, a  
logic level power good to host for slot (open drain).  
As an input, if kept inactive by the host, prevents  
/PERST from being de-asserted, internal 150 KΩ  
pull-up  
13  
22  
RCLKEN  
I/O  
14  
-
23  
24  
/OC  
NC  
O
-
Over-current status output for slot (open drain)  
No connection  
4/19  
STMEC001  
Pin description  
1.1  
Pin functional description  
Table 3.  
Symbol  
Pin detailed descriptions  
Description  
A logic low level on this input indicates that the card present supports PCI Express  
functions. This input pin connects to the 3.3 VAUX input through a 150 kΩinternal pull up.  
When inserted, the card physically connects this input to ground if the card supports PCI  
Express functions.  
CPPE  
A logic low level on this input indicates that the card present supports USB functions. The  
input pin CPUSB connects to the 3.3 VAUX input through a 150 kΩinternal pull up. When  
inserted, the card physically connects CPUSB to ground if the card supports USB  
functions.  
CPUSB  
When asserted (logic low), this input instructs the STMEC001 to turn off all voltage  
outputs and the discharge FETs at the 3 outputs are activated.  
SHDN  
STBY  
When asserted (logic low), this input places the power switch in Standby Mode by turning  
off the 3.3 V and 1.5 V power switches and keeping the 3.3 VAUX switch on.  
This pin serves as both an input and an output. On power up, the power switch keeps this  
signal at a low state as long as any of the output power rails are out of their tolerance  
range. Once all output power rails are within tolerance, the power switch releases  
RCLKEN RCLKEN allowing it to transition to a high state (internally pulled up to 3.3 VAUX). The  
transition of RCLKEN from a low to a high state starts an internal timer for the purpose of  
de-asserting /PERST. As an input, RCLKEN can be kept low to delay the start of the  
/PERST internal timer. RCLKEN can be used by the host system to enable a clock driver.  
On power up, this output remains asserted. Once all power rails are within tolerance,  
PERST RCLKEN is asserted and /PERST is de-asserted after a time delay. On power down, this  
output is asserted whenever any of the power rails drop below their voltage tolerance.  
This input is driven by the host system and directly affects /PERST. Asserting /SYSRST  
(logic level: low) forces /PERST to assert.  
SYSRST  
The OC pin is an open drain output for over-current indication. Output does not turn off  
during over-current condition. The output voltage decreases as the output current  
exceeds over-current limit. Only if the temperature increases above the limit the output is  
OC  
turned off completely. Over-current in one output does not affect the other outputs.  
5/19  
 
Logic diagram  
STMEC001  
2
Logic diagram  
Figure 2.  
STMEC001 block diagram  
UVLO  
V/I sense and  
discharge switch  
Vin_3.3V  
Vin_1.5V  
SW  
VO_3.3V  
VO_1.5V  
V/I sense and  
discharge switch  
SW  
SW  
V/I sense and  
discharge switch  
Vin_3.3V  
AUX  
VO_3.3V  
AUX  
150 KΩ  
150 KΩ  
150 KΩ  
150 KΩ  
150 KΩ  
150 KΩ  
#PERST  
#CPUSB  
#SHDN  
#STBY  
Control logic  
#SYSRST  
#OC  
#CPPE  
RCLKEN  
Thermal sense  
POR  
6/19  
 
STMEC001  
Logic diagram  
Figure 3.  
STMEC001 typical application  
3.3 V  
3.3 V IN  
3.3 V AUX IN  
Power supply  
3.3 V AUX  
1.5 V  
1.5 V IN  
STMEC001  
ExpressCard  
Power switch  
ExpressCard  
slot  
Control signals  
Control signals  
ExpressCard  
host  
Data links  
7/19  
Maximum ratings  
STMEC001  
3
Maximum ratings  
Stressing the device above the rating listed in the “Absolute maximum ratings” table may  
cause permanent damage to the device. These are stress ratings only and operation of the  
device at these or any other conditions above those indicated in the operating sections of  
this specification is not implied. Exposure to absolute maximum rating conditions for  
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE  
Program and other relevant quality documents.  
(1)  
Table 4.  
Symbol  
Absolute maximum ratings  
Parameter  
Value  
Unit  
VI(3.3VIN) – 0.3 to 4.6  
VI(1.5VIN) – 0.3 to 4.6  
V
V
V
VI  
Input voltage  
VI(3.3VAUX) – 0.3 to 4.6  
VI(3.3VIN) internally limited  
VI(1.5VIN) internally limited  
VI(3.3VAUX) internally limited  
IO  
Output current  
Operating junction temperature, TJ  
(max to be calc. at worst case PD at  
85° C ambient)  
TOP  
–40 to 120  
° C  
° C  
TSTG  
Storage temperature range  
–55 to 150  
1. Absolute maximum ratings are those values above which damage to the device may occur. Functional  
operation under these conditions is not implied. All voltages are referenced to GND.  
8/19  
 
STMEC001  
Power states  
4
Power states  
The STMEC001 operates in a number of states, as described in the following table:  
Table 5.  
Power states  
Voltage inputs  
Logic states  
Outputs  
Mode  
3.3VAUX  
3.3 V  
1.5 V  
/SHDN /CPUSB /CPPE  
/STBY 3.3VAUX 3.3 V  
1.5 V  
ON  
ON  
ON  
ON  
ON  
OFF  
X
X
X
X
1
0
1
1
1
X
1
X
0
1
X
X
0
X
X
1
GND  
GND  
ON  
GND  
GND  
ON  
GND  
GND  
ON  
No card  
Shutdown  
USB enable  
PE enable  
Standby  
ON  
ON  
ON  
X
ON  
ON  
ON  
X
X
X
X
1
ON  
ON  
ON  
X
X
0
ON  
OFF  
OFF  
OFF  
OFF  
X
OFF  
OFF  
4.1  
Power states description  
No card mode: when no card is inserted, and at least 3.3 V  
are grounded  
is available, all outputs  
AUX  
Shutdown mode: when /SHDN is asserted, and at least 3.3 V  
outputs are grounded  
is available all  
AUX  
USB/PW enable mode: when all 3 inputs are available, detection of cartd insertion  
turns on all 3 outputs.  
VIN_3.3 V, VIN_3.3V  
and VIN_1.5 V are present at the USB/PW enable input  
AUX  
of the power switch prior to a card being inserted. Power to the card is based on  
the state of /CPUSB and /CPPE (see table).  
The card is present and VIN_1.5 V or/and VIN_3.3 V is removed from the input of  
the power switch; VIN_3.3V  
will still be provided to the card, VIN_1.5 and  
AUX  
VIN_3.3 V will be disabled (see table). If power to VIN_1.5 V and VIN_3.3 V is  
restored, output to the card will be restored.  
Prior to the insertion of a card, VIN_3.3 V  
is available, VIN_3.3 V and  
AUX  
VIN_1.5 V are not available; no power is made available to the card. If VIN_1.5 V  
and VIN_3.3 V are made available at the input of the power switch after the card is  
inserted, both VO_3.3 V and VO_1.5 V are made available to the card.  
Standy mode: when all 3 supplies are available and /STBY is asserted. Only  
3.3 V  
output is on.  
AUX  
OFF mode: if V  
is off, all outpus are off. When VIN_3.3V  
is not present,  
AUX  
AUX  
VIN_1.5 V or/and VIN_3.3 V must not be present.  
9/19  
 
 
Electrical characteristics  
STMEC001  
5
Electrical characteristics  
Table 6.  
Symbol  
Recommended operating conditions  
Parameter  
Value  
Unit  
Input voltage: VI(3.3VIN) is required for its respective functions  
Input voltage: VI(1.5VIN) is required for its respective functions  
Input voltage: VI(3.3VAUX) is required for all circuit operations  
Output current: IO(3.3V) at TJ = 100 °C  
3.0 to 3.6  
1.35 to 1.65  
3.0 to 3.6  
V
V
VI  
V
1.3 (max.)  
650 (max.)  
275 (max.)  
A
IO  
Output current: IO(1.5V) at TJ = 100 °C  
mA  
mA  
Output current: IO(AuxV) at TJ = 100 °C  
Operating junction temperature, TJ (max to be calc. at worst case PD at  
85° C ambient)  
TOP  
100  
° C  
Table 7.  
Symbol  
Electrical characteristics  
T = 25° C, V (V 3.3 V) = V (V 3.3V  
)= 3.3 V, V (V 1.5 V) = 1.5 V  
I IN  
J
I
IN  
I
IN  
AUX  
Parameter  
Test conditions  
Min  
Typ  
Max  
Unit  
I = 1300 mA, TJ = 25 °C  
I = 1300 mA, TJ = 100 ° C  
I = 650 mA, TJ = 25 °C  
I = 650 mA, TJ = 100 °C  
I = 275 mA, TJ = 25 °C  
I = 275 mA, TJ = 100 °C  
I = 1300 mA, TJ = 25 °C  
I = 1300 mA, TJ = 100 ° C  
I = 650 mA, TJ = 25 °C  
I = 650 mA, TJ = 100 °C  
I = 275 mA, TJ = 25 °C  
I = 275 mA, TJ = 100 °C  
53  
64  
80  
VIN_3.3 V to VO_3.3 V  
VIN_1.5 V to VO_1.5 V  
VIN_3.3VAUX to VO_VAUX  
VIN_3.3 V to VO_3.3 V  
VIN_1.5 V to VO_1.5 V  
VIN_3.3VAUX to VO_VAUX  
(1)  
70  
140  
53  
88  
RSW  
mΩ  
TSSOP20  
105  
170  
210  
64  
80  
(1)  
80  
92  
RSW  
mΩ  
QFN16  
115  
192  
230  
170  
RO(3.3 V)  
discharge resistance  
I discharge = 1 mA  
I discharge = 1 mA  
I discharge = 1 mA  
0.1  
0.1  
0.1  
0.5  
0.5  
0.5  
RO(1.5 V)  
RO  
ΚΩ  
discharge resistance  
RO(1.5 V)  
discharge resistance  
10/19  
 
STMEC001  
Electrical characteristics  
Table 7.  
Symbol  
Electrical characteristics  
T = 25° C, V (V 3.3 V) = V (V 3.3V  
)= 3.3 V, V (V 1.5 V) = 1.5 V (continued)  
I IN  
J
I
IN  
I
IN  
AUX  
Parameter  
Test conditions  
Min  
Typ  
Max  
Unit  
IO(3.3 V) limit  
TJ -40°C to100°C  
Output powered into a short  
1.3  
2.5  
A
(limit is the steady state  
value)  
TJ -40°C to100°C  
Output powered into a short  
IOS  
IO(1.5 V) limit  
IO(VAUX) limit  
650  
275  
1300  
660  
mA  
TJ -40°C to 100° C  
Output powered into a short  
1. Switch resistance (in production - probe testing at 1.3 A. Final test at 1.0 A and apply guard band)  
Table 8.  
Symbol  
Power switching  
Parameter  
Test condition  
Min Typ Max Unit  
Tsh  
Thermal shutdown, trip point, TJ.  
Hysteresis  
Over-current condition  
155  
165 ° C  
10  
5
° C  
VO (3.3VOUT) with100 mΩ short  
VO (1.5VOUT) with100 mΩ short  
VO (VAUX) with100 mΩ short  
20  
Current limit response time.  
IOL  
5
20  
20  
μs  
From short to first threshold within 1.1 times  
of the final current limit  
5
VIN_3.3VAUX VO (VAUX) = VI(3.3VAUX) =  
120  
40  
VI(3.3VIN) VO(1.5V) = VI(1.5VIN)  
Input quiescent current:  
normal operation  
VIN_3.3V  
TJ -40°C,100°C  
VIN_1.5V  
10  
Outputs are ON and unloaded  
VIN_3.3VAUX VO(VAUX) = VI(3.3VAUX) = VI(3.3VI  
150 180  
N) VO(1.5 V) = VI(1.5VIN)  
Input quiescient current:  
IQ  
VIN_3.3V  
25  
10  
40  
25  
μA  
TJ -40°C,100°C]  
Outputs are ON and unloaded  
normal operation with pull-up  
VIN_1.5V  
VIN_3.3VAUX  
150 270  
TJ -40°C,100°C  
discharge FETs are ON  
Input quiescient current:  
VIN_3.3V  
10  
10  
50  
15  
5
15  
15  
100  
20  
10  
10  
50  
15  
50  
15  
50  
/SHDN asserted with pull-up  
VIN_1.5V  
VIN_3.3VAUX  
VIN_3.3V  
Forward leakage current (current measured  
at input pins/no card present)  
SHDN  
μA  
μA  
/SHDN inactive  
VIN_1.5V  
TJ = 25 °C  
TJ = 100 °C  
TJ = 25 °C  
TJ = 100 °C  
TJ = 25 °C  
TJ = 100 °C  
5
VIN_3.3VAUX  
20  
10  
30  
10  
30  
Reverse leakage current  
(current measured from  
output pins / input grounded)  
(1)  
ILEAK  
VIN_1.5V  
VIN_3.3V  
1. All high side switches are in Hi-Z state, VO (AUX) = VO (3.3 V) = 3.3 V, Vo (1.5 V) = 1.5 V, TJ -40 °C,100 °C  
11/19  
Electrical characteristics  
STMEC001  
Table 9.  
Symbol  
Undervoltage lockout (UVLO)  
Parameter  
Test condition  
Min Typ Max Unit  
VIN_3.3 level, below which  
VIN_3.3 and VIN_1.5 switches  
are off  
VIN_3.3 UVLO  
VIN_1.5 UVLO  
2.6  
2.9  
V
V
VIN_1.5 level, below which  
VIN_3.3 and VIN_1.5 switches  
are off  
1
1.25  
2.9  
UVLO  
VIN_3.3VAUX level, below which  
sets the device into OFF state  
VIN_3.3 VAUX UVLO  
UVLO hysteresis  
2.6  
V
100  
mV  
12/19  
STMEC001  
Logic characteristics  
6
Logic characteristics  
Table 10. Logic states  
Logic transition  
Condition  
Min  
Typ  
Max  
Unit  
High level  
Low level  
2.0  
Logic input voltage  
V
0.8  
3.0  
3.3 V output falling  
AUX output falling  
1.5 V output falling  
2.7  
2.7  
1.2  
PERST# assertion threshold of output  
voltage  
3.0  
V
1.35  
PERST# assertion delay from output  
voltage invalid  
Output falling below threshold  
Output rising above threshold  
500  
ns  
PERST# de-assertion from output  
voltage valid  
4
10  
20  
ms  
ns  
μs  
PERST# assertion delay from SYSRST# STSRST asserted or de-asserted  
500  
100  
RCLKEN assertion delay from output  
Output rising above threshold  
voltage valid  
OC# output low voltage  
OC# leakage current  
IOC = 2 mA  
VOC = 3.6 V  
0.4  
1
V
μA  
Falling into or out of an over-current  
condition  
OC# deglitch  
6
20  
μs  
Table 11. ESD protections  
Pin  
Condition  
ESD tolerance  
Unit  
V
OUT (3.3 V, 1.5 V, AUX)  
Versus GND & supply  
Versus GND & supply  
Versus GND  
6
2
2
1
All other pins (except RCLKEN)  
RCLKEN  
kV  
RCLKEN  
Versus supply  
13/19  
 
Switching times  
STMEC001  
7
Switching times  
Table 12. Switching characteristics  
Symbol  
Parameter  
Condition  
CL(3.3V) = 0.1 µF  
Min Typ Max Unit  
VIN_3.3V to VO_3.3V  
0.1  
0.1  
0.1  
3
3
3
Io(3.3V) = 0 A  
CL(AUX) = 0.1 µF  
Io(AUX) = 0A  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
VIN_3.3V to VO_3.3V  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
VIN_3.3V to VO_3.3V  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
CL(1.5V) = 0.1 µF  
Io(1.5V) = 0 A  
tR  
Output rise time  
ms  
CL(3.3V) = 100 µF  
0.1  
0.1  
0.1  
10  
6
6
RL = VO_3.3V / 1.0 A  
CL(3.3V) = 100 µF  
RL = VO_VAUX/ 0.25 A  
C
L(3.3V) = 100 µF  
RL = VO_1.5 V / 0.5 A  
L(3.3V) = 0.1 µF  
6
C
150  
150  
Io(3.3V) = 0 A  
CL(AUX) = 0.1 µF  
Io(AUX) = 0 A  
10  
μs  
Output fall time  
(/CPUSB and  
/CPPE inactive)  
C
L(1.5V) = 0.1 µF  
Io(1.5V) = 0 A  
L(3.3V) = 20 µF, no load  
tF  
10  
150  
VIN_3.3V to VO_3.3V  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
C
2.0  
2.0  
2.0  
30.0  
CL(AUX) = 20 µF, no load  
CL(1.5V) = 20 µF, no load  
30.0 ms  
30.0  
CL(3.3V) = 0.1 µF  
Io(3.3V) = 0 A  
VIN_3.3V to VO_3.3V  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
VIN_3.3V to VO_3.3V  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
10  
10  
80  
CL(AUX) = 0.1 µF  
Io(AUX) = 0 A  
μs  
80  
C
L(1.5V) = 0.1 µF  
Io(1.5V) = 0 A  
L(3.3V) = 100 µF  
10  
80  
Output fall time  
(/SHDN active)  
tSHDN  
C
0.1  
0.1  
0.1  
5.0  
RL = VO_3.3V/1.0 A  
CL(3.3V) = 100 µF  
5.0  
5.0  
ms  
RL = VO_VAUX/0.25 A  
CL(3.3V) = 100 µF  
RL = VO_1.5V/0.5 A  
14/19  
 
STMEC001  
Switching times  
Table 12. Switching characteristics (continued)  
Symbol  
Parameter  
Condition  
L(3.3V) = 0.1 µF  
Min Typ Max Unit  
C
VIN_3.3V to VO_3.3V  
0.02  
0.02  
0.02  
0.05  
0.05  
0.05  
1.0  
1.0  
1.0  
1.0  
1.0  
1.0  
Io(3.3V) = 0 A  
CL(AUX) = 0.1 µF,  
Io(AUX) = 0 A  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
VIN_3.3V to VO_3.3V  
VIN_3.3VAUX to VO_VAUX  
VIN_1.5V to VO_1.5V  
C
L(1.5V) = 0.1 µF  
Io(1.5V) = 0 A  
L(3.3V)=100µF  
Propagation  
delay  
tPD  
ms  
C
RL = VO_3.3V/1.0 A  
CL(3.3V) = 100 µF  
RL = VO_VAUX/0.25 A  
CL(3.3V) = 100µF  
RL = VO_1.5V/0.5 A  
15/19  
Package mechanical data  
STMEC001  
8
Package mechanical data  
®
In order to meet environmental requirements, ST offers these devices in ECOPACK  
packages. These packages have a Lead-free second level interconnect. The category of  
second Level Interconnect is marked on the package and on the inner box label, in  
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering  
conditions are also marked on the inner box label. ECOPACK is an ST trademark.  
ECOPACK specifications are available at: www.st.com.  
Figure 4.  
QFN16 (3 x 3 mm) package outline  
E
E2  
A
K
A1  
e
D2  
D
b
K
r
L
A3  
1. Drawing not to scale.  
Table 13. QFN16 (3 x 3 mm) mechanical data  
millimeters  
Symbol  
inches  
Typ  
Min  
Typ  
Max  
Min  
Max  
A
A1  
A3  
b
0.80  
0.90  
0.02  
0.20  
0.25  
3.00  
1.70  
3.00  
1.70  
0.50  
0.20  
0.40  
0.09  
1.00  
0.05  
0.032  
0.035  
0.001  
0.008  
0.010  
0.118  
0.067  
0.118  
0.067  
0.020  
0.008  
0.016  
0.039  
0.002  
0.18  
1.55  
1.55  
0.30  
1.80  
1.80  
0.007  
0.061  
0.061  
0.012  
0.071  
0.071  
D
D2  
E
E2  
e
K
L
0.30  
0.50  
0.012  
0.006  
0.020  
r
16/19  
 
STMEC001  
Package mechanical data  
Figure 5.  
TSSOP20 package outline  
A2  
A
K
L
b
e
A1  
E
c
D
E1  
PIN 1 IDENTIFICATION  
1
0087225C  
1. Drawing not to scale.  
Table 14. TSSOP20 mechanical data  
millimeters  
Symbol  
inches  
Min  
Typ  
Max  
Min  
Typ  
Max  
A
A1  
A2  
b
1.2  
0.15  
1.05  
0.30  
0.20  
6.6  
0.047  
0.006  
0.041  
0.012  
0.0079  
0.260  
0.260  
0.176  
0.05  
0.8  
0.002  
0.031  
0.007  
0.004  
0.252  
0.244  
0.169  
0.004  
0.039  
1
0.19  
0.09  
6.4  
c
D
6.5  
6.4  
0.256  
0.252  
E
6.2  
6.6  
E1  
e
4.3  
4.4  
4.48  
0.173  
0.65 BSC  
0.0256 BSC  
K
0°  
8°  
0°  
8°  
L
0.45  
0.60  
0.75  
0.018  
0.024  
0.030  
17/19  
Revision history  
STMEC001  
9
Revision history  
Table 15. Document revision history  
Date  
Revision  
Change  
02-Aug-2006  
08-Feb-2007  
1
2
First release  
Replaced TSSOP24 package information with QFN16  
Modified title, added RSW values for QFN16 inTable 7 on page 10 ,  
small text changes, layout restructure, content reworked to improve  
readability in Section 4.1: Power states description on page 9, modified  
Figure 2: STMEC001 block diagram on page 6  
18-Oct-2007  
17-Apr-2008  
3
4
Modified: Figure 2 and Table 2: Pin assignments on page 4 and  
Table 5: Power states on page 9, minor text changes.  
18/19  
 
STMEC001  
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19/19  

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