STB16NK65Z-S [STMICROELECTRONICS]

N-CHANNEL 650V-0.38OHM-13A TO-220 I2SPAK Zener - Protected SuperMESH MOSFET; N沟道650V - 0.38OHM -13A TO- 220 I2SPAK齐纳 - 保护超网MOSFET
STB16NK65Z-S
型号: STB16NK65Z-S
厂家: ST    ST
描述:

N-CHANNEL 650V-0.38OHM-13A TO-220 I2SPAK Zener - Protected SuperMESH MOSFET
N沟道650V - 0.38OHM -13A TO- 220 I2SPAK齐纳 - 保护超网MOSFET

文件: 总12页 (文件大小:290K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
STP16NK65Z  
STB16NK65Z-S  
N-CHANNEL 650V - 0.38- 13A TO-220 / I2SPAK  
Zener - Protected SuperMESH™ MOSFET  
Table 1: General Features  
Figure 1: Package  
TYPE  
V
R
I
D
Pw  
DSS  
DS(on)  
STP16NK65Z  
STB16NK65Z-S 650 V  
650 V  
< 0.50 13 A 190 W  
< 0.50 13 A 190 W  
TYPICAL R (on) = 0.38Ω  
DS  
EXTREMELY HIGH dv/dt CAPABILITY  
100% AVALANCHE TESTED  
GATE CHARGE MINIMIZED  
VERY LOW INTRINSIC CAPACITANCES  
VERY GOOD MANUFACTURING  
REPEATIBILITY  
3
2
1
3
2
1
I²SPAK  
TO-220  
DESCRIPTION  
The SuperMESH™ series is obtained through an  
extreme optimization of ST’s well established  
stripbased PowerMESH™ layout. In addition to  
pushing on-resistance significantly down, special  
care is taken to ensure a very good dv/dt capabil-  
ity for the most demanding applications. Such se-  
ries complements ST full range of high voltage  
MOSFETs including revolutionary MDmesh™  
products.  
Figure 2: Internal Schematic Diagram  
APPLICATIONS  
HIGH CURRENT, HIGH SPEED SWITCHING  
IDEAL FOR OFF-LINE POWER SUPPLIES  
Table 2: Order Codes  
SALES TYPE  
STP16NK65Z  
STB16NK65Z-S  
MARKING  
P16NK65Z  
B16NK65Z  
PACKAGE  
TO-220  
PACKAGING  
TUBE  
I²SPAK  
TUBE  
Rev. 3  
September 2005  
1/12  
STP16NK65Z - STB16NK65Z-S  
Table 3: Absolute Maximum ratings  
Symbol  
Parameter  
Value  
650  
650  
± 30  
13  
Unit  
V
V
DS  
Drain-source Voltage (V = 0)  
GS  
V
DGR  
Drain-gate Voltage (R = 20 k)  
V
GS  
V
GS  
Gate- source Voltage  
V
I
D
Drain Current (continuous) at T = 25°C  
A
C
I
Drain Current (continuous) at T = 100°C  
8.19  
52  
A
D
C
I
(*)  
Drain Current (pulsed)  
A
DM  
P
Total Dissipation at T = 25°C  
190  
1.51  
6000  
4.5  
W
TOT  
C
Derating Factor  
W/°C  
V
V
Gate source EDS (HBM-C=100pF, R=1.5kΩ)  
Peak Diode Recovery voltage slope  
ESD(G-S)  
dv/dt (1)  
V/ns  
T
T
stg  
Operating Junction Temperature  
Storage Temperature  
j
-55 to 150  
°C  
(*) Pulse width limited by safe operating area  
(1) I 13 A, di/dt 200 A/µs, V V  
,T T  
j JMAX  
SD  
DD  
(BR)DSS  
Table 4: Thermal Data  
Rthj-case  
Rthj-amb  
Thermal Resistance Junction-case Max  
0.66  
62.5  
300  
°C/W  
°C/W  
°C  
Thermal Resistance Junction-ambient Max  
Maximum Lead Temperature For Soldering Purpose  
T
l
Table 5: Avalanche Characteristics  
Symbol  
Parameter  
Max. Value  
Unit  
I
Avalanche Current, Repetitive or Not-Repetitive  
13  
A
AR  
(pulse width limited by T max)  
j
E
Single Pulse Avalanche Energy  
350  
mJ  
AS  
(starting T = 25 °C, I = I , V = 50 V)  
j
D
AR  
DD  
Table 6: Gate-Source Zener Diode  
Symbol  
BV  
Parameter  
Test Condition  
Igs=± 1mA (Open Drain)  
Min.  
Typ.  
Max.  
Unit  
Gate-Source Breakdown  
Voltage  
30  
V
GSO  
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES  
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the devices  
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be  
applied fromgate to source. In this respect the Zener voltage ia appropriate to achieve an efficient and  
cost-effective intervention to protect the devices integrity. These integrated Zener diodes thus avoid the  
usage of external components.  
2/12  
STP16NK65Z - STB16NK65Z-S  
ELECTRICAL CHARACTERISTICS (T  
=25°C UNLESS OTHERWISE SPECIFIED)  
CASE  
Table 7: On/Off  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
V
Drain-source  
I
D
= 1 mA, V = 0  
650  
V
(BR)DSS  
GS  
Breakdown Voltage  
Zero Gate Voltage  
I
V
V
= Max Rating  
= Max Rating, T = 125 °C  
1
50  
µA  
µA  
DSS  
DS  
Drain Current (V = 0)  
GS  
DS  
C
I
Gate-body Leakage  
V
GS  
= ± 20 V  
±10  
µA  
GSS  
Current (V = 0)  
DS  
V
Gate Threshold Voltage  
V
V
= V , I = 100 µA  
4.5  
V
3
3.75  
0.38  
GS(th)  
DS  
GS  
D
R
Static Drain-source On  
Resistance  
= 10V, I = 6.5 A  
0.50  
DS(on)  
GS  
D
Table 8: Dynamic  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
g
fs  
(1)  
Forward Transconductance  
V
= 15 V I = 6.5 A  
12  
S
DS  
, D  
C
Input Capacitance  
Output Capacitance  
Reverse Transfer  
Capacitance  
V
DS  
= 25 V, f = 1 MHz, V = 0  
2750  
275  
60  
pF  
pF  
pF  
iss  
GS  
C
oss  
C
rss  
C
(*) Equivalent Output  
Capacitance  
V
= 0V, V = 6.5 V to 520 V  
188  
pF  
oss eq.  
GS  
DD  
DS  
t
t
Turn-on Delay Time  
Rise Time  
Turn-off Delay Time  
Fall Time  
V
= 325 V, I = 6.5 A  
25  
25  
68  
17  
ns  
ns  
ns  
ns  
d(on)  
D
t
r
R = 4.7V = 10 V  
G GS  
(see Figure 17)  
d(off)  
t
f
Q
Total Gate Charge  
Gate-Source Charge  
Gate-Drain Charge  
V
V
= 520 V, I = 13 A,  
= 10 V  
89  
18  
45  
nC  
nC  
nC  
g
DD  
D
Q
gs  
gd  
GS  
Q
(see Figure 20)  
Table 9: Source Drain Diode  
Symbol  
Parameter  
Test Conditions  
Min.  
Typ.  
Max.  
Unit  
I
Source-drain Current  
Source-drain Current (pulsed)  
13  
52  
A
A
SD  
(2)  
I
SDM  
V
(1)  
I
I
= 13 A, V  
= 0  
GS  
Forward On Voltage  
1.6  
V
SD  
SD  
t
rr  
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Current  
= 13 A, di/dt = 100 A/µs,  
= 100 V, T = 25°C  
500  
5.2  
21  
ns  
µC  
A
SD  
Q
V
DD  
(see Figure 18)  
rr  
j
I
RRM  
t
Q
Reverse Recovery Time  
Reverse Recovery Charge  
Reverse Recovery Current  
I
V
= 13 A, di/dt = 100 A/µs,  
= 100 V, T = 150°C  
DD j  
615  
7
22.5  
ns  
µC  
A
rr  
SD  
rr  
I
(see Figure 18)  
RRM  
(1) Pulsed: Pulse duration = 300µs, duty cycle 1.5%  
(2) Pulse width limited by safe operating area  
(*) C  
is defined as a constant equivalent capacitance giving the same charging time as C  
when V increases from 0 to 80% V  
oss DS DSS  
oss eq.  
3/12  
STP16NK65Z - STB16NK65Z-S  
Figure 3: Safe Operating Area  
Figure 6: Thermal Impedance  
Figure 4: Output Characteristics  
Figure 7: Transfer Characteristics  
Figure 5: Transconductance  
Figure 8: Static Drain-source On Resistance  
4/12  
STP16NK65Z - STB16NK65Z-S  
Figure 9: Gate Charge vs Gate-source Voltage  
Figure 12: Capacitance Variations  
Figure 10: Normalized Gate Thereshold Volt-  
age vs Temperature  
Figure 13: Normalized On Resistance vs Tem-  
perature  
Figure 11: Dource-Drain Diode Forward Char-  
acteristics  
Figure 14: Normalized BVdss vs Temperature  
5/12  
STP16NK65Z - STB16NK65Z-S  
Figure 15: Avalanche Energy vs Starting Tj  
j
6/12  
STP16NK65Z - STB16NK65Z-S  
Figure 16: Unclamped Inductive Load Test Cir-  
cuit  
Figure 19: Unclamped Inductive Wafeform  
Figure 17: Switching Times Test Circuit For  
Resistive Load  
Figure 20: Gate Charge Test Circuit  
Figure 18: Test Circuit For Inductive Load  
Switching and Diode Recovery Times  
7/12  
STP16NK65Z - STB16NK65Z-S  
In order to meet environmental requirements, ST offers these devices in ECOPACK® packages. These  
packages have a Lead-free second level interconnect . The category of second level interconnect is  
marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The  
maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an  
ST trademark. ECOPACK specifications are available at: www.st.com  
8/12  
STP16NK65Z - STB16NK65Z-S  
2
I SPAK MECHANICAL DATA  
mm.  
inch  
TYP.  
DIM.  
MIN.  
4.40  
2.49  
0.70  
1.14  
0.45  
1.23  
8.95  
10.00  
4.88  
16.7  
1.27  
13.82  
TYP  
MAX.  
4.60  
2.69  
0.93  
1.70  
0.60  
1.36  
9.35  
10.40  
5.28  
17.5  
1.4  
MIN.  
0.173  
0.098  
0.027  
0.045  
0.018  
0.048  
0.352  
0.394  
0.192  
0.657  
0.05  
MAX.  
0.181  
0.106  
0.037  
0.067  
0.024  
0.053  
0.368  
0.409  
0.208  
0.689  
0.055  
0.568  
A
A1  
B
B2  
C
C2  
D
E
G
L
L2  
L3  
14.42  
0.544  
9/12  
STP16NK65Z - STB16NK65Z-S  
TO-220 MECHANICAL DATA  
mm.  
TYP  
inch  
TYP.  
DIM.  
MIN.  
4.40  
0.61  
1.15  
0.49  
15.25  
10  
MAX.  
4.60  
0.88  
1.70  
0.70  
15.75  
10.40  
2.70  
5.15  
1.32  
6.60  
2.72  
14  
MIN.  
0.173  
0.024  
0.045  
0.019  
0.60  
MAX.  
0.181  
0.034  
0.066  
0.027  
0.620  
0.409  
0.106  
0.202  
0.052  
0.256  
0.107  
0.551  
0.154  
A
b
b1  
c
D
E
0.393  
0.094  
0.194  
0.048  
0.244  
0.094  
0.511  
0.137  
e
2.40  
4.95  
1.23  
6.20  
2.40  
13  
e1  
F
H1  
J1  
L
L1  
L20  
L30  
øP  
Q
3.50  
3.93  
16.40  
28.90  
0.645  
1.137  
3.75  
2.65  
3.85  
2.95  
0.147  
0.104  
0.151  
0.116  
10/12  
STP16NK65Z - STB16NK65Z-S  
Table 10: Revision History  
Date  
Revision  
Description of Changes  
06-Aug-2004  
02-Sep-2004  
06-Sep-2005  
1
2
3
First Release.  
Complete Version  
Inserted Ecopack indication  
11/12  
STP16NK65Z - STB16NK65Z-S  
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences  
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted  
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject  
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not  
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.  
The ST logo is a registered trademark of STMicroelectronics  
All other names are the property of their respective owners  
© 2005 STMicroelectronics - All Rights Reserved  
STMicroelectronics group of companies  
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -  
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America  
12/12  

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