M7010R-083ZA1 [STMICROELECTRONICS]
SPECIALTY TELECOM CIRCUIT, PBGA272, 27 X 27 MM, 1.27 MM PITCH, PLASTIC, BGA-272;
| 型号： | M7010R-083ZA1 |
| 厂家： | 
ST |
| 描述： | SPECIALTY TELECOM CIRCUIT, PBGA272, 27 X 27 MM, 1.27 MM PITCH, PLASTIC, BGA-272 电信 电信集成电路 |
| 文件： | 总6页 (文件大小：59K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
M7010
16K x 68-bit Entry NETWORK SEARCH ENGINE
DATA BRIEFING
FEATURES SUMMARY
■ 16K ENTRIES IN 68-BIT MODE
■ IEEE 1149.1 TEST ACCESS PORT
■ TABLE MAY BE PARTITIONED INTO UP TO
■ OPERATING SUPPLY VOLTAGES INCLUDE:
FOUR (4) QUADRANTS
(Data entry width in each quadrant is config-
urable as 34, 68, 136, or 272 bits.)
V
V
(Operating Supply Voltage) = 1.8V
DD
(Operating Supply Voltage for I/O) = 2.5
DDQ
or 3.3V
■ UP TO 83 MILLION SUSTAINED SEARCHES
PER SECOND IN 68-BIT and 136-BIT
CONFIGURATIONS
■ 272 BALL, 27mm x 27mm, CAVITY-UP BGA
Figure 1. 272-ball PBGA Package
■ UP TO 41.5 MILLION SEARCHES PER
SECOND IN 34-BIT and 272-BIT
CONFIGURATIONS
■ SEARCHES ANY SUB-FIELD IN A SINGLE
CYCLE
■ OFFERS BIT-BY-BIT and GLOBAL MASKING
■ SYNCHRONOUS, PIPELINED OPERATION
■ UP TO 31 SEARCH ENGINES CASCADABLE
WITHOUT PERFORMANCE DEGRADATION
■ WHEN CASCADED, THE DATABASE
ENTRIES CAN SCALE FROM 124K to 992K
DEPENDING ON THE SIZE OF THE ENTRY
272 PBGA
27mm x 27mm
1.27mm ball pitch
■ GLUELESS INTERFACE TO INDUSTRY-
STANDARD SRAMS
■ SIMPLE HARDWARE INSTRUCTION
INTERFACE
September 2001
1/6
Complete data available on Data-on-Disc CD-ROM or at www.st.comComplete data available on Data-on-Disc CD-ROM or at www.st.com
M7010
DESCRIPTION
Overview
The M7010 is a feature-rich hardware search en-
gine optimized for networking and communica-
tions applications. It incorporates leading-edge
Associative Processing Technology (APT, trade-
mark of Cypress Semiconductor, Inc.) and Ad-
vanced Power Management. The data table may
be partitioned into up to four (4) quadrants, allow-
ing the user to configure each quadrant with differ-
ent table entry widths (x34, x68, x136, or x272-bit).
It is also programmable to accelerate perfor-
mance.
when depth-cascaded and is unable to scale to
next-generation requirements. The M7010-based
solutions overcome all of these drawbacks.
Applications
The performance and features of the M7010
makes it ideal in applications such as enterprise
LAN switches, broadband switching and routing
equipment, supporting multiple data rates from
OC–48 and beyond.
Figure 2 illustrates how a search engine sub-
system can be optimized using a host bridge ASIC
(or a dedicated co-processor, such as the Cypress
Semiconductor LNI8010), the M7010, and syn-
chronous or non-synchronous SRAMs. It also il-
lustrates how this system fits into a switch-router
implementation.
Performance
The M7010 outperforms competitive solutions us-
ing software sequential search algorithms in con-
junction with SRAMs or ASICs, or hardware
implementation with ASICs and CAMs. The latter
solution, while faster than a software-based solu-
tion, still suffers from performance degradation
Table 1. Product Range
Part Number
M7010R-083ZA1
M7010R-066ZA1
Operating Supply Voltage
Operating I/O Voltage
2.5 or 3.3V
Speed
83MHz
66MHz
1.8V
1.8V
2.5 or 3.3V
Figure 2. Switch/Router Implementation Using the M7010
SRAM
Bank
System Bus
m
y
a
r
Prog
Search
Engine
Memor
Host
ASIC
Switch
ic
abr
F
Netw
or
Switch
k Line Interf
aces
Processor
AI04272
2/6
M7010
Table 2. Signal Names
Symbol
Type
Connection Name
Cascade Interface
Clocks and Reset
LHI[6:0]
LHO[1:0]
BHI[2:0]
BHO[2:0]
FULI[6:0]
FULO[1:0]
FULL
I
Local Hit In
Local Hit Out
Block Hit In
Block Hit Out
Full In
CLK2X
I
I
I
Master Clock
O
I
PHS_L
RST_L
Phase
Reset
O
I
Command and DQ Bus
CMD[8:0]
CMDV
I
I
Command Bus
Command Valid
Address/Data Bus
O
O
Full Out
Full Flag
DQ[67:0]
I/O
Device Identification
(1)
ID[4:0]
I
Device Identification
T
READ Acknowledge
ACK
Test Access Port
(1)
T
T
T
T
T
T
T
T
End of Transfer
EOT
TDI
I
Test Access Port’s Test Data In
Test Access Port’s Test Clock
SSF
SEARCH Successful Flag
SEARCH Successful Flag Valid
SRAM Address
TCK
I
SSV
Test Access Port’s Test Data
Out
SADR[21:0]
CE_L
TDO
T
SRAM Chip Enable
Test Access Port’s Test Mode
Select
TMS
I
I
WE_L
OE_L
SRAM WRITE Enable
SRAM Output Enable
Address Latch Enable
TRST_L
Test Access Port’s Reset
ALE_L
Note: Signal types are: I = Input only; I/O = Input or Output; O = Output; and T = Tristate
1. ACK and EOT Signals require a pull-down resistor of 47 ohms.
3/6
M7010
Figure 3. Connections
V
V
V
DD
BHO0
FULI5 FULI4 FULI1
BHI0
ID2
NC
EOT NC
LHI6
ID0 TDO
NC
NC
NC
GND
NC
NC
NC
DD
NC
DD
V
V
FULL
ACK
NC
NC
LHI3
FULI6
NC
LHI2
LHI0
NC
BHI2
TDI
NC
FULO1
FULI2
DDQ LHI5
LHO1 LHI4
LHO0
TMS
TCK
BHO1
BHO2
FULI0
ID3
ID1
DD
V
V
V
V
V
DDQ
V
NC
NC
DQ65
DQ64
DQ62
DQ60
DD
NC
DDQ
DDQ
DD
DDQ
T
V
FULI3
NC
GND
BHI1
GND LHI1 ID4
FULO0
NC
RSTL
GND DQ63
DQ61 DQ57
GND
DD
RST_L
TOP
V
DQ67
NC DQ66
DQ59
DQ53
NC
DDQ
NC
V
V
V
DQ58
DD
DQ56
DDQ DQ55
DD
DQ49
DQ51
V
V
V
DQ50
NC
DQ47
GND
DQ52 DQ54
DDQ
DDQ
NC
DDQ
DQ46
GND
DQ44
DQ38
DQ30
DQ26
DQ45 DQ43
DQ48
V
GND GND GND GND
GND GND GND GND
GND GND GND GND
V
DQ41
DQ40 DQ42
DQ37
DD
DQ39
DDQ
V
V
DQ31
NC
DD
DQ35 DQ33
DQ36
DDQ
RIGHT
LEFT
V
V
V
DQ34 DQ32
DDQ
NC
NC
DD
DQ29
DDQ
NC
V
DQ28
GND
GND
GND GND
DQ27
DQ21
DQ17
DDQ
DQ23 DQ25
V
V
GND
DQ24
DQ19
DDQ
GND
DD DQ20
V
V
DQ22
V
NC
DQ16
DQ15
DQ14
DDQ
DDQ
V
V
DQ9
DQ6
DQ11 DQ13
DD DQ18
DD
DDQ
NC
DQ5
NC
NC
DQ1
GND
DQ7
NC
DQ12 DQ8 DQ0
V
BOTTOM
SADR
15
SADR
5
V
V
DDQ
V
V
NC
NC
CLK2X DD
GND
DQ10
GND
CMD2 CMD4 GND WE_L
DDQ
DDQ
DDQ
SADR SADR
SADR
0
SADR
16
SADR SADR
SADR
6
SADR
12
V
V
AE_L
CMD3 CMD0
OE_L
NC
DQ3
NC
DQ2 DQ4
CMD6
DD SSF
DD
21
18
9
7
SADR
4
SADR
19
SADR SADR
SADR
3
V
V
V
DDQ
NC
NC
NC
NC
NC
NC
PHS_L
DDQ
NC
NC
SSV CMD5 CMD1 CMDV DDQ
10
11
SADR
20
SADR
14
SADR
8
SADR SADR
2
SADR
17
SADR
13
V
V
DDQ
V
V
DD
V
NC
CMD7
DD
CMD8
NC CE_L NC
DD
DDQ
1
AI04270
4/6
M7010
Figure 4. M7010 Block Diagram
PHS_L
CLK2X
RST_L
Comparand Registers[15:0]
Global Mask Registers [7:0]
Information and Command Register
Burst Read Register
Burst Write Register
Next Free Address Register
Search Successful Index Registers [7:0]
(All registers are 68-bit-wide)
TAP
Controller
TAP
DQ [67:0]
Cmd Compare/PIO Data
Configurable as
32K x 34
16K x 68
8K x 136
4K x 272
Data Array
SADR [21:0]
OE_L
CMD [8:0]
Command
Pipeline
and
SRAM
Control
CMDV
Decode
and PIO Access
ACK
WE_L
EOT
Configurable as
32K x 34
CE_L
16K x 68
8K x 136
4K x 272
ALE_L
ID [4:0]
Mask Array
FULL [6:0]
Full Logic
LHI [6:0]
BHI [2:0]
FULL
LHO [1:0]
Arbitration
Logic
BHO [2:0]
SSF
SSV
FULO [1:0]
AI04273
5/6
M7010
PART NUMBERING
Table 3. Ordering Information Scheme
Example:
M70
10
R
–083
ZA
1
T
Device Type
M70 Search Engine
Density
10 = 1Mb (16K x 68-bit Table Entries)
Operating Supply Voltage
R = V = 1.8V
DD
Speed
–083 = 83 Million Searches per Second
–066 = 66 Million Searches per Second
Package
(1)
ZA = PBGA, 272-count, 27mm x 27mm
Temperature Range
1 = 0 to 70 °C
Shipping Option
Tape & Reel Packing = T
Note: 1. Where “Z” is the symbol for BGA packages and “A” denotes 1.27mm ball pitch
For a list of available options (e.g., Speed, Package) or for further information on any aspect of this device,
please contact the ST Sales Office nearest to you.
6/6
相关型号：
M7020R-050ZA1
SPECIALTY TELECOM CIRCUIT, PBGA272, 27 X 27 MM, 1.27 MM PITCH, PLASTIC, BGA-272
STMICROELECTR
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