L6932D1.5TR [STMICROELECTRONICS]
HIGH PERFORMANCE 2A ULDO LINEAR REGULATOR; 高性能2A ULDO线性稳压器型号: | L6932D1.5TR |
厂家: | ST |
描述: | HIGH PERFORMANCE 2A ULDO LINEAR REGULATOR |
文件: | 总11页 (文件大小:354K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
L6932
HIGH PERFORMANCE 2A ULDO LINEAR REGULATOR
■ 2V TO 14V INPUT VOLTAGE RANGE
■ 200mΩ Rdson MAX.
■ 200µA QUIESCENT CURRENT AT ANY LOAD
■ EXCELLENT LOAD AND LINE REGULATION
■ 1.5V, 1.8V AND 2.5V FIXED VOLTAGE
■ ADJUSTABLE FROM 1.2V TO 5V (L6932D1.2)
■ 1% VOLTAGE REGULATION ACCURACY
■ SHORT CIRCUIT PROTECTION
■ THERMAL SHUT DOWN
SO-8 (4+4)
ORDERING NUMBERS:
L6932D1.2 (SO-8) L6932D1.2TR (T&R)
L6932D1.5 (SO-8) L6932D1.5TR (T&R)
L6932D1.8 (SO-8) L6932D1.8TR (T&R)
L6932D2.5 (SO-8) L6932D2.5TR (T&R)
■ SO-8 (4+4) PACKAGE
APPLICATIONS
■ MOTHERBOARDS
■ MOBILE PC
Mosfet, can be usefull for the DC-DC conversion
between 2.5V and 1.5V at 2A in portable applica-
tions reducing the power dissipation.
L6932 is available in 1.5V, 1.8V, 2.5V and adj ver-
sion from 1.2V and ensure a voltage regulation ac-
curacy of 1%.
■ HAND-HELD INSTRUMENTS
■ PCMCIA CARDS
■ PROCESSORS I/O
■ CHIPSET AND RAM SUPPLY
The current limit is fixed at 2.5A to control the cur-
rent in short circuit condition within 8%. The cur-
rent is sensed in the power mos in order to limit the
power dissipation.
DESCRIPTION
The device is also provided of a thermal shut down
that limits the internal temperature at 150°C with
an histeresys of 20°C. L6932 provides the Enable
and the Power good functions.
The L6932 Ultra Low Drop Output linear regulator
operates from 2V to 14V and is able to support 2A.
Designed with an internal 50mΩ N-channel
TYPICAL OPERATING CIRCUIT
VOUT
OUT
VIN
IN
3
4
2
1.5V-1.8V-2.5V
2V to 14V
L6932D
PGOOD
C2
C1
1
5,6,7,8
GND
EN
VOUT
OUT
ADJ
VIN
IN
4
3
2
1.2V to 5V
2V to 14V
R1
R2
L6932D
C2
C1
1
5,6,7,8
GND
EN
Rev. 9
1/11
December 2005
L6932
PIN CONNECTIONS
EN
EN
IN
1
2
3
4
GND
GND
GND
GND
1
2
3
4
GND
GND
GND
GND
8
7
6
5
8
7
6
5
IN
ADJ
OUT
OUT
PGOOD
L6932D1.2
L6932D1.5
L6932D1.8
L6932D2.5
PIN FUNCTION
L6232D
1.5/1.8/
2.5
L6232D
1.2
N°
Description
1
2
EN
IN
Enables the device if connected to Vin and disables the device if forced to gnd.
Supply voltage. This pin is connected to the drain of the internal N-mos. Connect this
pin to a capacitor larger than 10µF.
ADJ
–
–
OUT
–
Connecting this pin to a voltage divider it is possible to programme the output voltage
between 1.2V and 5V.
3
Regulated output voltage. This pin is connected to the source of the internal N-mos.
Connect this pin to a capacitor of 10µF.
OUT
–
Regulated output voltage. This pin is connected to the source of the internal N-mos.
Connect this pin to a capacitor of 10µF.
4
PGOOD Power good output. The pin is open drain and detects the output voltage. It is forced
low if the output voltage is lower than 90% of the programmed voltage.
5, 6, 7, 8
GND
Ground pin.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Parameter
Value
14.5
Unit
V
Vin
VIN and Pgood
EN, OUT and ADJ
-0.3 to (Vin +0.3)
V
THERMAL DATA
Symbol
Value
62 (*)
Unit
°C/W
°C
Rth J-amb
Tmax
Thermal Resistance Junction to Ambient
Maximum Junction Temperature
150
Storage Temperature Range
-65 to 150
°C
Tstg
2
(*) Measured on Demoboard with about 4 cm of dissipating area 2 Oz.
2/11
L6932
BLOCK DIAGRAM (Referred to the Fixed Voltage version)
IN
CHARGE
PUMP
CURRENT
LIMIT
VREF
DRIVER
+
REFERENCE
VREF=1.25V
-
ERROR
AMPL.
OUT
THERMAL
SENSOR
EN
ENABLE
PG
-
0.9 VREF
+
GND
D99IN1100
ELECTRICAL CHARACTERISTCS (T = 25°C, V = 5V unless otherwise specified)
j
IN
(*) Specification referred to T from -25°C to 125°C.
j
Symbol
Vin
Parameter
Test Condition
Min.
2
Typ.
Max.
Unit
V
Operating Supply Voltage
Output voltage L6932D1.2
Output voltage L6932D1.5
Output voltage L6932D1.8
Output voltage L6932D2.5
14
Vo
Io = 0.1A; Vin = 3.3V
1.188
1.485
1.782
2.475
1.2
1.5
1.8
2.5
1.212
V
Io = 0.1A; Vin = 3.3V
Io = 0.1A; Vin = 3.3V
Io = 0.1A; Vin = 3.3V
1.515
V
1.818
V
2.525
5
V
L6932D1.2
Line Regulation
V
V
V
in = 2.5V 10%; Io = 10mA
in = 3.3V 10%; Io = 10mA
in = 5V 10%; Io = 10mA
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mΩ
5
5
L6932D1.5
Line Regulation
Vin = 2.5V 10%; Io = 10mA
in = 3.3V 10%; Io = 10mA
Vin = 5V 10%; Io = 10mA
5
V
5
5
L6932D1.8
Line Regulation
V
in = 2.5V 10%; Io = 10mA
in = 3.3V 10%; Io = 10mA
5
V
5
Vin = 5V 10%; Io = 10mA
5
L6932D2.5
Line Regulation
V
V
V
V
in = 3.3V 10%; Io = 10mA
in = 5V 10%; Io = 10mA
in = 3.3V; 0.1A < Io < 2A
in = 3.3V; 0.1A < Io < 2A
5
5
L6932D1.2 Load Regulation
L6932D1.5 Load Regulation
L6932D1.8 Load Regulation
L6932D2.5 Load Regulation
Drain Source ON resistance
15
15
15
15
200
Vin = 3.3V; 0.1A < Io < 2A
in = 3.3V; 0.1A < Io < 2A
V
Rdson
3/11
L6932
ELECTRICAL CHARACTERISTCS (continued)
Symbol
Iocc
Parameter
Current limiting
Test Condition
Min.
Typ.
2.5
Max.
2.7
Unit
A
2.3
Iq
Quiescent current
Shutdown current
Ripple Rejection
0.2
0.4
mA
µA
dB
Ish
2V < Vin < 14V
25
*
f = 120Hz, Io = 1A
60
75
Vin = 5V, ∆Vin = 2Vpp
Ven
EN Input Threshold
Pgood threshold
Pgood Hysteresis
Pgood saturation
0.5
0.65
90
0.8
0.4
V
Vo rise
%Vo
%Vo
V
10
Ipgood =1mA
0.2
Figure 1. Output Voltage vs. Junction
Temperature (L6932D1.2)
Figure 3. Output Voltage vs. Junction
Temperature (L6932D2.5)
1.213
1.212
1.212
2.520
2.515
2.510
1.211
V
V
1.211
1.210
1.210
1.209
2.505
2.500
2.495
-60 -40 -20
0
20 40 60 80 100 120 140 160
-60 -40 -20
0
20 40 60 80 100 120 140 160
Temp [°C]
Temp [°C]
Figure 4. Quiescent Current vs. Junction
Temperature
Figure 2. Output Voltage vs. Junction
Temperature (L6932D1.8)
310
1.808
1.804
1.800
1.796
1.792
1.788
300
Vin=5V
290
Iq
280
(uA)
270
260
250
-60 -40 -20
0
20 40 60 80 100 120 140 160
-40
-20
0
20
40
60
80
100
120
140
Temp [°C]
Temp [°C ]
4/11
L6932
Figure 5. Shutdown Current vs. Junction TemperatureAPPLICATION INFORMATIONS
7.5
7
6.5
Vin=5V
Ishdn
(uA)
6
5.5
5
4.5
4
-40
-20
0
20
40
60
80
100
120
140
Temp [°C ]
APPLICATION CIRCUIT
In figure 6 the schematic circuit of the demoboards are shown.
Figure 6. Demoboards Schematic Circuit
VOUT
OUT
VIN
IN
3
4
2
1
L6932D1.5
L6932D1.8
L6932D2.5
EN
PGOOD
C2
C1
5
6
7
8
GND
VOUT
1.2V to 5V
VIN
IN
OUT
ADJ
4
3
2
1
EN
R1
R2
L6932D1.2
C2
C1
1.2
R2
5
6
7
8
VOUT =
×(R1+R2)
GND
COMPONENT LIST
Fixed version
Reference
Part Number
Description
Manufacturer
C1
C2
C34Y5U1E106Z
C34Y5U1E106Z
10uF, 25V
10uF, 25V
TOKIN
TOKIN
5/11
L6932
Figure 7. Demoboard Layout (Fixed Version)
Adjustable version
Reference
Part Number
C34Y5U1E106Z
C34Y5U1E106Z
Description
10uF, 25V
Manufacturer
TOKIN
C1
C2
R1
R2
10uF, 25V
TOKIN
Neohm
Neohm
5.6K, 1%, 0.25W
3.3K, 1%, 0.25W
Figure 8. Demoboard Layout (Adjustable Version)
COMPONENTS SELECTION
Input Capacitor
The input capacitor value depends on a lot of factors such as load transient requirements, input source (battery
or DC/DC converter) and its distance from the input cap. Usually a 47
much lower value can be sufficient in many cases.
µF is enough for any application but a
Output Capacitor
The output capacitor choice depends basically on the load transient requirements.
Tantalum, Speciality Polimer, POSCAP and aluminum capacitors are good and offer very low ESR values.
6/11
L6932
Multilayer ceramic caps have the lowest ESR and can be required for particular applications. Nevertheless in
several applications they are ok, the loop stability issue has to be considered (see loop stability section).
Below a list of some suggested capacitor manufacturers.
Manufacturer
PANASONIC
Type
CERAMIC
Cap Value (µF)
1 to 47
Rated Voltage (V)
4 to 16
4 to 16
4 to 16
4 to 16
4 to 16
4 to 16
4 to 16
TAYO YUDEN
TDK
CERAMIC
CERAMIC
CERAMIC
POSCAP
SP
1 to 47
1 to 47
1 to 47
1 to 47
1 to 47
1 to 47
TOKIN
SANYO
PANASONIC
KEMET
TANTALUM
Loop Stability
The stability of the loop is affected by the zero introduced by the output capacitor.
The time constant of the zero is given by:
1
T = ESR ⋅ C
F
= --------------------------------------------
OUT
ZERO
2π ⋅ ESR ⋅ C
OUT
This zero helps to increase the phase margin of the loop until the time constant is higher than some hundreds
of nsec, depending also on the output voltage and current.
So, using very low ESR ceramic capacitors could produce oscillations at the output, in particular when regulating
high output voltages (adjustable version).
To solve this issue is sufficient to add a small capacitor (e.g. 1nF to 10nF) in parallel to the high side resistor of
the external divider, as shown in figure 9.
Figure 9. Compensation Network
VIN=2V TO 14V
VOUT=1.2V TO 5V UP to 2A
OUT
IN
2
1
4
3
C3
R1
ADJ
L6932D1.2
EN
C2
C1
6
7
5
8
R2
GND
Thermal Considerations
Since the device is housed in a small SO(4+2+2) package the thermal issue can be the bottleneck of many ap-
plications. The power dissipated by the device is given by:
P
DISS
= (V - V
) · I
OUT OUT
IN
7/11
L6932
The thermal resistance junction to ambient of the demoboard is approximately 62°C/W. This mean that, consid-
ering an ambient temperature of 60°C and a maximum junction temperature of 150°C, the maximum power that
the device can handle is 1.5W.
This means that the device is able to deliver a DC output current of 2A only with a very low dropout.
In many applications, high output current pulses are required. If their duration is shorter than the thermal con-
stant time of the board, the thermal impedance (not the thermal resistance) has to be considered.
In figure 10 the thermal impedance versus the duration of the current pulse for the SO(4+2+2) mounted on board
is shown.
Figure 10. Thermal Impedance
Considering a pulse duration of 1sec, the thermal impedance is close to 20°C/W, allowing much bigger power
dissipated.
Example:
Vin = 3.3V
Vout = 1.8V
Iout = 2A
Pulse Duration = 1sec
The power dissipated by the device is:
P
DISS
= (V - V
) · I
= 1.5 · 2 3W
OUT
IN
OUT
Considering a thermal impedance of 20°C/W, the maximum junction temperature will be:
T = T + Z · P = 60 + 60 = 120°C
J
A
THJA
DISS
Obviously, with pulse durations longer than approximately 10sec the thermal impedance is very close to the
thermal resistance (60°C/W to 70°C/W).
8/11
L6932
Figure 11. SO-8 Mechanical Data & Package Dimensions
mm
inch
DIM.
OUTLINE AND
MECHANICAL DATA
MIN. TYP. MAX. MIN.
TYP. MAX.
0.069
A
A1
A2
B
1.35
0.10
1.10
0.33
0.19
4.80
1.75 0.053
0.25 0.004
1.65 0.043
0.51 0.013
0.25 0.007
5.00 0.189
0.010
0.065
0.020
C
0.010
(1)
D
0.197
E
e
3.80
4.00
0.15
0.157
0.050
1.27
H
5.80
0.25
0.40
6.20 0.228
0.50 0.010
1.27 0.016
0˚ (min.), 8˚ (max.)
0.10
0.244
h
0.020
L
0.050
k
ddd
0.004
Note: (1) Dimensions D does not include mold flash, protru-
sions or gate burrs.
SO-8
Mold flash, potrusions or gate burrs shall not exceed
0.15mm (.006inch) in total (both side).
0016023 C
9/11
L6932
Table 1. Revision History
Date
Revision
Description of Changes
February 2003
December 2005
8
9
First Issue
Added new Ordering Numbers: L6932D1.5 & L6932D1.5TR.
10/11
L6932
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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11/11
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