L4993DTR [STMICROELECTRONICS]
Low drop voltage regulator; 低压降稳压器
| 型号： | L4993DTR |
| 厂家： | 
ST |
| 描述： | Low drop voltage regulator |
| 文件： | 总30页 (文件大小：527K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
L4993
Low drop voltage regulator
Features
Max DC supply voltage
Max output voltage tolerance
Max dropout voltage
VS
∆V0
Vdp
I0
40V
+/-2%
400 mV
150 mA
79 µA(1)
Output current
Quiescent current
Iqn
SO-8
SO-20
1. Typical value with watchdog disabled.
■ Operating DC supply voltage range 5.6V to
Description
31V
■ Reset circuit sensing the output voltage down
The L4993 is a monolithic integrated 5V Voltage
regulator with a low drop voltage at currents up to
150mA.The output voltage regulating element
consists in a p-channel MOS and the regulation is
performed regardless of input voltage transients
up to 40V. The high precision of the output voltage
is obtained with a pre-trimmed reference voltage.
The L4993 is protected against short circuit and
an over-temperature protection switches off the
device in case of extremely high power dissipa-
tion. The L4993 watchdog is active when the
Enable is high. State of the art features like reset
and watchdog make this device particularly
suitable to supply microprocessor systems in
automotive applications.
to 1V
■ Programmable reset pulse delay with external
capacitor
■ Watchdog
■ Programmable watchdog timer with external
capacitor
■ Enable input for enabling/disabling the
watchdog functionality
■ Thermal shutdown and short circuit protection
■ Wide temperature range (T = -40°C to 150°C)
j
Table 1.
Device summary
Package
Order codes
Tape & reel
Tube
SO-8
L4993D
L4993DTR
SO-20 (16+2+2)
L4993MD
L4993MDTR
April 2008
Rev 6
1/30
www.st.com
30
Contents
L4993
Contents
1
2
Block diagram and pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
2.2
2.3
2.4
2.5
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Test circuit and waveforms plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.5.1
Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.1
3.2
3.3
Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4
5
Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.1
4.2
SO-8 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
SO-20 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
5.1
5.2
5.3
5.4
5.5
ECOPACK® packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
SO-20 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
SO-8 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
SO-20 packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
6
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2/30
L4993
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Pins description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Watchdog Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SO-8 thermal parameter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
SO-20 thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
SO-8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
SO-20 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
3/30
List of figures
L4993
List of figures
Figure 1.
Figure 2.
Figure 3.
Figure 4.
Figure 5.
Figure 6.
Figure 7.
Figure 8.
Figure 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Pins configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Output voltage vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Output voltage vs. Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Drop Voltage vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current consumption vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current consumption vs. Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current limitation vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Current limitation vs. Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Short Circuit Current vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Short Circuit Current vs. Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12.
Figure 13.
V
V
vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
WEn_high
WEN_LOW
Figure 14. Vrhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 15. Vrlth vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Vwhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Vwlth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Icr & Icwc vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Idr & Icwd vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 20. Twop vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 21. PSRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. Load regulation test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 23. Maximum load variation response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 24. L4993 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 25. Behavior of output current versus regulated voltage Vo. . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 26. Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 27. Watchdog timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 28. SO-8 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 29. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 18
Figure 30. SO-8 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 31. Thermal fitting model of Vreg in SO-8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 32. SO-20 PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 33. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 21
Figure 34. SO-20 thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 35. Thermal fitting model of Vreg in SO-20 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 36. SO-8 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Figure 37. SO-20 package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 38. SO-8 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 39. SO-8 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 40. SO-20 tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 41. SO-20 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4/30
L4993
Block diagram and pins description
1
Block diagram and pins description
Figure 1.
Block diagram
5V, 150 mA
I
IS
O
Thermal
protection
V
S
+
I
CW
-
V
O
I
wi
Watchdog
V
Wi
VCW
Voltage reference
I
WEn
I
Res
V
WEn
I
Reset
cr
V
Res
V
cr
Gnd
5/30
Block diagram and pins description
L4993
Table 2.
Pins description
Pin
SO-8 (D)
SO-20 (MD)
Function
Watchdog Enable input
name
WEn
Gnd
Gnd
1
2
1
If high watchdog functionality is active
4
Ground reference
Ground
5, 6, 15, 16
Connected these pins to a heat spreader ground
Reset output.
It is pulled down when output voltage goes below Vo_th
or frequency at Wi is too low.
Res
3
7
Leave floating if not used.
Reset timing adjust.
Vcr
4
5
10
11
A capacitor between Vcr pin and gnd, sets the reset
delay time (trd)
Watchdog timer adjust
Vcw
A capacitor between Vcw pin and gnd, sets the time
response of the watchdog monitor.
Watchdog input.
If the frequency at this input pin is too low, the Reset
output is activated.
Wi
6
14
Connect to ground if not used
Voltage regulator output
Vos
7
8
17
20
Block to ground with a capacitor >100nF (needed for
regulator stability)
Supply voltage
Vs
N.C.
Block to ground directly at IC pin with a capacitor
2, 3, 8, 9, 12,
13, 18, 19
Not connected
Figure 2.
Pins configuration
WEn
1
20
19
18
17
16
15
Vs
2
N.C.
N.C.
GND
GND
GND
Res
N.C.
N.C.
Vos
3
8
WEn
Vs
1
4
7
6
5
Vos
Wi
2
3
4
GND
Res
Vcr
5
SO-8
GND
GND
Wi
SO-20
6
Vcw
7
14
13
8
N.C.
N.C.
Vcr
N.C.
N.C.
Vcw
9
12
11
10
6/30
L4993
Electrical specifications
2
Electrical specifications
2.1
Absolute maximum ratings
Stressing the device above the rating listed in the “Absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the Operating sections of
this specification is not implied. Exposure to Absolute Maximum Rating conditions for
extended periods may affect device reliability. Refer also to the STMicroelectronics SURE
Program and other relevant quality documents.
Table 3.
Symbol
Absolute maximum ratings
Parameter
Value
Unit
VVsdc
IVsdc
VVo
IVo
DC supply voltage
-0.3 to 40
Internally limited
-0.3 to 6
V
Input current
DC output voltage
V
DC output current
Internally limited
-0.3 to VVo + 0.3
-0.3 to VVo + 0.3
Internally limited
-0.3 to VVo + 0.3
-0.3 to VVo + 0.3
-0.3 to VVo +0.3
-40 to 150
VWi
Vod
Watchdog input voltage
Open drain output voltage
Open drain output current
Reset delay voltage
V
V
Iod
Vcr
V
V
Vcw
VWEn
Tj
Watchdog delay voltage
Watchdog Enable input voltage
Junction temperature
V
°C
kV
V
VESD
VESD
ESD voltage level (HBM-MIL STD 883C)
ESD voltage level (CDM AEC-Q100-011)
2
750
Note:
Maximum ratings are absolute ratings; exceeding any one of these values may cause
permanent damage to the integrated circuit.
2.2
Thermal data
For details, please refer to Section 4.1: SO-8 thermal data and Section 4.2: SO-20 thermal
data.
(1)
Table 4.
Symbol
Thermal data
Parameter
Value
Unit
Thermal resistance Junction to Ambient:
Rth-jamb
SO-8
130
51
°C/W
°C/W
SO-20
1. The values quoted are for PCB FR4 area= 58mm x 58mm, PCB thickness = 2mm, Cu thickness = 35µm ,
Copper areas: SO-8= 2 cm2, SO-20= 6 cm2.
7/30
Electrical specifications
L4993
2.3
Electrical characteristics
Values specified in this section are for V =5.6V to 31V, T = -40°C to +150°C unless
s
j
otherwise stated.
Table 5.
Pin
General
Symbol
Parameter
Output voltage
Short circuit current
Test condition
Min. Typ. Max. Unit
Vs = 6 to 31V
Vo
Vo_ref
Ishort
4.9
5.0
5.1
V
Io = 1 to 150mA
Vo
Vo
Vs = 13.5V(1)
150
150
280
320
400 mA
500 mA
(1)
(2)
Ilim
Output current limitation
Line regulation voltage
Vs = 13.5V
Vs = 6 to 31V
Vs, Vo
Vline
25
25
mV
mV
Io = 1 to 150mA
Vo
Vload
Load regulation voltage
Drop voltage
Io = 1 to 150mA
(3)
Vs, Vo
Vs, Vo
Vdp
Io = 150mA
200
400 mV
dB
SVR
Ripple rejection
fr = 100 Hz (4)
55
Vs=13.5V,
Io=150mA,
Vs, Vo
Vs, Vo
Vs, Vo
Vs, Vo
Iqn_150
Quiescent current
Quiescent current
Quiescent current
1.25
2
mA
WEn = high
Vs=13.5V,
Io= 50mA,
WEn = high
Iqn_50
Iqn_1
Iqs
470 1000 µA
Vs=13.5V,
Io< 1mA,
100
79
180
µA
µA
WEn = high
Vs=13.5V,
Io< 1mA,
Quiescent current with
watchdog regulator
disabled
125
190
WEn = low
Thermal protection
temperature
Tw
150
°C
°C
Thermal protection
temperature hysteresis
Tw_hy
10
1. See Figure 25.
2. Measured output current when the output voltage has dropped 100mV from its nominal value obtained at
Vs=13.5V and Io= 75mA.
3. Vs-Vo measured when the output voltage has dropped 100mV from its nominal value obtained at
Vs=13.5V and Io= 75mA.
4. Guaranteed by design.
8/30
L4993
Electrical specifications
Table 6.
Pin
Reset
Symbol
Parameter
Test condition
Min. Typ. Max.
Unit
V
R
ext = 5kΩ to Vo,
Vo > 1V
Res
Res
Res
Res
Vcr
Vres_l
IRes_h
R_p_u
Vo_th
Vrlth
Vrhth
Icr
Reset output low voltage
0.4
1
Reset output high leakage
current
VRes = 5V
µA
kΩ
Pull up internal resistance With respect to Vo 12
25
50
Vo out of regulation
threshold
Vs = 6 to 31V,
Below
Vo_ref
6%
8% 10%
Io = 1 to 150mA
Reset delay circuit low
threshold
Vs = 13.5V
Vs =13.5V
Vs = 13.5V
Vs = 13.5V
10% 13% 16%
V
o_ref
Reset delay circuit high
threshold
Vcr
44% 47% 50% Vo_ref
Vcr
Charge current
8
8
17.6
17.6
30
30
µA
µA
µs
Vcr
Idr
Discharge current
Reset reaction time(1)
Reset delay time
Res
Res
Trr_2
Trd
Vo = Vo_th -100mV 100 275 1000
Vs = 13.5V,
65
150
ms
Ctr = 1nF
1. When Vo becomes lower than 4V, the reset reaction time decreases down to 2µs assuring a faster reset
condition in this particular case.
Table 7.
Pin
Watchdog
Symbol
Parameter
Input high voltage
Input low voltage
Test condition
Vs = 13.5V
Vs = 13.5V
Vs = 13.5V
Vs = 13.5V
Vs = 13.5V
Vs = 13.5V
Min. Typ. Max.
Unit
V
Wi
Wi
Vih
Vil
3.5
1.5
500
V
Wi
Vih_hyst Input hysteresis
mV
µA
Wi
Ii
Pull down current
High threshold
Low threshold
Charge current
10
20
Vcw
Vcw
Vcw
Vwhth
Vwlth
Icwc
44% 47% 50% Vo_ref
10% 13% 16%
V
o_ref
Vs = 13.5V,
Vcw = 0.1V
4
8
14
µA
9/30
Electrical specifications
Table 7.
L4993
Watchdog (continued)
Parameter
Pin
Vcw
Vcw
Res
Symbol
Test condition
Min. Typ. Max.
Unit
µA
Vs = 13.5V,
Vcw = 2.5V
Icwd
Twop
twol
Discharge current
1.0 2.13 4.5
Vs = 13.5V,
Ctw = 47nF
Watchdog period
25
6
50
90
22
ms
ms
Vs = 13.5V,
Ctw = 47nF
Watchdog output low time
10.5
Table 8.
Pin
Watchdog Enable
Symbol Parameter
Test condition
Min. Typ. Max.
Unit
V
WEn
WEn
WEn
WEn
WEn_low Enable input low voltage
WEn_high Enable input high voltage
WEn_hyst Enable input hysteresis
1
3
V
500 800 1100
mV
µA
Ileak
Pull down current
WEn = 5V
2
8
20
10/30
L4993
Electrical specifications
2.4
Electrical characteristics curves
Figure 3.
Output voltage vs. Tj
Figure 4. Output voltage vs. Vs
Vo_ref (V)
Vo_ref (V)
10
5,5
5,4
5,3
5,2
5,1
5
Vs= 13.5V
I0 = 75mA
9
8
7
6
5
4
3
2
1
I0 = 75 mA
Tj = 25 °C
4,9
4,8
4,7
4,6
4,5
0
0
-50
-25
0
25
50
75
100
125
150
5
10
15
20
25
30
35
Tj(°C )
Vs (V )
Figure 5.
Drop Voltage vs. Output Current
Figure 6.
Current consumption vs. Output
Current
Vdp (V)
Iqn (µA)
1500
0,3
0,25
0,2
Vs= 13.5 V
Tj= 25 °C
En= High
1200
900
600
300
Tj= 125 °C
0,15
0,1
Tj= 25 °C
0,05
0
0
-50
0
50
100
150
200
-50
0
50
100
150
200
Io (mA)
Io (mA)
Figure 7.
Current consumption vs. Input
Voltage
Figure 8.
Current limitation vs. Tj
Iqn(µA )
Ilim (mA)
600
1200
1100
1000
900
800
700
600
500
400
300
200
100
0
Tj = 25 °C
En = High
500
400
300
200
100
Io= 100mA
Io =50mA
Vs= 13.5V
Io = 1mA
0
0
5
10
15
20
25
30
35
-50
-25
0
25
50
75
100
125
150
Vs (V )
Tj(°C )
11/30
Electrical specifications
L4993
Figure 9. Current limitation vs. Input Voltage Figure 10. Short Circuit Current vs. Tj
Ilim (mA)
350
Ishort (mA)
600
325
300
275
250
225
500
400
300
200
100
Tj = 25 °C
Tj = 125 °C
Vs= 13.5V
200
0
0
5
10
15
20
25
30
35
-50
-25
0
25
50
75
100
125
150
Vs (V )
Tj(°C )
Figure 11. Short Circuit Current vs. Input
Voltage
Figure 12. V
vs. Tj
WEn_high
Vwen_high (V)
4
Ishort (mA )
350
3,5
3
Vs= 5.6V to 31V
300
Tj = 25 °C
2,5
2
250
Tj = 150 °C
200
150
1,5
1
-50
-25
0
25
50
75
100
125
150
0
5
10
15
20
25
30
35
Tj(°C )
Vs (V )
Figure 13. V
vs. Tj
Figure 14. Vrhth vs. Tj
WEN_LOW
Vwen_low (V)
2
Vrhth (% Vo_ref )
60
1,9
1,8
1,7
1,6
1,5
1,4
55
50
45
40
35
30
Vs= 5.6V to 31V
Vs= 5.6V to 31V
-50
-25
0
25
50
Tj(°C )
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Tj(°C )
12/30
L4993
Electrical specifications
Figure 15. Vrlth vs. Tj
Figure 16. Vwhth vs. Tj
Vrlth (% Vo_ref)
50
Vwhth (% Vo_ref )
60
55
50
45
40
35
30
Vs= 5.6V to 31V
40
30
20
10
0
Vs= 5.6V to 31V
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Tj(°C )
Tj(°C )
Figure 17. Vwlth vs. Tj
Figure 18. Icr & Icwc vs. Tj
Vwlth (% Vo_ref)
50
Icr & Icwc (µA)
30
Vs= 5.6V to 31V
25
Vs= 5.6V to 31V
40
30
20
10
0
20
Icr
15
10
Icwc
5
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Tj(°C )
Tj(°C )
Figure 19. Idr & Icwd vs. Tj
Figure 20. Twop vs. Tj
Idr & Icwd (µA)
30
Twop (ms)
80
Vs= 5.6V to 31V
25
70
60
50
40
30
20
Vs= 5.6V to 31V
Ctw= 47nF
20
Idr
15
10
5
Icwd
0
-50
-25
0
25
50
75
100
125
150
-50
-25
0
25
50
75
100
125
150
Tj(°C )
Tj(°C )
13/30
Electrical specifications
L4993
Figure 21. PSRR
C0 = 4.7µF
PSRR [dB]
80
70
60
50
40
30
20
10
0
0,1
1
10
100
1000
10000
FREQUENCY [KHz]
2.5
Test circuit and waveforms plot
2.5.1
Load regulation
Figure 22. Load regulation test circuit
10
Figure 23. Maximum load variation response
V
[1V / div]
0
I
[50mA / div]
0
0,00E+00
5,00E-05
1,00E-04
1,50E-04
2,00E-04
2,50E-04
3,00E-04
3,50E-04
4,00E-04
Time [s]
14/30
L4993
Application information
3
Application information
Figure 24. L4993 application schematic
Vo
Vi
Vs
C
01
C02
Cs
Thermal
protection
+
Vcw
Wi
-
Ctw
Watchdog
Voltage reference
WEn
Vcr
Res
Reset
Ctr
Gnd
Note:
The input capacitor Cs > 200nF is necessary for the smoothing of line disturbances. The
output capacitor C01 > 100nF is necessary for the stability of the regulation loop. In order to
damp output voltage oscillations during high load current surges, it is recommended put an
additional electrolytic capacitor C02 > 10µF at the output pin.
3.1
Voltage regulator
Voltage regulator uses a p-channel transistor as a regulating element. With this structure,
very low dropout voltage at current up to 500mA is obtained. The output voltage is regulated
up to transient input supply voltage of 40V. No functional interruption due to over-voltage
pulses is generated. A short circuit protection to GND is provided. The voltage regulator
watchdog functionality can be disabled by putting WEn low.
Figure 25. Behavior of output current versus regulated voltage Vo
Vo
Vo_ref
Ishort Ilim
Iout
15/30
Application information
L4993
3.2
Reset
The reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with
the in-ternal reference voltage and a resistor output divider. If the output voltage becomes
lower than Vo_th then Res goes low with a reaction time trr. The reset low signal is
guaranteed for an output voltage Vo greater than 1V.
When the output voltage becomes higher than Vo_th then Res goes high with a delay trd.
This delay is obtained by an internal oscillator.
The oscillator period is given by:
Tosc = [(Vrhth-Vrlth) x Ctr] / Icr + [(Vrhth-Vrlth) x Ctr] / Idr
where:
Icr:
Idr:
is an internally generated charge current
is an internally generated discharge current
Vrhth, Vrlth: are two voltages defined with the output voltage and a resistor output
divider
Ctr:
is an external capacitance.
trd is given by:
trd = 512 x Tosc
Reset is active when En is high.
Figure 26. Reset timing diagram
Wi
Vout_th
Vo
< trr
Tosc
Vrhth
Vrlth
trr
Vcr
trd = 512 Tosc
Res
16/30
L4993
Application information
3.3
Watchdog
A connected microcontroller is monitored by the watchdog input Wi. If pulses are missing,
the Reset output pin is set to low. The pulse sequence time can be set within a wide range
with the external capacitor, Ctw. The watchdog circuit discharges the capacitor Ctw, with the
constant current Icwd. If the lower threshold Vwlth is reached, a watchdog reset is
generated. To prevent this the microcontroller must generate a positive edge during the
discharge of the capacitor before the voltage has reached the threshold Vwlth. In order to
calculate the minimum time t, during which the micro-controller must output the positive
edge, the following equation can be used:
(Vwhth-Vwlth) x Ctw = Icwd x t
Every Wi positive edge switches the current source from discharging to charging. The same
happens when the lower threshold is reached. When the voltage reaches the upper
threshold, Vwhth, the current switches from charging to discharging. The result is a
saw-tooth voltage at the watchdog timer capacitor Ctw.
Figure 27. Watchdog timing diagram
Wi
twop
Vwhth
Vcw
Vwlth
Vwlth
twol
Res
17/30
Package and PCB thermal data
L4993
4
Package and PCB thermal data
4.1
SO-8 thermal data
Figure 28. SO-8 PC board
Note:
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm, PCB
th th
thickness = 2mm, Cu thickness = 35µm , Copper areas: from minimum pad lay-out to 2cm ).
2
Figure 29. R
Vs. PCB copper area in open box free air condition
thj-amb
170
160
150
140
130
120
110
0
0,5
1
1,5
2
2,5
PCB Cu heatsink area (cm^2)
18/30
L4993
Package and PCB thermal data
Figure 30. SO-8 thermal impedance junction ambient single pulse
ZTH (°C/W)
1000
Footprint
2
2 cm
100
10
1
0,0001
0,001
0,01
0,1
Time (s)
1
10
100
1000
Equation 1: pulse calculation formula
= R ⋅ δ + Z (1 – δ)
Z
THδ
TH
THtp
where δ = t /T
P
Figure 31. Thermal fitting model of Vreg in SO-8
19/30
Package and PCB thermal data
Table 9. SO-8 thermal parameter
L4993
Area/island (cm2)
Footprint
4.21
2.11
2
2
40
2
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
41
R5 (°C/W)
40
R6 (°C/W)
58
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
0.00029
0.0024
0.03
0.04
0.1
1.05
20/30
L4993
Package and PCB thermal data
4.2
SO-20 thermal data
Figure 32. SO-20 PC board
Note:
Layout condition of R and Z measurements (PCB FR4 area= 58mm x 58mm,PCB
th th
thickness = 2mm, Cu thickness=35µm , Copper areas: from minimum pad lay-out to 6cm ).
2
Figure 33. R
Vs. PCB copper area in open box free air condition
thj-amb
70
68
66
64
62
60
58
56
54
52
50
0
1
2
3
4
5
6
7
PCB Cu heatsink area (cm^2)
21/30
Package and PCB thermal data
Figure 34. SO-20 thermal impedance junction ambient single pulse
L4993
ZTH (°C/W)
100
Footprint
6 cm2
10
1
0,0001
0,001
0,01
0,1
Time (s)
1
10
100
1000
Equation 2: pulse calculation formula
Z
= R
⋅ δ + Z
(1 – δ)
THδ
TH
THtp
where δ = t /T
P
Figure 35. Thermal fitting model of Vreg in SO-20
22/30
L4993
Package and PCB thermal data
Table 10. SO-20 thermal parameter
Area/island (cm2)
Footprint
2
18
7
R1 (°C/W)
R2 (°C/W)
R3 (°C/W)
R4 (°C/W)
R5 (°C/W)
R6 (°C/W)
C1 (W.s/°C)
C2 (W.s/°C)
C3 (W.s/°C)
C4 (W.s/°C)
C5 (W.s/°C)
C6 (W.s/°C)
4.21
2.11
2.2
10
15
35
0.00029
0.0024
0.015
0.15
1.5
4
23/30
Package and packing information
L4993
5
Package and packing information
5.1
ECOPACK® packages
®
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a Lead-free second-level interconnect. The category of
Second-Level Interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label.
ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com.
5.2
SO-8 package information
Figure 36. SO-8 package dimensions
24/30
L4993
Package and packing information
Table 11. SO-8 mechanical data
Millimeters
Typ.
Symbol
Min.
Max.
1.75
0.25
A
A1
A2
b
0.10
1.25
0.28
0.17
4.80
5.80
3.80
0.48
0.23
5.00
6.20
4.00
c
D(1)
E
4.90
6.00
3.90
1.27
E1(2)
e
h
0.25
0.40
0.50
1.27
L
L1
k
1.04
0°
8°
ccc
0.10
1. Dimensions D does not include mold flash, protrusions or gate burrs. Mold flash, potrusions or gate burrs
shall not exceed 0.15mm in total (both side).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25mm per side.
25/30
Package and packing information
L4993
5.3
SO-20 package information
Figure 37. SO-20 package dimensions
Table 12. SO-20 mechanical data
Millimeters
Typ.
Symbol
Min.
Max.
2.65
0.30
0.51
0.32
13.00
7.60
A
A1
B
2.35
0.10
0.33
0.23
12.60
7.40
C
D(1)
E
e
1.27
H
10.0
0.25
0.40
0°
10.65
0.75
1.27
8°
h
L
k
ddd
0.10
1. “D” dimension does not include mold flash, protusions or gate burrs. Mold flash, protusions or gate burrs
shall not exceed 0.15mm per side.
26/30
L4993
Package and packing information
5.4
SO-8 packing information
Figure 38. SO-8 tube shipment (no suffix)
B
Base Q.ty
Bulk Q.ty
100
2000
C
Tube length ( 0.5)
A
B
532
3.2
6
A
C ( 0.1)
0.6
All dimensions are in mm.
Figure 39. SO-8 tape and reel shipment (suffix “TR”)
REEL DIMENSIONS
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C ( 0.2)
F
G (+ 2 / -0)
N (min)
T (max)
2500
2500
330
1.5
13
20.2
12.4
60
18.4
All dimensions are in mm.
TAPE DIMENSIONS
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 ( 0.1)
P
12
4
Tape Hole Spacing
Component Spacing
Hole Diameter
8
D (+ 0.1/-0) 1.5
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
D1 (min)
F ( 0.05)
K (max)
1.5
5.5
4.5
2
P1 ( 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
27/30
Package and packing information
L4993
5.5
SO-20 packing information
Figure 40. SO-20 tube shipment (no suffix)
Base Q.ty
Bulk Q.ty
Tube length ( 0.5)
A
40
800
532
3.5
C
B
B
13.8
0.6
C ( 0.1)
A
Figure 41. SO-20 tape and reel shipment (suffix “TR”)
Reel dimensions
Base Q.ty
Bulk Q.ty
A (max)
B (min)
C ( 0.2)
D
G (+ 2 / -0)
N (min)
T (max)
1000
1000
330
1.5
13
20.2
24.4
60
30.4
Tape dimensions
According to Electronic Industries Association
(EIA) Standard 481 rev. A, Feb. 1986
Tape width
W
P0 ( 0.1)
P
24
4
Tape Hole Spacing
Component Spacing
Hole Diameter
12
D (+ 0.1/-0) 1.5
Hole Diameter
Hole Position
Compartment Depth
Hole Spacing
D1 (min)
F ( 0.05)
K (max)
1.5
11.5
6.5
2
P1 ( 0.1)
All dimensions are in mm.
End
Start
Top
No components
500mm min
Components
No components
500mm min
cover
tape
Empty components pockets
saled with cover tape.
User direction of feed
28/30
L4993
Revision history
6
Revision history
Table 13. Document revision history
Date
Revision
Changes
June-2004
1
2
Initial release.
18-Jan-2007
Updated Table 5., 6, 7 and 8.
Document put in corporate technical literature template.
01-Jun-2007
22-Aug-2007
29-Aug-2007
3
4
5
Updated Table 4.
Table 5: General: updated Ishort, Ilim, Iq, Trr2, Vih_hist parameters.
Added list of tables and figures.
Added Section 4: Package and PCB thermal data.
Document restructured.
Changed Figure 1: Block diagram.
Updated Table 5: General:
– changed Ishort max value from 4000 mA to 400 mA
– changed Iqn_150 typ. value from 1.45 mA to 1.25 mA
– changed Iqn_50 typ. value from 538 µA to 470 µA
– changed Iqn_1 typ. value from 120 µA to 100 µA.
Updated Table 6: Reset:
08-Apr-2008
6
– corrected trd formula.
Updated Table 7: Watchdog:
– changed Vwlth values in Vo_ref percentages
– changed Vwhth values in Vo_ref percentages.
Added Figure 24: L4993 application schematic.
Added Section 2.4: Electrical characteristics curves.
Added Section 2.5: Test circuit and waveforms plot.
29/30
L4993
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