L4995_技术文档

L4995

5V, 500mA low drop voltage regulator

Features

Max DC supply voltage

Max output voltage tolerance

Max dropout voltage

V_S

∆V₀

V_dp

I₀

40V

+/-2%

500mV

500mA

3µA⁽¹⁾

Output current

PowerSSO-12

PowerSSO-24

Quiescent current

I_qn

1. Typical value with regulator disabled

The output voltage regulating element consists of

a p-channel MOS and regulation is performed

regardless of input voltage transients of up to 40V.

The high precision of the output voltage is

obtained using a pre-trimmed reference voltage.

The L4995 family is protected against short circuit

and over-temperature protection switches off the

devices in the case of extremely high power

dissipation.

■

Operating DC supply voltage range 5.6V to 31V

■ Low dropout voltage

■ Low quiescent current consumption

Reset circuit sensing of output voltage down to 1V

■

■ Programmable reset pulse delay with external

capacitor

(a)

■ Programmable watchdog timer with external

capacitor

■ The L4995 integrates the Watchdog, Enable

■ Thermal shutdown and short circuit protection

and externally programmable Reset circuits.

■ Wide temperature range (T = -40°C to 150°C)

j

(a)

■ The L4995A features the externally

■ Enable input for enabling / disabling the

programmable Reset and Enable.

voltage regulator

■ Finally the L4995R features the externally

programmable Reset.

Description

The combination of such features makes this

device particularly flexible and suitable to supply

microprocessor systems in automotive

applications.

L4995 is a family of monolithic integrated 5V

voltage regulators with a low drop voltage at

currents of up to 500mA, available in both 12 and

24 pin packages.

Table 1.

Device summary

Package

Order codes

Tape & reel

Tube

PowerSSO-12 (exposed pad)

PowerSSO-24 (exposed pad)

L4995J - L4995AJ - L4995RJ

L4995K - L4995AK - L4995RK

L4995JTR - L4995AJTR - L4995RJTR

L4995KTR - L4995AKTR - L4995RKTR

P/N

Watchdog

Reset

Enable

L4995J - L4995K

L4995AJ - L4995AK

L4995RJ - L4995RK

X

-

X

-

a. Watchdog and Enable facilities are available according to Table 1: Device summary

December 2007

Rev 6

1/33

www.st.com

33

Contents

L4995

Contents

1

2

Block diagrams and pins descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.1

2.2

2.3

2.4

2.5

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Test circuit and waveforms plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.5.1

Load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

3

Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.1

3.2

3.3

Voltage regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

4

5

Package and PCB thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

4.1

4.2

PowerSSO-12™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

PowerSSO-24™ thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Package and packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

5.1

5.2

5.3

ECOPACK^®packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

PowerSSO-12™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

PowerSSO-24™ packing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

6

Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2/33

L4995

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Device summary. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Pins descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

General. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

PowerSSO-12™ thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

PowerSSO-24™ thermal parameter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

PowerSSO-12™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

PowerSSO-24™ mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3/33

List of figures

L4995

List of figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Block diagram of L4995 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Block diagram of L4995A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Block diagram of L4995R . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Pins configurations (L4995) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Output voltage vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Output voltage vs. Vs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Drop Voltage vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Current consumption vs. Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Current consumption vs. Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 10. Current limitation vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Figure 11. Current limitation vs. Input Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 12. Short Circuit Current vs. Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 13. Output Voltage vs. Enable Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 14.

Figure 15.

V

vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

En_high

EN_LOW

Figure 16. Vrhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

Figure 17. Vrlth vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 18. Vwhth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 19. Vwlth vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 20. Icr & Icwc vs. Tj. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 21. Idr & Icwd vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 22. Twop vs. Tj . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Figure 23. PSRR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 24. Load regulation test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 25. Maximum load variation response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Figure 26. L4995 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 27. Behavior of output current versus regulated voltage Vo. . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Figure 28. Reset timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Figure 29. Watchdog timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Figure 30. PowerSSO-12™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Figure 31. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 19

Figure 32. PowerSSO-12™ thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 20

Figure 33. Thermal fitting model of Vreg in PowerSSO-12™ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Figure 34. PowerSSO-24™ PC board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Figure 35. Rthj-amb Vs. PCB copper area in open box free air condition . . . . . . . . . . . . . . . . . . . . . 22

Figure 36. PowerSSO-24™ thermal impedance junction ambient single pulse . . . . . . . . . . . . . . . . . 23

Figure 37. Thermal fitting model of Vreg in in PowerSSO-24™. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 38. PowerSSO-12™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 39. PowerSSO-24™ package dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Figure 40. PowerSSO-12™ tube shipment (no suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Figure 41. PowerSSO-12™ tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

TM

Figure 42. PowerSS0-24 tube shipment (no suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

TM

Figure 43. PowerSSO-24 tape and reel shipment (suffix “TR”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

4/33

L4995

Block diagrams and pins descriptions

1

Block diagrams and pins descriptions

Figure 1.

Block diagram of L4995

Vo

Vs

Is

Io

Vos

V

Start up

S

1.25V

I

En

Voltage

Reference

En

Vo

+

100mV

_

VEn

Vcw

Icw

Vcw

Res

Wi

watchdog

Vwi

V

Res

Low Voltage

Reset

Vcr

GND

Vcr

Figure 2.

Block diagram of L4995A

Vo

Vs

Is

Io

Vos

V

Start up

S

1.25V

I

En

Voltage

Reference

En

Vo

+

100mV

_

VEn

Res

V

Res

Low Voltage

Reset

Vcr

GND

Vcr

5/33

Block diagrams and pins descriptions

Figure 3. Block diagram of L4995R

L4995

Vo

Vs

Is

Io

Vos

V

Start up

S

1.25V

Voltage

Reference

Vo

+

_

100mV

VEn

Res

V

Res

Low Voltage

Reset

Vcr

GND

Vcr

Table 2.

Pins descriptions

PowerSSO-12 PowerSSO-24

Function

name

pin #

Enable input (L4995 and L4996A only, otherwise not

connected).

En

1

13, 14, 15

If high regulator, watchdog and reset are operating. If

low regulator, watchdog and reset are shut down.

Connect to Vs if not used.

NC

2, 4, 8

3

3, 5, 6, 9, 11 Not connected.

Gnd

16, 17, 18

1, 12

Ground reference.

Ground (these pins are to be connected to a heat

spreader electrically grounded).

Gnd

Res

-

Reset output.

5

19, 20, 21

22, 23, 24

It is pulled down when output voltage goes below Vo_th

or frequency at Wi is too low. Leave floating if not used.

Reset timing adjust.

Vcr

6

7

A capacitor between Vcr pin and gnd. sets the reset

delay time (trd). Leave floating if Reset is not used.

Watchdog timer adjust (L4995 only, otherwise not

connected).

Vcw

2

A capacitor between Vcw pin and gnd. sets the time

response of the watchdog monitor.

6/33

L4995

Block diagrams and pins descriptions

Table 2.

Pins descriptions (continued)

PowerSSO-12 PowerSSO-24

Function

name

pin #

Watchdog input (L4995 only, otherwise not connected).

Wi

Vo_s

Vo

9

4

7

8

If the frequency at this input pin is too low, the Reset

output is activated.

10

11

Regulator voltage output sensing.

5 voltage regulator output.

Block to ground with a capacitor >100nF (needed for

regulator stability).

Supply voltage.

Vs

12

10

Block to ground directly at Vs pin with a ceramic

capacitor (e.g. 200nF).

Figure 4.

Pins configurations (L4995)

TAB = GND

7/33

Electrical specifications

L4995

2

Electrical specifications

2.1

Absolute maximum ratings

Stressing the device above the rating listed in the “Absolute maximum ratings” table may

cause permanent damage to the device. These are stress ratings only and operation of the

device at these or any other conditions above those indicated in the Operating sections of

this specification is not implied. Exposure to Absolute Maximum Rating conditions for

extended periods may affect device reliability. Refer also to the STMicroelectronics SURE

Program and other relevant quality documents.

Table 3.

Symbol

Absolute maximum ratings

Parameter

Value

- 0.3 to 40

Unit

V_Vsdc

I_Vsdc

V_Vo

I_Vo

DC supply voltage

V

Input current

Internally limited

- 0.3 to 6

DC output voltage

V

DC output current

Internally limited

-0.3 to V_Vo+ 0.3

Internally limited

- 0.3 to V_Vo+ 0.3

- 0.3 to V_Vsdc+0.3

- 40 to 150

V_Wi

V_od

Watchdog input voltage

Res output voltage

V

I_od

Res output current

V_cr

Vcr voltage

V

V_cw

V_En

T_j

Watchdog delay voltage

Enable input

V

Junction temperature

ESD voltage level (HBM-MIL STD 883C)

ESD voltage level (CDM AEC-Q100-011)

C

V_ESD

2

kV

V

750

8/33

L4995

Electrical specifications

2.2

Thermal data

For details, please refer to Section 4.1: PowerSSO-12™ thermal data and Section 4.2:

PowerSSO-24™ thermal data.

mm

(1)

Table 4.

Symbol

Thermal data

Parameter

Value

Unit

Thermal resistance Junction to Ambient:

PowerSSO-12

R_thj-case

5

4

°K/W

PowerSSO-24

Thermal resistance Junction to Ambient:

PowerSSO-12

R_thj-amb

52

38

°K/W

PowerSSO-24

1. The values quoted are for PCB 77mm x 86mm x 1.6mm, FR4, double layer; Copper thickness 0.070mm

Copper area 3cm2 Thermal Vias, Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08

mm, Cu thickness on vias 0.025 mm.

2.3

Electrical characteristics

Values specified in this section are for V = 5.6V to 31V, T = -40 °C to +150 °C unless

s

j

otherwise stated.

Table 5.

General

Symbol

Parameter

Output voltage

Short circuit current

Test condition

Min. Typ. Max.

4.9 5.00 5.1

550 800 1050

600 900 1250

25

Unit

V

Vs = 5.6 to 31V

Io = 0 to 500mA

Vo

V_{o_ref}

Vo

I_short

Vs = 13.5V ⁽¹⁾

mA

mV

dB

Vo

I_lim

Output current limitation

Line regulation voltage

Load regulation voltage

Drop voltage

Vs = 13.5V ⁽¹⁾

(2)

Vs = 5.6 to 31V

Io = 0 to 500mA

Vs, Vo

Vo

V_line

V_load

Io = 0 to 500mA

Io = 400mA

25

(3)

Vs, Vo

V_dp

270 500

SVR

I_qs

Ripple rejection

fr = 100 Hz ⁽⁴⁾

55

Current consumption with Vs = 13.5V,

regulator disabled

3

10

µA

En = low

Current consumption

with regulator enabled

Vs = 13.5V,

Io < 1mA,

I_{qn_1}

I_{qn_50}

90

160

µA

Current consumption

with regulator enabled

Vs = 13.5V,

Io = 50mA,

290 400

µA

9/33

Electrical specifications

Table 5.

L4995

General (continued)

Symbol Parameter

Test condition

Min. Typ. Max.

Unit

µA

Current consumption

with regulator enabled

Vs = 13.5V,

Io = 150mA,

Vs, Vo

I_{qn_150}

I_{qn_250}

I_{qn_500}

Tw

740 1000

Current consumption

with regulator enabled

Vs= 13.5V,

Io= 250mA,

1

1.4

2.7

mA

°C

Current consumption

with regulator enabled

Vs= 13.5V,

Io= 500mA,

2.1

Thermal protection

temperature

150

190

Thermal protection

temperature hysteresis

Tw_hy

10

°C

1. See Figure 27.

2. Measured output current when the output voltage has dropped 100mV from its nominal value obtained at

Vs=13.5V and Io= 250mA.

3. Vs-Vo measured when the output voltage has dropped 100mV from its nominal value obtained at

Vs=13.5V and Io= 250mA.

4. Guaranteed by design.

Table 6.

Reset

Symbol

Parameter

Test condition

Min. Typ. Max.

Unit

V

R_ext= 5kΩ to Vo,

Vo > 1V

Res

Vcr

Vres_l

I_{Res_lkg}

R_Res

Vo_th

Vrlth

Vrhth

Icr

Reset output low voltage

0.4

1

Reset output high leakage

current

V

_Res= 5V

µA

kΩ

Pull up internal resistance

(versus Vo)

10

20

40

Vs = 5.6 to 31V

Io = 1 to 500mA

Vo out of regulation

threshold

below

V_{o_ref}

6%

8% 10%

Reset delay circuit low

threshold

Vs = 13.5V

Vs =13.5V

Vs = 13.5V

10% 13% 16% V_{o_ref}

44% 47% 50% V_{o_ref}

Reset delay circuit high

threshold

Vcr

Charge current

8

15

30

µA

µs

Vcr

Idr

Discharge current

Reset reaction time⁽¹⁾

Reset delay time

Res

Trr

Vo = V_{o_th}-100mV 100 250 700

Vs = 13.5V,

Trd

13

39

70

ms

Ctr = 47nF

1. When Vo becomes lower than 4V, the reset reaction time decreases down to 2µs assuring a faster reset

condition in this particular case.

10/33

L4995

Electrical specifications

Table 7.

Watchdog

Symbol

Parameter

Input high voltage

Input low voltage

Input hysteresis

Test condition

Vs = 13.5V

Min. Typ. Max.

Unit

V

Wi

Vih

Vil

3.5

1.5

500

Vs = 13.5V

V

Wi

Vih

Vs = 13.5V

mV

µA

Vs = 13.5V

Vwi = 3.5V

Wi

Iwi

Pull down current

Low threshold

6

10

Vcw

Res

Vwlth

Vwhth

Icwc

Icwd

Twop

twol

Vs = 13.5V

10% 13% 16% V_{o_ref}

44% 47% 50% V_{o_ref}

High threshold

Vs = 13.5V,

Vcw = 0.1V

Charge current

5

10

20

5

µA

ms

Vs = 13.5V,

Vcw = 2.5V

Discharge current

Watchdog period

Watchdog output low time

1.25 2.5

Vs = 13.5V,

Ctw = 47nF

20

4

40

8

80

16

Vs = 13.5V,

Ctw = 47nF

Table 8.

Enable

Symbol

Parameter

Test condition

Min. Typ. Max.

Unit

V

En

V_{En_low}En input low voltage

V_{En_high}En input high voltage

V_{En_hyst}En input hysteresis

1

3

V

830

mV

µA

I_En

Pull down current

Vs = 13.5V

10

18

11/33

Electrical specifications

L4995

2.4

Electrical characteristics curves

Figure 5.

Output voltage vs. Tj

Figure 6. Output voltage vs. Vs

Vo_ref (V)

10

5,5

5,4

5,3

5,2

5,1

5

Vs= 13.5V

I0 = 250mA

9

8

7

I0 = 250 mA

Tj = 25 °C

6

5

4

3

2

1

0

4,9

4,8

4,7

4,6

4,5

-50

-25

0

25

50

75

100

125

150

0

5

10

15

20

25

30

35

Tj(°C )

Vs (V )

Figure 7.

Drop Voltage vs. Output Current

Figure 8.

Current consumption vs. Output

Current

Vdp (V)

0,5

Iqn (µA)

2500

0,45

0,4

Vs= 13.5 V

Tj= 25 °C

En= High

2000

1500

1000

500

0,35

0,3

Tj= 125 °C

0,25

0,2

Tj= 25 °C

0,15

0,1

0,05

0

-100

0

100

200

300

400

500

600

-100

0

100

200

300

400

500

600

Io (mA)

Figure 9.

Current consumption vs. Input

Voltage

Figure 10. Current limitation vs. Tj

Iqn(µA )

1200

Ilim (mA)

1200

1100

1000

900

800

700

600

500

400

300

200

100

Tj = 25 °C

En = High

Io= 250mA

Io= 150mA

1100

1000

Vs= 13.5V

900

800

700

600

500

Io =50mA

Io < 1mA

0

5

10

15

20

25

30

35

-50

-25

0

25

50

75

100

125

150

Vs (V )

Tj(°C )

12/33

L4995

Electrical specifications

Figure 11. Current limitation vs. Input Voltage Figure 12. Short Circuit Current vs. Input

Voltage

Ishort (mA )

1000

Ilim (mA)

1200

1150

1100

1050

1000

950

900

850

800

750

700

650

600

550

Tj = 25 °C

900

850

Tj = 150 °C

800

Tj = 125 °C

750

700

650

600

550

500

0

500

0

5

10

15

20

25

30

35

5

10

15

20

25

30

35

Vs (V )

Figure 13. Output Voltage vs. Enable Voltage Figure 14. V

vs. Tj

En_high

Ven_high (V)

6,0

5,0

4,0

3,0

2,0

1,0

0,0

3

2,9

2,8

2,7

2,6

2,5

2,4

2,3

2,2

2,1

2

Vs= 5.6V to 31V

-50

-25

0

25

50

75

100

125

150

0,0

0,8

1,4

1,7

2,0

2,3

2,6

2,9

5,0

Tj(°C )

Ven (V)

Figure 15. V

vs. Tj

Figure 16. Vrhth vs. Tj

EN_LOW

Ven_low (V)

2

Vrhth (% Vo_ref )

80

Vs= 5.6V to 31V

1,9

1,8

1,7

1,6

1,5

1,4

70

60

50

40

30

20

Vs= 5.6V to 31V

-50

-25

0

25

50

75

100

125

150

-50

-25

0

25

50

75

100

125

150

Tj(°C )

13/33

Electrical specifications

Figure 17. Vrlth vs. Tj

L4995

Figure 18. Vwhth vs. Tj

Vrlth (% Vo_ref)

50

Vwhth (% Vo_ref )

80

Vs= 5.6V to 31V

70

60

50

40

30

20

Vs= 5.6V to 31V

40

30

20

10

0

-50

-25

0

25

50

75

100

125

150

-50

-25

0

25

50

75

100

125

150

Tj(°C )

Figure 19. Vwlth vs. Tj

Figure 20. Icr & Icwc vs. Tj

Vwlth (% Vo_ref)

50

Icr & Icwc (µA)

20

Vs= 5.6V to 31V

Vcw= 0.1V

18

Vs= 5.6V to 31V

40

30

20

10

0

16

Icr

14

12

Icwc

10

8

6

-50

-25

0

25

50

75

100

125

150

-50

-25

0

25

50

75

100

125

150

Tj(°C )

Figure 21. Idr & Icwd vs. Tj

Figure 22. Twop vs. Tj

Twop (ms)

80

Idr & Icwd (µA)

20

18

Vs= 5.6V to 31V

Vcw = 2.5V

70

60

50

40

30

20

16

14

12

10

8

Idr

Vs= 5.6V to 31V

Ctw= 47nF

6

4

Icwd

2

0

-50

-25

0

25

50

Tj(°C )

75

100

125

150

-50

-25

0

25

50

75

100

125

150

Tj(°C )

14/33

L4995

Electrical specifications

Figure 23. PSRR

PSRR [dB]

80,00

C₀= 4.7 µF

70,00

60,00

50,00

40,00

30,00

20,00

10,00

0,00

0,10

1,00

10,00

100,00

1000,00 10000,00

FREQUENCY [KHz]

2.5

Test circuit and waveforms plot

Load regulation

2.5.1

Figure 24. Load regulation test circuit

10

Figure 25. Maximum load variation response

V^{0 [1V /div}]

I^{0 [}^{200mA /div}]

0,00E+00

5,00E-05

1,00E-04

1,50E-04

2,00E-04

2,50E-04

3,00E-04

3,50E-04

4,00E-04

Time [s]

15/33

Application information

L4995

3

Application information

Figure 26. L4995 application schematic

Vo

Vs

Vi

Co1

Co2

s

Start up

1.25V

gnd

En

Voltage

Reference

+

_

100mV

Vcw

Ctw

Wi

Res

watchdog

Low Voltage

Reset

Vcr

Ctr

Note:

The input capacitor Cs > 200nF is necessary for the smoothing of line disturbances. The

output capacitor C01 > 100nF is necessary for the stability of the regulation loop. In order to

dampen output voltage oscillations during high load current surges, it is recommended an

additional electrolytic capacitor C02 > 10µF to be placed at the output pin.

3.1

Voltage regulator

Voltage regulator uses a p-channel transistor as a regulating element. With this structure,

very low dropout voltage at current up to 500mA is obtained. The output voltage is regulated

up to transient input supply voltage of 40V. No functional interruption due to over-voltage

pulses is generated. A short circuit protection to GND is provided.

The voltage regulator is active when En is high.

Figure 27. Behavior of output current versus regulated voltage Vo

Vo

Vo_ref

Ishort Ilim

Iout

16/33

L4995

Application information

3.2

Reset

The reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with

the in-ternal reference voltage and a resistor output divider. If the output voltage becomes

lower than Vo_th then Res goes low with a reaction time trr. The reset low signal is

guaranteed for an output voltage Vo greater than 1V.

When the output voltage becomes higher than Vo_th then Res goes high with a delay trd.

This delay is obtained by an internal oscillator.

The oscillator period is given by:

Tosc = [(Vrhth-Vrlth) x Ctr] / Icr + [(Vrhth-Vrlth) x Ctr] / Idr

where:

Icr:

Idr:

is an internally generated charge current

is an internally generated discharge current

Vrhth, Vrlth: are two voltages defined with the output voltage and a resistor output

divider

Ctr:

is an external capacitance.

trd is given by:

trd = (Vrhth x Ctr)/Icr + 3 x Tosc

Reset is active when En is high.

Figure 28. Reset timing diagram

Wi

Vout_th

< trr

Vo

Tosc

Vrhth

Vrlth

trr

Vcr

trd

Res

17/33

Application information

L4995

3.3

Watchdog

A connected microcontroller is monitored by the watchdog input Wi. If pulses are missing,

the Reset output pin is set to low. The pulse sequence time can be set within a wide range

with the external capacitor, Ctw. The watchdog circuit discharges the capacitor Ctw, with the

constant current Icwd. If the lower threshold Vwlth is reached, a watchdog reset is

generated. To prevent this the microcontroller must generate a positive edge during the

discharge of the capacitor before the voltage has reached the threshold Vwlth. In order to

calculate the minimum time t, during which the micro-controller must output the positive

edge, the following equation can be used:

(Vwhth-Vwlth) x Ctw = Icwd x t

Every Wi positive edge switches the current source from discharging to charging. The same

happens when the lower threshold is reached. When the voltage reaches the upper

threshold, Vwhth, the current switches from charging to discharging. The result is a

saw-tooth voltage at the watchdog timer capacitor Ctw.

Figure 29. Watchdog timing diagram

Wi

Twop

Vwhth

Vcw

Vwlth

twol

Res

18/33

L4995

Package and PCB thermal data

4

Package and PCB thermal data

4.1

PowerSSO-12™ thermal data

Figure 30. PowerSSO-12™ PC board

.

Note:

Layout condition of R and Z measurements (PCB: Double layer, Thermal Vias, FR4

th th

area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70µm (front and back side)

Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness

on vias 0.025 mm, Footprint dimension 4.1 mm x 6.5 mm ).

Figure 31. R

Vs. PCB copper area in open box free air condition

thj-amb

RTHj_amb(°C/W)

70

65

60

55

50

45

40

0

2

4

6

8

10

PCB Cu heatsink area (cm^2)

19/33

Package and PCB thermal data

Figure 32. PowerSSO-12™ thermal impedance junction ambient single pulse

L4995

ZTH (°C/W)

100

Footprint

2 cm²

8 cm²

10

1

0,1

0,0001

0,001

0,01

0,1

Time (s)

1

10

100

1000

Equation 1: pulse calculation formula

Z

= R

⋅ δ + Z

(1 – δ)

THδ

TH

THtp

where δ = t /T

P

Figure 33. Thermal fitting model of Vreg in PowerSSO-12™

20/33

L4995

Package and PCB thermal data

Table 9.

PowerSSO-12™ thermal parameter

Area/island (cm²)

Footprint

0.45

1.79

7

2

8

R1 (°C/W)

R2 (°C/W)

R3 (°C/W)

R4 (°C/W)

R5 (°C/W)

R6 (°C/W)

C1 (W.s/°C)

C2 (W.s/°C)

C3 (W.s/°C)

C4 (W.s/°C)

C5 (W.s/°C)

C6 (W.s/°C)

10

15

20

9

22

10

15

26

0.001

0.0022

0.05

0.2

0.1

0.8

6

0.1

1

0.27

3

9

21/33

Package and PCB thermal data

L4995

4.2

PowerSSO-24™ thermal data

Figure 34. PowerSSO-24™ PC board

Note:

Layout condition of R and Z measurements (PCB: Double layer, Thermal Vias, FR4

th th

area= 77mm x 86mm,PCB thickness=1.6mm, Cu thickness=70µm (front and back side)

Thermal vias separation 1.2 mm, Thermal via diameter 0.3 mm +/- 0.08 mm, Cu thickness

on vias 0.025 mm, Footprint dimension 4.1 mm x 6.5 mm ).

Figure 35. R

Vs. PCB copper area in open box free air condition

thj-amb

RTHj_amb(°C/W)

55

50

45

40

35

30

0

2

4

6

8

10

PCB Cu heatsink area (cm^2)

22/33

L4995

Package and PCB thermal data

Figure 36. PowerSSO-24™ thermal impedance junction ambient single pulse

ZTH (°C/W)

100

Footprint

2 cm²

8 cm²

10

1

0,1

0,0001

0,001

0,01

0,1

Time (s)

1

10

100

1000

Equation 2: pulse calculation formula

= R ⋅ δ + Z (1 – δ)

Z

THδ

TH

THtp

where δ = t /T

P

Figure 37. Thermal fitting model of Vreg in in PowerSSO-24™

23/33

Package and PCB thermal data

Table 10. PowerSSO-24™ thermal parameter

L4995

Area/island (cm²)

Footprint

2

8

R1 (°C/W)

R2 (°C/W)

R3 (°C/W)

R4 (°C/W)

R5 (°C/W)

R6 (°C/W)

C1 (W.s/°C)

C2 (W.s/°C)

C3 (W.s/°C)

C4 (W.s/°C)

C5 (W.s/°C)

C6 (W.s/°C)

0.45

1.79

6

7.7

9

8

28

17

10

0.001

0.0022

0.025

0.75

1

4

5

9

2.2

17

24/33

L4995

Package and packing information

5

Package and packing information

5.1

ECOPACK^®packages

®

In order to meet environmental requirements, ST offers these devices in ECOPACK

packages. These packages have a Lead-free second level interconnect. The category of

second level interconnect is marked on the package and on the inner box label, in

compliance with JEDEC Standard JESD97. The maximum ratings related to soldering

conditions are also marked on the inner box label. ECOPACK is an ST trademark.

ECOPACK specifications are available at: www.st.com.

Figure 38. PowerSSO-12™ package dimensions

25/33

Package and packing information

L4995

Table 11. PowerSSO-12™ mechanical data

Millimeters

Typ.

Symbol

Min.

1.250

0.000

1.100

0.230

0.190

4.800

3.800

Max.

1.620

0.100

1.650

0.410

0.250

5.000

4.000

A

A1

A2

B

C

D

E

e

0.800

H

5.800

0.250

0.400

0º

6.200

0.500

1.270

8º

h

L

k

X

2.200

2.900

2.800

3.500

0.100

Y

ddd

26/33

L4995

Package and packing information

Figure 39. PowerSSO-24™ package dimensions

Table 12. PowerSSO-24™ mechanical data

Millimeters

Symbol

Min.

2.15

0

Typ.

Max.

2.47

2.40

0.075

0.51

0.32

10.5

7.6

A

A2

a1

b

0.33

0.23

10.1

7.4

c

D

E

e

0.8

8.8

e3

G

0.1

27/33

Package and packing information

Table 12. PowerSSO-24™ mechanical data

L4995

Millimeters

Typ.

Symbol

Min.

Max.

0.06

10.5

0.4

G1

H

h

10.1

k

5°

L

0.55

0.85

10°

4.7

N

X

Y

4.1

6.5

7.1

28/33

L4995

Package and packing information

5.2

PowerSSO-12™ packing information

Figure 40. PowerSSO-12™ tube shipment (no suffix)

B

Base Q.ty

100

2000

532

C

Bulk Q.ty

Tube length ( 0.5)

A

1.85

6.75

0.6

A

B

C ( 0.1)

All dimensions are in mm.

Figure 41. PowerSSO-12™ tape and reel shipment (suffix “TR”)

REEL DIMENSIONS

Base Q.ty

Bulk Q.ty

A (max)

B (min)

C ( 0.2)

F

2500

330

1.5

13

20.2

12.4

60

G (+ 2 / -0)

N (min)

T (max)

18.4

TAPE DIMENSIONS

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb. 1986

Tape width

W

12

4

Tape Hole Spacing

Component Spacing

Hole Diameter

Hole Position

P0 ( 0.1)

P

8

D ( 0.05)

D1 (min)

F ( 0.1)

K (max)

P1 ( 0.1)

1.5

5.5

4.5

2

Compartment Depth

Hole Spacing

All dimensions are in mm.

End

Start

Top

No components

500mm min

Components

No components

500mm min

cover

tape

Empty components pockets

saled with cover tape.

User direction of feed

29/33

Package and packing information

L4995

5.3

PowerSSO-24™ packing information

Figure 42. PowerSS0-24^TMtube shipment (no suffix)

Base Qty

Bulk Qty

Tube length ( 0.5)

49

1225

532

3.5

C

B

A

B

13.8

0.6

C ( 0.1)

All dimensions are in mm.

A

Figure 43. PowerSSO-24^TMtape and reel shipment (suffix “TR”)

REEL DIMENSIONS

Base Qty

Bulk Qty

A (max)

B (min)

C ( 0.2)

F

G (+2 / -0)

N (min)

T (max)

1000

330

1.5

13

20.2

24.4

100

30.4

TAPE DIMENSIONS

According to Electronic Industries Association

(EIA) Standard 481 rev. A, Feb. 1986

Tape width

W

24

4

Tape Hole Spacing

Component Spacing

Hole Diameter

Hole Position

P0 ( 0.1)

P

12

D ( 0.05)

D1 (min)

F ( 0.1)

K (max)

P1 ( 0.1)

1.55

1.5

11.5

2.85

2

Compartment Depth

Hole Spacing

End

All dimensions are in mm.

Start

No components

500mm min

Top

cover

tape

No components Components

500mm min

Empty components pockets

sealed with cover tape.

User direction of feed

30/33

L4995

Revision history

6

Revision history

Table 13. Document revision history

Date

Revision

Changes

26-May-2006

1

Initial release.

L4995A and L4995R versions added:

Features section updated and table added.

Table 1: Device summary updated.

Table 5: Electrical characteristics, Watchdog Iwi entry updated.

Figure 2: Block diagram of L4995A and Figure 3: Block diagram of

L4995R added.

Table 2: Pins descriptions updated.

05-Jan-2007

2

Table 4: Thermal data updated.

List of tables and List of figures added.

Packaging information provided in new format.

Table 11: PowerSSO-12™ mechanical data X and Y values updated.

Some sections reformatted for clarity.

New disclaimer added.

Updated Table 2: Pins descriptions.

Updated Figure 4: Pins configurations (L4995).

Table 1 changed title.

18-May-2007

09-Jul-2007

3

4

Updated Table 2: Pins descriptions.

31/33

Revision history

Table 13. Document revision history (continued)

L4995

Date

Revision

Changes

Updated Table 2: Pins descriptions.

09-Aug-2007

5

Updated Table 12: PowerSSO-24™ mechanical data.

Updated Section 2.2: Thermal data:

– corrected note changing single layer with double layer.

Updated Table 5: General:

– changed I_shorttyp. value from 750 to 800 mA

– added I_shortmax. value

– changed I_limtyp. value from 820 to 900 mA

– added I_limmax. value

– added I_limnote

– added V_dpnote

– changed I_{qn_1}typ. value from 110 to 90 µA

– added I_{qn_1}max. value

– added I_{qn_50}max. value

– added I_{qn_150}max. value

– changed I_{qn_250}typ. value from 1.2 to 1 mA

– added I_{qn_250}max. value

– changed I_{qn_500}typ. value from 2.4 to 2.1 mA

– added I_{qn_500}max. value

07-Dec-2007

6

Updated Table 6: Reset:

– changed Vrlth parameter definition from “Reset timing low” to

“Reset delay circuit low threshold”

– changed Vrhth parameter definition from “Reset timing high” to

“Reset delay circuit high threshold”

– added Trd min. and max. values

Updated Table 7: Watchdog:

– added Iwi max value

Updated Table 8: Enable:

– changed Pull down current symbol from R_{En to En}

I

– changed I_Entyp. value from 2.5 to 10 µA

– added I_Enmax. value

Added Section 2.4: Electrical characteristics curves.

Added Section 2.5: Test circuit and waveforms plot.

Added Section 4: Package and PCB thermal data

32/33

L4995

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right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any

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Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no

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33/33


型号：	L4995
厂家：	ST
描述：	5V, 500mA low drop voltage regulator 5V ， 500毫安低压降稳压器稳压器
文件：	总33页 (文件大小：1057K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

L4995 [STMICROELECTRONICS]

相关型号：

L4995AJ

L4995AJ-L4995AK

L4995AJTR

L4995AK

L4995AKTR

L4995J

L4995J-L4995K

L4995JTR

L4995K

L4995KTR

L4995RJ

L4995RJ-L4995RK