74VCXH16374 [STMICROELECTRONICS]
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)WITH 3.6V TOLERANT INPUTS AND OUTPUTS; 低压CMOS 16位D型触发器（三态） ，在3.6V容错输入和输出
| 型号： | 74VCXH16374 |
| 厂家： | 
ST |
| 描述： | LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)WITH 3.6V TOLERANT INPUTS AND OUTPUTS |
| 文件： | 总12页 (文件大小：288K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
74VCXH16374
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)
WITH 3.6V TOLERANT INPUTS AND OUTPUTS
■
■
3.6V TOLERANT INPUTS AND OUTPUTS
HIGH SPEED :
t
t
= 3.0 ns (MAX.) at V = 3.0 to 3.6V
PD
CC
= 3.9 ns (MAX.) at V = 2.3 to 2.7V
PD
CC
■
■
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
SYMMETRICAL OUTPUT IMPEDANCE:
TSSOP
TUBE
|I | = I = 24mA (MIN) at V = 3.0V
OH
OL
CC
|I | = I = 18mA (MIN) at V = 2.3V
OH
OL
CC
■
■
OPERATING VOLTAGE RANGE:
(OPR) = 2.3V to 3.6V
ORDER CODES
PACKAGE
V
CC
T & R
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES H16374
TSSOP
74VCXH16374TTR
■
■
BUS HOLD PROVIDED ON DATA INPUTS
LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
PIN CONNECTION
■
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74VCXH16374 is a low voltage CMOS 16 BIT
D-TYPE FLIP-FLOP with 3 STATE OUTPUTS
NON INVERTING fabricated with sub-micron
2
silicon gate and five-layer metal wiring C MOS
technology. It is ideal for low power and very high
speed 2.3 to 3.6V applications; it can be interfaced
to 3.6V signal environment for both inputs and
outputs.
These 16 bit D-TYPE flip-flops are controlled by
two clock inputs (nCK) and two output enable
inputs (nOE).
On the positive transition of the (nCK), the nQ
outputs will be set to the logic state that were
setup at the nD inputs.
While the (nOE) input is low, the 8 outputs (nQ)
will be in a normal state (HIGH or LOW logic level)
and while high level the outputs will be in a high
impedance state.
Any output control does not affect the internal
operation of flip flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
Bus hold on data inputs is provided in order to
eliminate the need for external pull-up or
pull-down resistor.
February 2003
1/12
74VCXH16374
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
IEC LOGIC SYMBOLS
PIN No
SYMBOL
NAME AND FUNCTION
1
1OE
3 State Output Enable
Input (Active LOW)
2, 3, 5, 6, 8, 9, 1Q0 to 1Q7 3-State Outputs
11, 12
13, 14, 16, 17, 2Q0 to 2Q7 3-State Outputs
19, 20, 22, 23
24
2OE
3 State Output Enable
Input (Active LOW)
25
2CK
Clock Input
36, 35, 33, 32, 2D0 to 2D7 Data Inputs
30, 29, 27, 26
47, 46, 44, 43, 1D0 to 1D7 Data Inputs
41, 40, 38, 37
48
1CK
Clock Input
Ground (0V)
4, 10, 15, 21,
28, 34, 39, 45
GND
7, 18, 31, 42
V
Positive Supply Voltage
CC
TRUTH TABLE
INPUTS
OUTPUT
OE
H
CK
D
X
X
Q
X
Z
L
NO CHANGE*
L
L
L
L
H
H
X : Don‘t Care
Z : High Impedance
2/12
74VCXH16374
LOGIC DIAGRAM
This logic diagram has not to be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
Supply Voltage
-0.5 to +4.6
-0.5 to +4.6
-0.5 to +4.6
V
V
CC
V
DC Input Voltage
I
V
DC Output Voltage (OFF State)
DC Output Voltage (High or Low State) (note 1)
DC Input Diode Current
V
O
V
-0.5 to V + 0.5
V
O
CC
I
- 50
- 50
mA
mA
mA
mA
mW
°C
°C
IK
I
DC Output Diode Current (note 2)
DC Output Current
OK
I
± 50
O
I
or I
DC V or Ground Current per Supply Pin
± 100
400
CC
GND
CC
P
Power Dissipation
D
T
Storage Temperature
Lead Temperature (10 sec)
-65 to +150
300
stg
T
L
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I absolute maximum rating must be observed
O
2) V < GND, V > V
CC
O
O
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
Supply Voltage
2.3 to 3.6
-0.3 to 3.6
0 to 3.6
V
V
CC
V
Input Voltage
I
V
Output Voltage (OFF State)
V
O
V
Output Voltage (High or Low State)
0 to V
V
O
CC
I
I
, I
High or Low Level Output Current (V = 3.0 to 3.6V)
± 24
± 18
mA
mA
°C
ns/V
OH OL
CC
, I
High or Low Level Output Current (V = 2.3 to 2.7V)
OH OL
CC
T
Operating Temperature
-55 to 125
0 to 10
op
dt/dv
Input Rise and Fall Time (note 1)
1) V from 0.8V to 2V at V = 3.0V
IN
CC
3/12
74VCXH16374
DC SPECIFICATIONS (2.7V < V < 3.6V unless otherwise specified)
CC
Test Condition
Value
Symbol
Parameter
-40 to 85 °C
Min. Max.
-55 to 125 °C
Unit
V
(V)
CC
Min.
Max.
V
High Level Input
Voltage
IH
2.0
2.0
2.7 to 3.6
V
V
Low Level Input
Voltage
IL
0.8
0.8
V
High Level Output
Voltage
I =-100 µA
V
-0.2
V
-0.2
2.7 to 3.6
2.7
OH
O
CC
CC
I =-12 mA
2.2
2.4
2.2
2.2
O
V
V
I =-18 mA
2.4
2.2
O
3.0
I =-24 mA
O
V
Low Level Output
Voltage
I =100 µA
2.7 to 3.6
2.7
0.2
0.4
0.2
0.4
OL
O
I =12 mA
O
I =18 mA
0.4
0.4
O
3.0
2.7 to 3.6
3.0
I =24 mA
0.55
0.55
O
I
Input Leakage
Current
I
V = 0 to 3.6V
± 5
± 5
µA
µA
I
I
Input Hold Current
V = 0.8V
75
75
I(HOLD)
I
V = 2V
-75
-75
I
V = 0 to 3.6V
3.6
0
± 500
± 500
I
I
Power Off Leakage
Current
off
V or V = 0 to 3.6V
10
10
µA
µA
I
O
I
High Impedance
Output Leakage
Current
OZ
V = V or V
I
IH
IL
2.7 to 3.6
± 10
± 10
V
= 0 to 3.6V
O
I
Quiescent Supply
Current
V = V or GND
I CC
20
20
CC
2.7 to 3.6
2.7 to 3.6
µA
µA
V or V = V to
I
O
CC
± 20
750
± 20
750
3.6V
∆I
I
incr. per Input
V
= V - 0.6V
CC
CC
IH CC
4/12
74VCXH16374
DC SPECIFICATIONS (2.3V < V < 2.7V unless otherwise specified)
CC
Test Condition
Value
Symbol
Parameter
-40 to 85 °C
Min. Max.
-55 to 125 °C
Unit
V
(V)
CC
Min.
Max.
V
High Level Input
Voltage
IH
1.6
1.6
2.3 to 2.7
V
V
Low Level Input
Voltage
IL
0.7
0.7
V
High Level Output
Voltage
I =-100 µA
V
-0.2
V
-0.2
2.3 to 2.7
2.3
OH
O
CC
CC
I =-6 mA
2.0
1.8
1.7
2.0
O
V
V
I =-12 mA
1.8
1.7
O
I =-18 mA
O
V
Low Level Output
Voltage
I =100 µA
2.3 to 2.7
2.3
0.2
0.4
0.6
0.2
0.4
0.6
OL
O
I =12 mA
O
I =18 mA
O
I
Input Leakage
Current
I
V = 0 to 3.6V
2.3 to 2.7
± 5
± 5
µA
µA
µA
I
I
Input Hold Current
V = 0.7V
45
45
I(HOLD)
I
2.3
0
V = 1.7V
-45
-45
I
I
Power Off Leakage
Current
off
V or V = 0 to 3.6V
10
10
I
O
I
High Impedance
Output Leakage
Current
OZ
V = V or V
I
IH
IL
2.3 to 2.7
2.3 to 2.7
± 10
± 10
µA
µA
V
= 0 to 3.6V
O
I
Quiescent Supply
Current
V = V or GND
I CC
20
20
CC
V or V = V to
I
O
CC
± 20
± 20
3.6V
DYNAMIC SWITCHING CHARACTERISTICS (T = 25°C, Input t = t = 2.0ns, C = 30pF, R = 500Ω)
a
r
f
L
L
Test Condition
Value
= 25 °C
T
Symbol
Parameter
Unit
A
V
CC
(V)
Min.
Typ.
Max.
V
V
Dynamic Low Voltage Quiet
Output (note 1, 3)
2.5
3.3
2.5
3.3
2.5
3.3
V
= 0V
= V
0.6
0.8
OLP
OLV
OHV
IL
IL
IL
V
V
V
V
IH
CC
Dynamic Low Voltage Quiet
Output (note 1, 3)
V
= 0V
= V
-0.6
-0.8
1.9
V
IH
CC
V
Dynamic High Voltage Quiet
Output (note 2, 3)
V
= 0V
= V
V
2.2
IH
CC
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
2) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the HIGH state.
3) Parameters guaranteed by design.
5/12
74VCXH16374
AC ELECTRICAL CHARACTERISTICS (C = 30pF, R = 500Ω, Input t = t = 2.0ns)
L
L
r
f
Test Condition
Value
Symbol
Parameter
-40 to 85 °C
-55 to 125 °C
Unit
V
CC
(V)
Min.
1.0
Max.
3.9
Min.
Max.
t
t
Propagation Delay
Time CK to Qn
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
2.3 to 2.7
3.0 to 3.6
1.0
0.8
1.0
0.8
1.0
0.8
1.5
1.5
1.0
1.0
1.5
1.5
180
235
4.7
3.5
5.1
4.3
4.6
4.3
PLH PHL
ns
ns
0.8
1.0
0.8
1.0
0.8
1.5
1.5
1.0
1.0
1.5
1.5
200
250
3.0
4.6
3.5
3.8
3.5
t
t
Output Enable Time
PZL PZH
t
t
Output Disable Time
PLZ PHZ
ns
t
Setup TIme, HIGH or
LOW level Dn to CK
s
ns
t
Hold Time High or
LOW level Dn to CK
h
ns
t
CK Pulse Width,
HIGH
w
ns
f
Clock Pulse
Frequency
MAX
MHz
ns
t
t
Output To Output
Skew Time (note1, 2)
0.5
0.5
0.5
0.5
OSLH OSHL
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
2) Parameter guaranteed by design
= | t
- t
|, t
= | t
- t
|)
OSLH
PLHm PLHn OSHL
PHLm PHLn
CAPACITIVE CHARACTERISTICS
Test Condition
Value
T
= 25 °C
Symbol
Parameter
Unit
A
V
CC
(V)
Min.
Typ.
Max.
C
Input Capacitance
Output Capacitance
V
V
= 0 or V
= 0 or V
2.5 or 3.3
2.5 or 3.3
2.5 or 3.3
6
7
pF
pF
pF
IN
IN
CC
C
OUT
IN
CC
C
Power Dissipation Capacitance
(note 1)
f
= 10MHz
20
PD
IN
V
= 0 or V
CC
IN
1) C is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
PD
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
circuit)
= C x V x f + I /16 (per
CC(opr)
PD CC IN CC
6/12
74VCXH16374
TEST CIRCUIT
TEST
SWITCH
t
t
t
t
, t
Open
6V
PLH PHL
, t
(V = 3.0 to 3.6V)
CC
PZL PLZ
, t
(V = 2.3 to 2.7V)
2V
CC
PZL PLZ
CC
, t
GND
PZH PHZ
C
R
R
= 30 pF or equivalent (includes jig and probe capacitance)
L
L
T
= R1 = 500Ω or equivalent
= Z
of pulse generator (typically 50Ω)
OUT
WAVEFORM SYMBOL VALUES
Symbol
V
CC
3.0 to3.6V
2.3 to 2.7V
V
V
2.7V
1.5V
IH
CC
V
V
/2
M
CC
V
V
V
+ 0.3V
- 0.3V
V
OL
+ 0.15V
- 0.15V
X
Y
OL
V
V
OH
OH
7/12
74VCXH16374
WAVEFORM 1 : nCK TO Qn PROPAGATION DELAYS, nCK MAXIMUM FREQUENCY, Dn TO nCK
SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle)
WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
8/12
74VCXH16374
WAVEFORM 3 : nCK MINIMUM PULSE WIDTH (f=1MHz; 50% duty cycle)
9/12
74VCXH16374
TSSOP48 MECHANICAL DATA
mm.
inch
TYP.
DIM.
MIN.
TYP
MAX.
1.2
MIN.
MAX.
0.047
0.006
A
A1
A2
b
0.05
0.15
0.002
0.9
0.035
0.17
0.09
12.4
0.27
0.20
12.6
0.0067
0.0035
0.488
0.011
0.0079
0.496
c
D
E
8.1 BSC
0.5 BSC
0.318 BSC
E1
e
6.0
6.2
0.236
0.244
0.0197 BSC
K
0˚
8˚
0˚
8˚
L
0.50
0.75
0.020
0.030
A2
A
K
L
b
e
A1
E
c
D
E1
PIN 1 IDENTIFICATION
1
7065588C
10/12
74VCXH16374
Tape & Reel TSSOP48 MECHANICAL DATA
mm.
TYP
inch
TYP.
DIM.
MIN.
MAX.
330
MIN.
MAX.
12.992
0.519
A
C
12.8
20.2
60
13.2
0.504
0.795
2.362
D
N
T
30.4
8.9
1.197
0.350
0.524
0.067
0.161
0.476
Ao
Bo
Ko
Po
P
8.7
13.1
1.5
0.343
0.516
0.059
0.153
0.468
13.3
1.7
3.9
4.1
11.9
12.1
11/12
74VCXH16374
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics
© 2003 STMicroelectronics - Printed in Italy - All Rights Reserved
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12/12
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