CXM3560XR_技术文档

SP10T Antenna Switch for GSM/UMTS Dual Mode Handsets

CXM3560XR

Description

The CXM3560XR is SP10T antenna switch for GSM/UMTS dual mode handsets.

The CXM3560XR has a 1.8V CMOS compatible decoder.

The Sony GaAs junction gate pHEMT (JPHEMT) MMIC process is used for low insertion loss and high linearity.

(Applications: GSM (4bands) and UMTS (4bands) Dual-Mode Handsets)

Features

Low Insertion Loss:

0.30dB (Typ.) Tx1 (GSM Low Band Tx)

0.45dB (Typ.) Tx2 (GSM High Band Tx)

0.60dB (Typ.) TRx1 (UMTS Band I)

Low Voltage Operation:VDD = 2.5V

No DC Blocking Capacitors required on RF ports

Small package size: XQFN-24P-02 (2.2mm × 2.9mm × 0.4mm Max.)

Lead-Free and RoHS Compliant

Structure

GaAs Junction Gate pHEMT (JPHEMT) MMIC Switch, CMOS Decoder

Absolute Maximum Ratings

°

(Ta = 25 C)

Bias voltage

V^DD

Vctl

4

V

Control voltage (CTL-A/B/C/D)

Input power max. [Tx1]

4

V

36

34

dBm (Duty cycle = 12.5 to 50%)

Input power max. [Tx2]

dBm (Duty cycle = 12.5 to 50%)

Input power max. [TRx1, 2, 3, 4]

Input power max. [Rx1, 2, 3, 4]

Operating temperature range

Storage temperature range

32

dBm

13

°

C

–35 to +85

–65 to +150

°

C

Note on Handling

GaAs MMIC’s are ESD sensitive devices. Special handling precautions are required.

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license

by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating

the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

E09411

- 1 -

CXM3560XR

Block Diagram

SP10T Antenna Switch

TRx1

TRx2

TRx3

TRx4

Tx1

Ant

Decoder Logic

Tx2

Rx1

Rx2

Rx3

Rx4

Pin Configuration

12

8

11 10

9

GND 13

7

6

5

4

3

2

1

GND

TRx4

GND

TRx3

GND

TRx2

GND

Rx1 14

Rx2 15

24-pin XQFN

(2.2mm × 2.9mm

× 0.4mm Max.)

Top View

Rx3

Rx4

16

17

18

19

TRx1

GND

20

24

21 22 23

- 2 -

CXM3560XR

Pin Description

Pin No.

Name

Pin No.

13

Name

1

2

GND

TRx2

GND

TRx3

GND

TRx4

GND

Ant

GND

Rx1

14

3

15

Rx2

4

16

Rx3

5

17

Rx4

6

18

TRx1

GND

V^DD

7

19

8

20

9

GND

21

CTLD

CTLC

CTLB

CTLA

10

11

12

Tx2 (DCS/PCS)

GND

22

23

Tx1 (GSM850/900M)

24

- 3 -

CXM3560XR

RF Switch

Ant

F1

F2

F14

F7

F16

F17

F18

F19

F20

F21

F10

F9

F6

F3

F4 F5

Tx1

Tx2

Rx1 Rx2 Rx3 Rx4

TRx1

TRx2

TRx3

TRx4

Truth Table

Vctl State

Switch State

F1 F2 F3 F4 F5 F6 F7 F9 F10 F14 F16 F17 F18 F19 F20 F21

Active

Path

State

A

H

L

B

H

L

C

L

D

1

2

Tx1

Tx2

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

H

L

3

Rx1

L

H

L

4

Rx2

L

H

L

5

Rx3

L

H

L

6

Rx4

L

7

TRx1

TRx2

TRx3

TRx4

H

8

H

L

9

L

H

10

H

L

H

- 4 -

CXM3560XR

Electrical Characteristics

Supply Voltage Value

°

(Ta = 25 C)

Item

Min.

+2.5

Typ.

Max.

+3.3

Unit

V

Bias voltage (V^DD)

+2.65

Logic Value

°

(Ta = 25 C)

Item

State

Min.

+1.5

0

Typ.

+1.8

—

Max.

+3.3

+0.3

Unit

V

High

Low

Control voltage

(CTL-A/B/C/D)

- 5 -

CXM3560XR

Specification 1

°

(Ta = 25 C, VDD = 2.5V, Vctl = 1.5V)

Item

Symbol

Port

Condition

Min. Typ. Max.

Unit

*1

*2

*3

*4

*3

*4

*3

*4

*3

*4

*5

*6

*5

*6

*7

*8

*9

*10

*7

*8

*9

*10

*7

*8

*9

*10

Ant-Tx1

Ant-Tx2

—

0.30 0.45

0.45 0.60

0.75 0.90

1.00 1.15

0.75 0.90

1.00 1.15

0.75 0.90

1.00 1.15

0.75 0.90

1.00 1.15

0.55 0.70

0.60 0.75

0.68 0.83

0.45 0.60

0.57 0.72

0.60 0.75

0.45 0.60

0.60 0.75

0.62 0.77

0.40 0.55

0.65 0.80

0.66 0.81

Ant-Rx1

Ant-Rx2

Ant-Rx3

Ant-Rx4

Ant-TRx1

Insertion loss

IL

dB

Ant-TRx2

Ant-TRx3

Ant-TRx4

VSWR

2fo

3fo

2fo

3fo

2fo

3fo

2fo

3fo

2fo

3fo

2fo

3fo

All ports in Active Paths

Tx1-Ant

824 to 2170MHz

1.20

–50

–40

–45

–40

–55

–54

–65

–58

–65

–58

–65

–58

—

–36

–35

–36

–33

–39

*1

*2

*5

Tx2-Ant

TRx1-Ant

TRx2-Ant

TRx3-Ant

TRx4-Ant

Harmonics

dBm

*7 *9

,

*7 *9

,

*7

- 6 -

CXM3560XR

Item

Symbol

IMD2

Port

Condition

*11 *19

Min. Typ. Max.

Unit

TRx1-Ant

TRx2-Ant

,

—

–105 –97

*12 *19

,

*13 *19

,

*14 *19

,

*12 *19

,

*13 *19

TRx3-Ant

,

*14 *19

,

Intermodulation

product power

in Rx band

*14 *19

TRx4-Ant

TRx1-Ant

,

dBm

*15 *19

,

*16 *19

,

*17 *19

TRx2-Ant

,

*18 *19

,

IMD3

*16 *19

,

*17 *19

TRx3-Ant

TRx4-Ant

,

*18 *19

,

*18 *19

,

Switching time

Control current

Supply current

Ts

50%Ctl to 90%RF

Vctl = 1.80V

3

1

5

μS

μA

mA

Ictl

Idd

V^DD= 2.65V

0.18 0.40

Electrical Characteristics are measured with all RF ports terminated in 50Ω.

*1

Pin on Tx1: 34dBm, 824 to 915MHz, Tx1 enabled

*2

Pin on Tx2: 32dBm, 1710 to 1910MHz, Tx2 enabled

*3

Pin on Ant: 10dBm, 869 to 960MHz, Rx1, Rx2, Rx3 or Rx4 enabled

*4

Pin on Ant: 10dBm, 1805 to 1990MHz, Rx1, Rx2, Rx3 or Rx4 enabled

*5

Pin on TRx1 or TRx2: 26dBm, 1920 to 1980MHz, TRx1 or TRx2 enabled

*6

Pin on Ant: 10dBm, 2110 to 2170MHz, TRx1 or TRx2 enabled

*7

Pin on TRx2, TRx3 or TRx4: 26dBm, 824 to 849MHz, TRx2, TRx3 or TRx4 enabled

Pin on Ant: 10dBm, 869 to 894MHz, TRx2, TRx3 or TRx4 enabled

*8

*9

Pin on TRx2, TRx3 or TRx4: 26dBm, 1710 to 1910MHz, TRx2, TRx3 or TRx4 enabled

Pin on Ant: 10dBm, 1805 to 1990MHz, TRx2, TRx3 or TRx4 enabled

*10

*11

*12

*13

*14

*15

*16

*17

*18

*19

Pin on TRx1: 20dBm, 1950MHz, Pin on Ant: –15dBm, 190MHz, TRx1 enabled

Pin on TRx2 or TRx3: 20dBm, 1745MHz, Pin on Ant: –15dBm, 95MHz, TRx2 or TRx3 enabled

Pin on TRx2 or TRx3: 20dBm, 1880MHz, Pin on Ant: –15dBm, 80MHz, TRx2 or TRx3 enabled

Pin on TRx2, TRx3 or TRx4: 20dBm, 835MHz, Pin on Ant: –15dBm, 45MHz, TRx2, TRx3 or TRx4 enabled

Pin on TRx1: 20dBm, 1950MHz, Pin on Ant: –15dBm, 1760MHz, TRx1 enabled

Pin on TRx2 or TRx3: 20dBm, 1745MHz, Pin on Ant: –15dBm, 1650MHz, TRx2 or TRx3 enabled

Pin on TRx2 or TRx3: 20dBm, 1880MHz, Pin on Ant: –15dBm, 1800MHz, TRx2 or TRx3 enabled

Pin on TRx2, TRx3 or TRx4: 20dBm, 835MHz, Pin on Ant: –15dBm, 790MHz, TRx2, TRx3 or TRx4 enabled

Measured with the recommended circuit

- 7 -

CXM3560XR

Specification 1-Isolation

°

(Ta = 25 C, VDD = 2.5V, Vctl = 1.5V)

Path

Isolation

Item

Symbol

Condition

Min. Typ. Max.

Unit

Active

Tx1-Rx1

35

25

18

35

20

16

30

20

27

23

17

20

50

55

30

48

50

35

25

55

45

23

38

40

30

19

53

48

40

24

35

40

30

19

33

—

Tx1-Rx2

Tx1-Rx3

Tx1-Rx4

Tx1-TRx1

Tx1-TRx2

Tx1-TRx3

Tx1-TRx4

Tx1-Tx2

824 to 915MHz

Tx1

Tx1-Tx2

1648 to 1830MHz

1710 to 1910MHz

Tx2-Rx1

Tx2-Rx2

Tx2-Rx3

Tx2-Rx4

Isolation

ISO

dB

Tx2

Tx2-TRx1

Tx2-TRx2

Tx2-TRx3

Tx2-TRx4

Tx2-Tx1

TRx1-Rx1

TRx1-Rx2

TRx1-Rx3

TRx1-Rx4

TRx1-TRx2

TRx1-TRx3

TRx1-TRx4

TRx1-Tx1

TRx1-Tx2

TRx1

1920 to 1980MHz

- 8 -

CXM3560XR

Path

Isolation

Item

Symbol

Condition

Min. Typ. Max.

Unit

Active

TRx2-Rx1

TRx2-Rx2

TRx2-Rx3

TRx2-Rx4

TRx2-TRx1

TRx2-TRx3

TRx2-TRx4

TRx2-Tx1

TRx2-Tx2

TRx2-Rx1

TRx2-Rx2

TRx2-Rx3

TRx2-Rx4

TRx2-TRx1

TRx2-TRx3

TRx2-TRx4

TRx2-Tx1

TRx2-Tx2

TRx3-Rx1

TRx3-Rx2

TRx3-Rx3

TRx3-Rx4

TRx3-TRx1

TRx3-TRx2

TRx3-TRx4

TRx3-Tx1

TRx3-Tx2

TRx3-Rx1

TRx3-Rx2

TRx3-Rx3

TRx3-Rx4

TRx3-TRx1

TRx3-TRx2

TRx3-TRx4

TRx3-Tx1

TRx3-Tx2

TRx4-Rx1

TRx4-Rx2

TRx4-Rx3

TRx4-Rx4

TRx4-TRx1

TRx4-TRx2

TRx4-TRx3

TRx4-Tx1

TRx4-Tx2

30

20

30

18

17

20

30

20

30

18

17

20

35

20

35

30

20

30

62

55

30

35

27

45

58

55

45

23

24

28

19

34

62

57

30

35

32

26

45

57

58

55

45

23

29

25

19

33

62

57

30

42

35

27

45

—

824 to 849MHz

TRx2

1710 to 1910MHz

824 to 849MHz

1710 to 1910MHz

824 to 849MHz

Isolation

ISO

dB

TRx3

TRx4

Electrical Characteristics are measured with all RF ports terminated in 50Ω.

- 9 -

CXM3560XR

Recommended Circuit

C1

L1

12 11 10

9

8

13

14

15

16

17

18

19

7

6

5

4

3

2

1

TRx4

TRx3

TRx2

Rx1

Rx2

24-pin XQFN

(2.2mm × 2.9mm

× 0.4mm Max.)

Top View

Rx3

Rx4

TRx1

20

24

21 22 23

C2

C2 100pF

Note) 1. No DC blocking Capacitors are required on all RF ports.

2. DC levels of all RF ports are GND.

3. L1 Inductor(22nH) and C1 Capacitor(22pF) are recommended on Ant port for ESD protection.

4. C2 Capacitor (100pF) is recommended.

- 10 -

CXM3560XR

PCB Layout Template

XQFN-24P-02 Macro for MMIC (Reference)

Specification

• PKG size:

2.9mm × 2.2mm t0.35mm

• Terminal pitch: 0.35mm

• Terminal length: 0.25mm

• Mask thickness: 0.11mm

3.3

2.9 (PKG size)

1.8

0.35

Detail A

0.28

0.2

0.28

0.2

R0.05

C0.1

R0.05

C0.05

PKG Outline

0.35

Detail A

: Land area

: Mask open area (Solder printing area)

: Metal area in board (GND plane is recommended.)

: Board resist open area

: PKG outline

- 11 -

CXM3560XR

Package Outline

(Unit: mm)

LEAD PLATING SPECIFICATIONS

ITEM

SPEC.

LEAD MATERIAL

COPPER ALLOY

Sn-Bi Bi:1-4wt%

5-18µm

SOLDER COMPOSITION

PLATING THICKNESS

Sony Corporation

- 12 -


型号：	CXM3560XR
厂家：	SONY CORPORATION
描述：	SP10T Antenna Switch for GSM/UMTS Dual Mode Handsets SP10T天线开关，用于GSM / UMTS双模手机开关电信集成电路电信电路手机 GSM
文件：	总12页 (文件大小：232K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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