EMC1413 [SMSC]
Multiple Channel 1 Temperature Sensors with Beta Compensation; 多通道1温度传感器，带有beta补偿
| 型号： | EMC1413 |
| 厂家： | 
SMSC CORPORATION |
| 描述： | Multiple Channel 1 Temperature Sensors with Beta Compensation |
| 文件： | 总52页 (文件大小：897K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EMC1413 / EMC1414
Multiple Channel 1°C
Temperature Sensors with
Beta Compensation
Datasheet
PRODUCT FEATURES
General Description
Applications
Notebook Computers
Desktop Computers
Industrial
The EMC1413 / EMC1414 are high accuracy, low cost,
System Management Bus (SMBus) temperature
sensors. Advanced features such as Resistance Error
Correction (REC), Beta Compensation (to support CPU
diodes requiring the BJT/transistor model including
45nm, 65nm and 90nm processors) and automatic
diode type detection combine to provide a robust
solution for complex environmental monitoring
applications.
Embedded applications
Features
Programmable SMBus address
Support for diodes requiring the BJT/transistor model
—
supports 45nm, 65nm, and 90nm CPU thermal diodes
Automatically determines external diode type and
optimal settings
Resistance Error Correction
The EMC1413 monitors three temperature channels and
the EMC1414 monitors four temperature channels. It
provides ±1°C accuracy for both external and internal
diode temperatures.
Up to 3 External Temperature Monitors
—
—
—
—
±1°C max accuracy (20°C < TDIODE < 110°C)
0.125°C resolution
Supports up to 2.2nF diode filter capacitor
Anti-parallel diodes for extra diode support (EMC1414
only)
Resistance Error Correction automatically eliminates the
temperature error caused by series resistance allowing
greater flexibility in routing thermal diodes. Beta
Compensation eliminates temperature errors caused by
low, variable beta transistors common in today's fine
geometry processors. The automatic beta detection
feature monitors each external diode/transistor and
determines the optimum sensor settings for accurate
temperature measurements regardless of processor
technology. This frees the user from providing unique
sensor configurations for each temperature monitoring
application. These advanced features plus ±1°C
measurement accuracy provide a low-cost, highly
flexible and accurate solution for critical temperature
monitoring applications.
Internal Temperature Monitor
—
—
±1°C accuracy
0.125°C resolution
3.3V Supply Voltage
Programmable temperature limits for ALERT
Available in these lead-free RoHS compliant
packages
—
—
10-pin 3mm x 3mm DFN
10-pin MSOP
SMSC EMC1413 / EMC1414
DATASHEET
Revision 1.41 (02-23-12)
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Ordering Information:
SMBUS
ADDRESS
ORDERING NUMBER
PACKAGE
FEATURES
EMC1413-1-AIZL-TR
10-pin MSOP
(lead-free RoHS compliant)
Up to three temperature sensors, ALERT and
THERM pins, fixed SMBus address
1001_100(r/w)
EMC1413-A-AIZL-TR
EMC1413-A-AIA-TR
EMC1413-3-AIZL-TR
EMC1414-1-AIZL-TR
EMC1414-A-AIZL-TR
EMC1414-A-AIA-TR
10-pin MSOP
(lead-free RoHS compliant)
Up to three temperature sensors, ALERT and
THERM pins, programmable SMBus address
Selectable via
THERM pull-up
10-pin DFN 3mm x 3mm
(lead-free RoHS compliant)
Up to three temperature sensors, ALERT and
THERM pins, programmable SMBus address
Selectable via
THERM pull-up
10-pin MSOP
(lead-free RoHS compliant)
Up to three temperature sensors, ALERT and
THERM pins, programmable SMBus address
0011_000(r/w)
10-pin MSOP
(lead-free RoHS compliant)
Up to four temperature sensors, ALERT and
THERM pins, fixed SMBus address
1001_100(r/w)
10-pin MSOP
(lead-free RoHS compliant)
Up to four temperature sensors, ALERT and
THERM pins, programmable SMBus address
Selectable via
THERM pull-up
10-pin DFN 3mm x 3mm
(lead-free RoHS compliant)
Up to four temperature sensors, ALERT and
THERM pins, programmable SMBus address
Selectable via
THERM pull-up
REEL SIZE IS 4,000 PIECES
This product meets the halogen maximum concentration values per IEC61249-2-21
For RoHS compliance and environmental information, please visit www.smsc.com/rohs
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 (631) 435-6000 or 1 (800) 443-SEMI
Copyright © 2012 SMSC or its subsidiaries. All rights reserved.
Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
Revision 1.41 (02-23-12)
2
SMSC EMC1413 / EMC1414
DATASHEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Table of Contents
Chapter 1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Chapter 2 Delta . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1
Functional Delta from EMC1413 / EMC1414 rev A to rev B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Chapter 3 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Chapter 4 Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.1
4.2
4.3
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
SMBus Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Chapter 5 System Management Bus Interface Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.1
Communications Protocol. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.1.1
5.1.2
5.1.3
5.1.4
5.1.5
5.1.6
5.1.7
5.1.8
SMBus Start Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
SMBus Address and RD / WR Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
THERM Pin Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SMBus Data Bytes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SMBus ACK and NACK Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
SMBus Stop Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
SMBus Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2
SMBus and I C Compatibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2
5.3
SMBus Protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2.1
5.2.2
5.2.3
5.2.4
Write Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Read Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Send Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Receive Byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Alert Response Address. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Chapter 6 Product Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.1
Modes of Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.1.1
6.1.2
Conversion Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Dynamic Averaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.2
6.3
THERM Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ALERT Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3.1
6.3.2
ALERT Pin Interrupt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
ALERT Pin Comparator Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.4
Temperature Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.4.1
6.4.2
6.4.3
Beta Compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Resistance Error Correction (REC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Programmable External Diode Ideality Factor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.5
6.6
6.7
6.8
6.9
Diode Faults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Consecutive Alerts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Digital Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Temperature Measurement Results and Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Anti-parallel Diode Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
6.10 External Diode Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Chapter 7 Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.1
Data Read Interlock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
SMSC EMC1413 / EMC1414
3
Revision 1.41 (02-23-12)
DATASHEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
7.2
7.3
7.4
7.5
7.6
7.7
7.8
7.9
Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Conversion Rate Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Scratchpad Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
One Shot Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Therm Limit Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
7.10 External Diode Fault Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7.11 Channel Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
7.12 Consecutive ALERT Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
7.13 Beta Configuration Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
7.14 External Diode Ideality Factor Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
7.15 High Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
7.16 Low Limit Status Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.17 Therm Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
7.18 Filter Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.19 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.20 SMSC ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
7.21 Revision Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Chapter 8 Typical Operating Curves. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Chapter 9 Package Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
9.1
Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Chapter 10 Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Revision 1.41 (02-23-12)
4
SMSC EMC1413 / EMC1414
DATASHEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
List of Figures
Figure 1.1 EMC1413 / EMC1414 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3.1 EMC1413 / 1414 Pin Diagram, MSOP-10 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3.2 EMC1413 / EMC1414 Pin Diagram, DFN-10. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 5.1 SMBus Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5.2 Isolating THERM Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 6.1 System Diagram for EMC1414 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 6.2 System Diagram for EMC1413 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 6.3 Temperature Filter Step Response . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 6.4 Temperature Filter Impulse Response. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 6.5 Diode Configurations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 9.1 10-Pin MSOP / TSSOP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 9.2 10-Pin DFN Package Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 9.3 10-Pin DFN Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 9.4 10 Pin DFN PCB Footprint. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Figure 9.5 EMC1414-A 10-Pin DFN Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 9.6 EMC1414 10-Pin MSOP Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Figure 9.7 EMC1413-A 10-Pin DFN Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 9.8 EMC1413 10-Pin MSOP Package Markings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
SMSC EMC1413 / EMC1414
5
Revision 1.41 (02-23-12)
DATASHEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
List of Tables
Table 3.1 EMC1413 / EMC1414 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 3.2 Pin Types. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 4.1 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Table 4.2 Electrical Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Table 4.3 SMBus Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Table 5.1 SMBus Address Decode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Table 5.2 Protocol Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 5.3 Write Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5.4 Read Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5.5 Send Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5.6 Receive Byte Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5.7 Alert Response Address Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 6.1 Supply Current vs. Conversion Rate for EMC1413 / EMC1414 . . . . . . . . . . . . . . . . . . . . . . . 20
Table 6.2 Temperature Data Format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 7.1 Register Set in Hexadecimal Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 7.2 Temperature Data Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 7.3 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 7.4 Configuration Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 7.5 Conversion Rate Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 7.6 Conversion Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 7.7 Temperature Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Table 7.8 Scratchpad Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 7.9 One Shot Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 7.10 Therm Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 7.11 External Diode Fault Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 7.12 Channel Mask Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 7.13 Consecutive ALERT Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Table 7.14 Consecutive Alert / Therm Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 7.15 Beta Configuration Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 7.16 CPU Beta Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 7.17 Ideality Configuration Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 7.18 Ideality Factor Look-Up Table (Diode Model) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 7.19 Substrate Diode Ideality Factor Look-Up Table (BJT Model) . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 7.20 High Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 7.21 Low Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 7.22 Therm Limit Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 7.23 Filter Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 7.24 FILTER Decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 7.25 Product ID Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 7.26 Manufacturer ID Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 7.27 Revision Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 10.1 Customer Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Revision 1.41 (02-23-12)
6
SMSC EMC1413 / EMC1414
DATASHEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Chapter 1 Block Diagram
VDD
EMC1413/ EMC1414
* EMC1414 only
Conversion Rate Register
Switching
Current
Low Limit Registers
High Limit Registers
THERM Limit Register
SMCLK
DP1
DN1
Analog
Mux
SMDATA
External Temperature
Register(s)
DP2 / DN3*
ΔΣ ADC
DN2 / DP3*
Anti-parallel
Diodes
THERM Hysteresis Register
Internal
Temperature Register
Internal Temp
Diode
Interupt Masking
Configuration Register
ALERT
SMBus Address Decode
THERM / ADDR
Status Registers
GND
Figure 1.1 EMC1413 / EMC1414 Block Diagram
Chapter 2 Delta
2.1
Functional Delta from EMC1413 / EMC1414 rev A to rev B
1. Updated revision number to 04h.
SMSC EMC1413 / EMC1414
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
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Chapter 3 Pin Description
EMC1413
EMC1414
VDD
DP1
DN1
DP2
DN2
1
2
3
4
5
10
9
SMCLK
VDD
DP1
1
2
3
4
5
10
9
SMCLK
SMDATA
ALERT
SMDATA
ALERT
8
DN1
8
7
THERM / ADDR
GND
DP2 / DN3
DN2 / DP3
7
THERM / ADDR
GND
6
6
Figure 3.1 EMC1413 / 1414 Pin Diagram, MSOP-10
EMC1413
EMC1414
VDD
1
10 SMCLK
VDD
DP1
1
2
3
4
5
10 SMCLK
DP1
DN1
DP2
DN2
2
3
4
5
9
8
7
6
SMDATA
ALERT
9
8
7
6
SMDATA
ALERT
Exposed
pad
Exposed
pad
DN1
THERM / ADDR
GND
DP2 / DN3
DN2 / DP3
THERM / ADDR
GND
Figure 3.2 EMC1413 / EMC1414 Pin Diagram, DFN-10
Table 3.1 EMC1413 / EMC1414 Pin Description
PIN NUMBER
NAME
FUNCTION
TYPE
1
2
3
VDD
DP1
DN1
Power supply
Power
AIO
External diode 1 positive (anode) connection
External diode 1 negative (cathode) connection
AIO
External diode 2 positive (anode) connection /
External Diode 3 negative (cathode) connection
for anti-parallel diodes (EMC1414 only)
4
DP2 / DN3
AIO
External diode 2 negative (cathode) connection /
External Diode 3 positive (anode) connection for
anti-parallel diodes (EMC1414 only)
5
6
DN2 / DP3
GND
AIO
Ground
Power
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Table 3.1 EMC1413 / EMC1414 Pin Description (continued)
PIN NUMBER
NAME
FUNCTION
TYPE
THERM - Critical THERM output signal - requires
pull-up resistor
OD (5V)
7
THERM / ADDR
ADDR - Selects SMBus address based on pull-
up resistor
OD (5V)
OD (5V)
Active low digital ALERT output signal - requires
pull-up resist
8
ALERT
SMBus Data input/output - requires pull-up
resistor
9
10
SMDATA
SMCLK
DIOD (5V)
SMBus Clock input - requires pull-up resistor
DI (5V)
-
Not internally connected, but recommend
grounding.
Bottom Pad
Exposed Pad
APPLICATION NOTE: For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA, THERM, and
ALERT), the voltage difference between VDD and the pull-up voltage must never exceed
3.6V.
The pin types are described Table 3.2.
Table 3.2 Pin Types
PIN TYPE
DESCRIPTION
Power
AIO
This pin is used to supply power or ground to the device.
Analog Input / Output -This pin is used as an I/O for analog signals.
Digital Input - This pin is used as a digital input. This pin is 5V tolerant.
DI
DIOD
Digital Input / Open Drain Output - This pin is used as a digital I/O. When it is used as
an output, it is open drain and requires a pull-up resistor. This pin is 5V tolerant.
OD
Open Drain Digital Output - This pin is used as a digital output. It is open drain and
requires a pull-up resistor. This pin is 5V tolerant.
SMSC EMC1413 / EMC1414
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Chapter 4 Electrical Specifications
4.1
Absolute Maximum Ratings
Table 4.1 Absolute Maximum Ratings
DESCRIPTION
RATING
UNIT
Supply Voltage (VDD
)
-0.3 to 4.0
-0.3 to 5.5
V
V
Voltage on 5V tolerant pins (V5VT_pin
)
Voltage on 5V tolerant pins (|V5VT_pin - VDD|) (see Note 4.1)
Voltage on any other pin to Ground
Operating Temperature Range
0 to 3.6
V
-0.3 to VDD +0.3
-40 to +125
V
°C
°C
Storage Temperature Range
-55 to +150
Lead Temperature Range
Refer to JEDEC Spec. J-STD-020
Package Thermal Characteristics for MSOP-10
Thermal Resistance (θj-a
)
132.2
°C/W
Package Thermal Characteristics for DFN-10
Thermal Resistance (θj-a
)
77.1
°C/W
V
ESD Rating, All pins HBM
2000
Note: Stresses at or above those listed could cause permanent damage to the device. This is a stress
rating only and functional operation of the device at any other condition above those indicated
in the operation sections of this specification is not implied.
Note 4.1 For the 5V tolerant pins that have a pull-up resistor (SMCLK, SMDATA, THERM, and
ALERT), the pull-up voltage must not exceed 3.6V when the device is unpowered.
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
4.2
Electrical Specifications
Table 4.2 Electrical Specifications
VDD = 3.0V to 3.6V, TA = -40°C to 125°C, all typical values at TA = 27°C unless otherwise noted.
CHARACTERISTIC
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
DC Power
Supply Voltage
Supply Current
VDD
IDD
3.0
3.3
3.6
V
430
850
µA
1 conversion / sec, dynamic
averaging disabled
930
1120
170
1200
230
µA
µA
µA
4 conversions / sec, dynamic
averaging enabled
> 16 conversions / sec, dynamic
averaging enabled
Standby Supply Current
IDD
Device in Standby mode, no SMBus
communications, ALERT and
THERM pins not asserted.
Internal Temperature Monitor
Temperature Accuracy
Temperature Resolution
Temperature Accuracy
±0.25
±1
±2
°C
°C
°C
-5°C < TA < 100°C
-40°C < TA < 125°C
0.125
External Temperature Monitor
±0.25
±1
±2
°C
+20°C < TDIODE < +110°C
0°C < TA < 100°C
±0.5
0.125
150
°C
°C
ms
-40°C < TDIODE < 127°C
Temperature Resolution
Conversion Time all
Channels
tCONV
default settings
Capacitive Filter
CFILTER
2.2
2.7
nF
Connected across external diode
ALERT and THERM pins
V
Output Low Voltage
Leakage Current
VOL
0.4
ISINK = 8mA
ILEAK
±5
µA
ALERT and THERM pins
Device powered or unpowered
TA < 85°C
pull-up voltage < 3.6V
SMSC EMC1413 / EMC1414
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
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4.3
SMBus Electrical Characteristics
Table 4.3 SMBus Electrical Specifications
VDD = 3.0V to 3.6V, TA = -40°C to 125°C, all typical values are at TA = 27°C unless otherwise noted.
CHARACTERISTIC
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
SMBus Interface
Input High Voltage
Input Low Voltage
Leakage Current
VIH
2.0
VDD
0.8
±5
V
5V Tolerant
5V Tolerant
VIL
-0.3
V
ILEAK
µA
Powered or unpowered
TA < 85°C
Hysteresis
420
mV
pF
Input Capacitance
CIN
5
Output Low Sink Current IOL
8.2
10
15
SMBus Timing
400
mA
SMDATA = 0.4V
Clock Frequency
fSMB
kHz
ns
Spike Suppression
tSP
50
Bus Free Time Stop to
Start
tBUF
1.3
µs
Hold Time: Start
Setup Time: Start
Setup Time: Stop
Data Hold Time
tHD:STA
tSU:STA
tSU:STO
tHD:DAT
tHD:DAT
tSU:DAT
tLOW
0.6
0.6
0.6
0
µs
µs
µs
µs
µs
ns
µs
µs
ns
ns
pF
When transmitting to the master
When receiving from the master
Data Hold Time
0.3
100
1.3
0.6
Data Setup Time
Clock Low Period
Clock High Period
Clock/Data Fall time
Clock/Data Rise time
Capacitive Load
tHIGH
tFALL
300
300
400
Min = 20+0.1CLOAD ns
Min = 20+0.1CLOAD ns
per bus line
tRISE
CLOAD
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Chapter 5 System Management Bus Interface Protocol
5.1
Communications Protocol
The EMC1413 / EMC1414 communicates with a host controller, such as an SMSC SIO, through the
SMBus. The SMBus is a two-wire serial communication protocol between a computer host and its
peripheral devices. A detailed timing diagram is shown in Figure 5.1.
For the first 15ms after power-up the device may not respond to SMBus communications.
.
T
T
T
T
SU:STO
LOW
HIGH
HD:STA
T
FALL
SMCLK
T
RISE
T
T
SU:DAT
SU:STA
T
HD:DAT
T
HD:STA
SMDATA
TBUF
S
S
P
P
S - Start Condition
P - Stop Condition
Figure 5.1 SMBus Timing Diagram
5.1.1
5.1.2
SMBus Start Bit
The SMBus Start bit is defined as a transition of the SMBus Data line from a logic ‘1’ state to a logic
‘0’ state while the SMBus Clock line is in a logic ‘1’ state.
SMBus Address and RD / WR Bit
The SMBus Address Byte consists of the 7-bit client address followed by the RD / WR indicator bit. If
this RD / WR bit is a logic ‘0’, the SMBus Host is writing data to the client device. If this RD / WR bit
is a logic ‘1’, the SMBus Host is reading data from the client device.
The EMC1413-A and EMC1414-A SMBus slave address is determined by the pull-up resistor on the
THERM pin as shown in Table 5.1, "SMBus Address Decode".
The Address decode is performed by pulling known currents from VDD through the external resistor
causing the pin voltage to drop based on the respective current / resistor relationship. This pin voltage
is compared against a threshold that determines the value of the pull-up resistor.
Table 5.1 SMBus Address Decode
PULL UP RESISTOR ON
THERM PIN (±5%)
SMBUS ADDRESS
4.7k
6.8k
10k
1111_100(r/w)b
1011_100(r/w)b
1001_100(r/w)b
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
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Table 5.1 SMBus Address Decode (continued)
PULL UP RESISTOR ON
THERM PIN (±5%)
SMBUS ADDRESS
15k
22k
33k
1101_100(r/w)b
0011_100(r/w)b
0111_100(r/w)b
The EMC1413-1 SMBus address is hard coded to 1001_100(r/w).
The EMC1413-3 SMBus address is hard coded to 0011_000(r/w).
The EMC1414-1 SMBus address is hard coded to 1001_100(r/w).
5.1.3
THERM Pin Considerations
Because of the decode method used to determine the SMBus Address, it is important that the pull-up
resistance on the THERM pin be within the tolerances shown in Table 5.1. Additionally, the pull-up
resistor on the THERM pin must be connected to the same 3.3V supply that drives the VDD pin.
For 15ms after power up, the THERM pin must not be pulled low or the SMBus address will not be
decoded properly. If the system requirements do not permit these conditions, the THERM pin must be
isolated from its hard-wired OR’d bus during this time.
One method of isolating this pin is shown in Figure 5.2.
+3.3V
+2.5 - 5V
22K
4.7K – 33k
1
2
3
4
5
10
9
VDD
DP1
DN1
SMCLK
SMDATA
ALERT
EMC1413 /
EMC1414
8
Shared Therm
DP2 / DN3
DN2 / DP3
7
THERM / ADDR
GND
6
Figure 5.2 Isolating THERM Pin
5.1.4
SMBus Data Bytes
All SMBus Data bytes are sent most significant bit first and composed of 8-bits of information.
5.1.5
SMBus ACK and NACK Bits
The SMBus client will acknowledge all data bytes that it receives. This is done by the client device
pulling the SMBus data line low after the 8th bit of each byte that is transmitted. This applies to the
Write Byte protocol.
The Host will NACK (not acknowledge) the last data byte to be received from the client by holding the
SMBus data line high after the 8th data bit has been sent.
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
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5.1.6
SMBus Stop Bit
The SMBus Stop bit is defined as a transition of the SMBus Data line from a logic ‘0’ state to a logic
‘1’ state while the SMBus clock line is in a logic ‘1’ state. When the device detects an SMBus Stop bit
and it has been communicating with the SMBus protocol, it will reset its client interface and prepare
to receive further communications.
5.1.7
5.1.8
SMBus Timeout
The EMC1413 / EMC1414 supports SMBus Timeout. If the clock line is held low for longer than 30ms,
the device will reset its SMBus protocol. This function can be enabled by setting the TIMEOUT bit in
the Consecutive Alert Register (see Section 7.12).
2
SMBus and I C Compatibility
The EMC1413 / EMC1414 is compatible with SMBus and I2C. The major differences between SMBus
and I2C devices are highlighted here. For more information, refer to the SMBus 2.0 and I2C
specifications. For information on using the EMC1413 / EMC1414 in an I2C system, refer to SMSC AN
14.0 SMSC Dedicated Slave Devices in I2C Systems.
1. EMC1413 / EMC1414 supports I2C fast mode at 400kHz. This covers the SMBus max time of
100kHz.
2. Minimum frequency for SMBus communications is 10kHz.
3. The SMBus client protocol will reset if the clock is held at a logic ‘0’ for longer than 30ms. This
timeout functionality is disabled by default in the EMC1413 / EMC1414 and can be enabled by
writing to the TIMEOUT bit. I2C does not have a timeout.
4. I2C devices do not support the Alert Response Address functionality (which is optional for SMBus).
Attempting to communicate with the EMC1413 / EMC1414 SMBus interface with an invalid slave
address or invalid protocol will result in no response from the device and will not affect its register
contents. Stretching of the SMCLK signal is supported, provided other devices on the SMBus control
the timing.
5.2
SMBus Protocols
The device supports Send Byte, Read Byte, Write Byte, Receive Byte, and the Alert Response Address
as valid protocols as shown below.
All of the below protocols use the convention in Table 5.2.
Table 5.2 Protocol Format
DATA SENT
TO DEVICE
DATA SENT TO
THE HOST
# of bits sent
# of bits sent
SMSC EMC1413 / EMC1414
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Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
5.2.1
Write Byte
The Write Byte is used to write one byte of data to the registers, as shown in Table 5.3.
Table 5.3 Write Byte Protocol
SLAVE
ADDRESS
REGISTER
ADDRESS
REGISTER
DATA
START
1 -> 0
WR
ACK
ACK
ACK
STOP
YYYY_YYY
0
0
XXh
0
XXh
0
0 -> 1
5.2.2
Read Byte
The Read Byte protocol is used to read one byte of data from the registers as shown in Table 5.4.
Table 5.4 Read Byte Protocol
START
SLAVE
ADDRESS
WR
ACK
REGISTER
ADDRESS
ACK
START
SLAVE
ADDRESS
RD
ACK
REGISTER
DATA
NACK
STOP
1 -> 0
YYYY_
YYY
0
0
XXh
0
1 -> 0
YYYY_
YYY
1
0
XX
1
0 -> 1
5.2.3
Send Byte
The Send Byte protocol is used to set the internal address register pointer to the correct address
location. No data is transferred during the Send Byte protocol as shown in Table 5.5.
Table 5.5 Send Byte Protocol
SLAVE
ADDRESS
REGISTER
ADDRESS
START
1 -> 0
WR
ACK
ACK
STOP
YYYY_YYY
0
0
XXh
0
0 -> 1
5.2.4
Receive Byte
The Receive Byte protocol is used to read data from a register when the internal register address
pointer is known to be at the right location (e.g. set via Send Byte). This is used for consecutive reads
of the same register as shown in Table 5.6.
Table 5.6 Receive Byte Protocol
SLAVE
START
ADDRESS
RD
ACK
REGISTER DATA
NACK
STOP
1 -> 0
YYYY_YYY
1
0
XXh
1
0 -> 1
5.3
Alert Response Address
The ALERT output can be used as a processor interrupt or as an SMBus Alert.
When it detects that the ALERT pin is asserted, the host will send the Alert Response Address (ARA)
to the general address of 0001_100xb. All devices with active interrupts will respond with their client
address as shown in Table 5.7.
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Table 5.7 Alert Response Address Protocol
ALERT
RESPONSE
DEVICE
START
ADDRESS
RD
ACK
ADDRESS
NACK
STOP
1 -> 0
0001_100
1
0
YYYY_YYY
1
0 -> 1
The EMC1413 / EMC1414 will respond to the ARA in the following way:
1. Send Slave Address and verify that full slave address was sent (i.e. the SMBus communication
from the device was not prematurely stopped due to a bus contention event).
2. Set the MASK bit to clear the ALERT pin.
APPLICATION NOTE: The ARA does not clear the Status Register and if the MASK bit is cleared prior to the Status
Register being cleared, the ALERT pin will be reasserted.
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Chapter 6 Product Description
The EMC1413 / EMC1414 is an SMBus temperature sensor. The EMC1413 and EMC1414 monitor
one internal diode and up to two (EMC1413) or three (EMC1414) externally connected temperature
diodes.
Thermal management is performed in cooperation with a host device. This consists of the host reading
the temperature data of both the external and internal temperature diodes of the EMC1413 / EMC1414
and using that data to control the speed of one or more fans.
The EMC1413 and EMC1414 have two levels of monitoring. The first provides a maskable ALERT
signal to the host when the measured temperatures exceeds user programmable limits. This allows
the EMC1413 and EMC1414 to be used as an independent thermal watchdog to warn the host of
temperature hot spots without direct control by the host. The second level of monitoring provides a non
maskable interrupt on the THERM pin if the measured temperatures meet or exceed a second
programmable limit.
For the EMC1414, External Diode channels 2 and 3 are only compatible with general purpose diodes
(such as a 2N3904). For the EMC1413, the External Diode 2 channel is compatible with any diode
type.
Figure 6.1 shows a system level block diagram of the EMC1414 and Figure 6.2 shows a system level
block diagram of the EMC1413.
VDD = 3.3V
CPU / GPU
3.3V – 5V
DP1
DN1
VDD
Host
Thermal
Junction
SMCLK
SMDATA
EMC1414
SMBus
Interface
ALERT
DP2 / DN3
Optional
Anti-parallel
diode
THERM / ADDR
Power Control
DN2 / DP3
GND
Figure 6.1 System Diagram for EMC1414
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VDD = 3.3V
CPU / GPU
3.3V – 5V
DP1
VDD
Host
Thermal
Junction
DN1
SMCLK
SMDATA
EMC1413
SMBus
Interface
ALERT
DP2
THERM / ADDR
Power Control
DN2
GND
Figure 6.2 System Diagram for EMC1413
6.1
Modes of Operation
The EMC1413 and EMC1414 have two modes of operation.
Active (Run) - In this mode of operation, the ADC is converting on all temperature channels at the
programmed conversion rate. The temperature data is updated at the end of every conversion and
the limits are checked. In Active mode, writing to the one-shot register will do nothing.
Standby (Stop) - In this mode of operation, the majority of circuitry is powered down to reduce
supply current. The temperature data is not updated and the limits are not checked. In this mode
of operation, the SMBus is fully active and the part will return requested data. Writing to the one-
shot register will enable the device to update all temperature channels. Once all the channels are
updated, the device will return to the Standby mode.
6.1.1
6.1.2
Conversion Rates
The EMC1413 / EMC1414 may be configured for different conversion rates based on the system
requirements. The conversion rate is configured as described in Section 7.5. The default conversion
rate is 4 conversions per second. Other available conversion rates are shown in Table 7.6, "Conversion
Rate".
Dynamic Averaging
Dynamic averaging causes the EMC1413 / EMC1414 to measure the external diode channels for an
extended time based on the selected conversion rate. This functionality can be disabled for increased
power savings at the lower conversion rates (see Section 7.4, "Configuration Register"). When
dynamic averaging is enabled, the device will automatically adjust the sampling and measurement time
for the external diode channels. This allows the device to average 2x or 16x longer than the normal
11 bit operation (nominally 21ms per channel) while still maintaining the selected conversion rate. The
benefits of dynamic averaging are improved noise rejection due to the longer integration time as well
as less random variation of the temperature measurement.
When enabled, the dynamic averaging applies when a one-shot command is issued. The device will
perform the desired averaging during the one-shot operation according to the selected conversion rate.
When enabled, the dynamic averaging will affect the average supply current based on the chosen
conversion rate as shown in Table 6.1.
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Table 6.1 Supply Current vs. Conversion Rate for EMC1413 / EMC1414
AVERAGING FACTOR (BASED ON
11-BIT OPERATION)
AVERAGE SUPPLY CURRENT
ENABLED
ENABLED
CONVERSION RATE
(DEFAULT)
DISABLED
(DEFAULT)
DISABLED
1 / 16 sec
1 / 8 sec
1 / 4 sec
1 / 2 sec
1 / sec
660uA
660uA
660uA
660uA
660uA
930uA
950uA
1010uA
1020uA
1050uA
1100uA
430uA
430uA
430uA
430uA
430uA
475uA
510uA
630uA
775uA
1050uA
1100uA
16x
16x
16x
16x
8x
1x
1x
1x
1x
1x
2 / sec
4x
1x
4 / sec (default)
8 / sec
2x
1x
1x
1x
16 / sec
0.5x
0.25x
0.125x
0.5x
0.25x
0.125x
32 / sec
64 / sec
6.2
THERM Output
The THERM output is asserted independently of the ALERT output and cannot be masked. Whenever
any of the measured temperatures exceed the user programmed Therm Limit values for the
programmed number of consecutive measurements, the THERM output is asserted. Once it has been
asserted, it will remain asserted until all measured temperatures drop below the Therm Limit minus
the Therm Hysteresis (also programmable).
When the THERM pin is asserted, the THERM status bits will likewise be set. Reading these bits will
not clear them until the THERM pin is deasserted. Once the THERM pin is deasserted, the THERM
status bits will be automatically cleared.
6.3
ALERT Output
The ALERT pin is an open drain output and requires a pull-up resistor to VDD and has two modes of
operation: interrupt mode and comparator mode. The mode of the ALERT output is selected via the
ALERT / COMP bit in the Configuration Register (see Section 7.4).
6.3.1
ALERT Pin Interrupt Mode
When configured to operate in interrupt mode, the ALERT pin asserts low when an out of limit
measurement (> high limit or < low limit) is detected on any diode or when a diode fault is detected.
The ALERT pin will remain asserted as long as an out-of-limit condition remains. Once the out-of-limit
condition has been removed, the ALERT pin will remain asserted until the appropriate status bits are
cleared.
The ALERT pin can be masked by setting the MASK_ALL bit. Once the ALERT pin has been masked,
it will be de-asserted and remain de-asserted until the MASK_ALL bit is cleared by the user. Any
interrupt conditions that occur while the ALERT pin is masked will update the Status Register normally.
There are also individual channel masks (see Section 7.11).
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The ALERT pin is used as an interrupt signal or as an SMBus Alert signal that allows an SMBus slave
to communicate an error condition to the master. One or more ALERT outputs can be hard-wired
together.
6.3.2
ALERT Pin Comparator Mode
When the ALERT pin is configured to operate in comparator mode, it will be asserted if any of the
measured temperatures exceeds the respective high limit. The ALERT pin will remain asserted until
all temperatures drop below the corresponding high limit minus the Therm Hysteresis value.
When the ALERT pin is asserted in comparator mode, the corresponding high limit status bits will be
set. Reading these bits will not clear them until the ALERT pin is deasserted. Once the ALERT pin is
deasserted, the status bits will be automatically cleared.
The MASK_ALL bit will not block the ALERT pin in this mode; however, the individual channel masks
(see Section 7.11) will prevent the respective channel from asserting the ALERT pin.
6.4
Temperature Measurement
The EMC1413 / EMC1414 can monitor the temperature of up to two / three externally connected
diodes. Each external diode channel is configured with Resistance Error Correction and Beta
Compensation based on user settings and system requirements.
The device contains programmable High, Low, and Therm limits for all measured temperature
channels. If the measured temperature goes below the Low limit or above the High limit, the ALERT
pin can be asserted (based on user settings). If the measured temperature meets or exceeds the
Therm Limit, the THERM pin is asserted unconditionally, providing two tiers of temperature detection.
6.4.1
Beta Compensation
The EMC1413 / EMC1414 is configured to monitor the temperature of basic diodes (e.g., 2N3904) or
CPU thermal diodes. It automatically detects the type of external diode (CPU diode or diode connected
transistor) and determines the optimal setting to reduce temperature errors introduced by beta
variation. Compensating for this error is also known as implementing the transistor or BJT model for
temperature measurement.
For discrete transistors configured with the collector and base shorted together, the beta is generally
sufficiently high such that the percent change in beta variation is very small. For example, a 10%
variation in beta for two forced emitter currents with a transistor whose ideal beta is 50 would contribute
approximately 0.25°C error at 100°C. However for substrate transistors where the base-emitter junction
is used for temperature measurement and the collector is tied to the substrate, the proportional beta
variation will cause large error. For example, a 10% variation in beta for two forced emitter currents
with a transistor whose ideal beta is 0.5 would contribute approximately 8.25°C error at 100°C.
For the EMC1414, the External Diode 2 and External Diode 3 channels do not support Beta
Compensation.
6.4.2
6.4.3
Resistance Error Correction (REC)
Parasitic resistance in series with the external diodes will limit the accuracy obtainable from
temperature measurement devices. The voltage developed across this resistance by the switching
diode currents cause the temperature measurement to read higher than the true temperature.
Contributors to series resistance are PCB trace resistance, on die (i.e. on the processor) metal
resistance, bulk resistance in the base and emitter of the temperature transistor. Typically, the error
caused by series resistance is +0.7°C per ohm. The EMC1413 / EMC1414 automatically corrects up
to 100 ohms of series resistance.
Programmable External Diode Ideality Factor
The EMC1413 / EMC1414 is designed for external diodes with an ideality factor of 1.008. Not all
external diodes, processor or discrete, will have this exact value. This variation of the ideality factor
introduces error in the temperature measurement which must be corrected for. This correction is
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typically done using programmable offset registers. Since an ideality factor mismatch introduces an
error that is a function of temperature, this correction is only accurate within a small range of
temperatures. To provide maximum flexibility to the user, the EMC1413 / EMC1414 provides a 6-bit
register for each external diode where the ideality factor of the diode used is programmed to eliminate
errors across all temperatures.
APPLICATION NOTE: When monitoring a substrate transistor or CPU diode and beta compensation is enabled, the
Ideality Factor should not be adjusted. Beta Compensation automatically corrects for most
ideality errors.
6.5
Diode Faults
The EMC1413 / EMC1414 detects an open on the DP and DN pins, and a short across the DP and
DN pins. For each temperature measurement made, the device checks for a diode fault on the external
diode channel(s). When a diode fault is detected, the ALERT pin asserts (unless masked, see
Section 6.6) and the temperature data reads 00h in the MSB and LSB registers (note: the low limit will
not be checked). A diode fault is defined as one of the following: an open between DP and DN, a short
from VDD to DP, or a short from VDD to DN.
If a short occurs across DP and DN or a short occurs from DP to GND, the low limit status bit is set
and the ALERT pin asserts (unless masked). This condition is indistinguishable from a temperature
measurement of 0.000°C (-64°C in extended range) resulting in temperature data of 00h in the MSB
and LSB registers.
If a short from DN to GND occurs (with a diode connected), temperature measurements will continue
as normal with no alerts.
6.6
6.7
Consecutive Alerts
The EMC1413 / EMC1414 contain multiple consecutive alert counters. One set of counters applies to
the ALERT pin and the second set of counters applies to the THERM pin. Each temperature
measurement channel has a separate consecutive alert counter for each of the ALERT and THERM
pins. All counters are user programmable and determine the number of consecutive measurements
that a temperature channel(s) must be out-of-limit or reporting a diode fault before the corresponding
pin is asserted.
See Section 7.12, "Consecutive ALERT Register" for more details on the consecutive alert function.
Digital Filter
To reduce the effect of noise and temperature spikes on the reported temperature, the External Diode
1 channel uses a programmable digital filter. This filter can be configured as Level 1, Level 2, or
Disabled (default) (see Section 7.18). The typical filter performance is shown in Figure 6.3 and
Figure 6.4.
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Filter Step Response
90
80
70
60
50
40
30
20
10
0
Disabled
Level1
Level2
0
2
4
6
8
10
12
14
Samples
Figure 6.3 Temperature Filter Step Response
Filter Impulse Response
90
80
70
60
50
40
30
20
10
0
Disabled
Level1
Level2
0
2
4
6
8
10
12
14
Samples
Figure 6.4 Temperature Filter Impulse Response
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6.8
Temperature Measurement Results and Data
The temperature measurement results are stored in the internal and external temperature registers.
These are then compared with the values stored in the high and low limit registers. Both external and
internal temperature measurements are stored in 11-bit format with the eight (8) most significant bits
stored in a high byte register and the three (3) least significant bits stored in the three (3) MSB
positions of the low byte register. All other bits of the low byte register are set to zero.
The EMC1413 / EMC1414 has two selectable temperature ranges. The default range is from 0°C to
+127°C and the temperature is represented as binary number able to report a temperature from 0°C
to +127.875°C in 0.125°C steps.
The extended range is an extended temperature range from -64°C to +191°C. The data format is a
binary number offset by 64°C. The extended range is used to measure temperature diodes with a large
known offset (such as AMD processor diodes) where the diode temperature plus the offset would be
equivalent to a temperature higher than +127°C.
Table 6.2 shows the default and extended range formats.
Table 6.2 Temperature Data Format
TEMPERATURE (°C)
DEFAULT RANGE 0°C TO 127°C
EXTENDED RANGE -64°C TO 191°C
Diode Fault
-64
000 0000 0000
000 0000 0000
000 0000 0000
000 0000 0000
Note 6.2
-1
0
000 0000 0000
001 1111 1000
010 0000 0000
000 0000 0000
Note 6.1
0.125
1
000 0000 0001
000 0000 1000
010 0000 0000
010 0000 1000
011 1111 1000
011 1111 1111
010 0000 0001
010 0000 1000
100 0000 0000
100 0000 1000
101 1111 1000
101 1111 1111
110 0000 0000
64
65
127
127.875
128
011 1111 1111
Note 6.3
190
011 1111 1111
011 1111 1111
011 1111 1111
111 1111 0000
111 1111 1000
191
>= 191.875
111 1111 1111
Note 6.4
Note 6.1 In default mode, all temperatures < 0°C will be reported as 0°C.
Note 6.2 In the extended range, all temperatures < -64°C will be reported as -64°C.
Note 6.3 For the default range, all temperatures > +127.875°C will be reported as +127.875°C.
Note 6.4 For the extended range, all temperatures > +191.875°C will be reported as +191.875°C.
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6.9
Anti-parallel Diode Connections
The EMC1414 supports reading two external diodes on the same set of pins (DP2, DN2). These
diodes are connected as shown in Figure 6.1. Due to the anti-parallel connection of these diodes, both
diodes will be reverse biased by a VBE voltage (approximately 0.7V). Because of this reverse bias,
only discrete thermal diodes (such as a 2N3904) are recommended to be placed on these pins.
6.10
External Diode Connections
The EMC1413 / EMC1414 can be configured to measure a CPU substrate transistor, a discrete
2N3904 thermal diode, or an AMD processor diode on the External Diode 1 channel only. For the
EMC1414 the External Diode 2 and External Diode 3 channels are configured to measure a pair of
discrete anti-parallel diodes (shared on pins DP2 and DN2). The supported configurations for the
external diode channels are shown in Figure 6.5.
to
DP1
to
DP1
to DP2 / DN3
to DN2 / DP3
to
DN1
to
DN1
Local
Ground
Typical remote
Anti-parallel connected
discrete NPN transistors
e.g. 2N3904
Typical remote
discrete NPN transistor
e.g. 2N3904
substrate transistor
e.g. CPU substrate
PNP
Figure 6.5 Diode Configurations
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Chapter 7 Register Description
The registers shown in Table 7.1 are accessible through the SMBus. An entry of ‘-’ indicates that the
bit is not used and will always read ‘0’.
Table 7.1 Register Set in Hexadecimal Order
DEFAULT
REGISTER
ADDRESS
R/W
REGISTER NAME
FUNCTION
VALUE
PAGE
Internal Diode Data
High Byte
Stores the integer data for the
Internal Diode
00h
01h
02h
R
00h
Page 29
External Diode 1
Data High Byte
Stores the integer data for External
Diode 1
R
R
00h
00h
Stores the status bits for the
Internal Diode and External Diodes
Status
Page 30
Page 30
Controls the general operation of
the device (mirrored at address
09h)
03h
04h
05h
06h
07h
08h
09h
0Ah
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Configuration
00h
Controls the conversion rate for
updating temperature data
(mirrored at address 0Ah)
06h
(4/sec)
Conversion Rate
Page 31
Stores the 8-bit high limit for the
Internal Diode (mirrored at address
0Bh)
Internal Diode High
Limit
55h
(85°C)
Stores the 8-bit low limit for the
Internal Diode (mirrored at address
0Ch)
Internal Diode Low
Limit
00h
(0°C)
Page 32
Stores the integer portion of the
high limit for External Diode 1
(mirrored at register 0Dh)
External Diode 1
High Limit High Byte
55h
(85°C)
Stores the integer portion of the
low limit for External Diode 1
(mirrored at register 0Eh)
External Diode 1 Low
Limit High Byte
00h
(0°C)
Controls the general operation of
the device (mirrored at address
03h)
Configuration
00h
Page 30
Page 31
Controls the conversion rate for
updating temperature data
(mirrored at address 04h)
06h
(4/sec)
Conversion Rate
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Table 7.1 Register Set in Hexadecimal Order (continued)
REGISTER
ADDRESS
DEFAULT
VALUE
R/W
REGISTER NAME
FUNCTION
PAGE
Stores the 8-bit high limit for the
Internal Diode (mirrored at address
05h)
Internal Diode High
Limit
55h
(85°C)
0Bh
0Ch
0Dh
0Eh
R/W
Stores the 8-bit low limit for the
Internal Diode (mirrored at address
06h)
Internal Diode Low
Limit
00h
(0°C)
R/W
R/W
R/W
Page 32
Stores the integer portion of the
high limit for External Diode 1
(mirrored at register 07h)
External Diode 1
High Limit High Byte
55h
(85°C)
Stores the integer portion of the
low limit for External Diode 1
(mirrored at register 08h)
External Diode 1 Low
Limit High Byte
00h
(0°C)
A write to this register initiates a
one shot update.
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
W
One shot
00h
00h
00h
00h
00h
00h
Page 34
Page 29
Page 34
Page 34
External Diode 1
Data Low Byte
Stores the fractional data for
External Diode 1
R
Scratchpad register for software
compatibility
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Scratchpad
Scratchpad
Scratchpad register for software
compatibility
External Diode 1
High Limit Low Byte
Stores the fractional portion of the
high limit for External Diode 1
Page 32
Page 32
Page 32
External Diode 1 Low
Limit Low Byte
Stores the fractional portion of the
low limit for External Diode 1
External Diode 2
High Limit High Byte
Stores the integer portion of the
high limit for External Diode 2
55h
(85°C)
External DIode 2 Low
Limit High Byte
Stores the integer portion of the
low limit for External Diode 2
00h
(0°C)
External Diode 2
High Limit Low Byte
Stores the fractional portion of the
high limit External Diode 2
00h
00h
External Diode 2 Low
Limit Low Byte
Stores the fractional portion of the
low limit for External Diode 2
External Diode 1
Therm Limit
Stores the 8-bit critical temperature
limit for External Diode 1
55h
(85°C)
Page 34
Page 34
External Diode 2
Therm Limit
Stores the 8-bit critical temperature
limit for External Diode 2
55h
(85°C)
Stores status bits indicating which
external diode detected a diode
fault
1Bh
1Fh
R-C
R/W
External Diode Fault
00h
00h
Page 35
Page 35
Channel Mask
Register
Controls the masking of individual
channels
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Table 7.1 Register Set in Hexadecimal Order (continued)
REGISTER
ADDRESS
DEFAULT
VALUE
R/W
REGISTER NAME
FUNCTION
PAGE
Internal Diode Therm
Limit
Stores the 8-bit critical temperature
limit for the Internal Diode
55h
(85°C)
20h
21h
R/W
Page 34
Stores the 8-bit hysteresis value
that applies to all Therm limits
0Ah
(10°C)
R/W
R/W
Therm Hysteresis
Controls the number of out-of-limit
conditions that must occur before
an interrupt is asserted
22h
Consecutive ALERT
70h
Page 36
Page 29
External Diode 2
Data High Byte
Stores the integer data for External
Diode 2
23h
24h
R
R
00h
00h
External Diode 2
Data Low Byte
Stores the fractional data for
External Diode 2
Stores the Beta Compensation
circuitry settings for External Diode
External Diode Beta
Configuration
25h
26h
R/W
R/W
08h
Page 37
Page 37
1
08h for
EMC1413
and 07h for
EMC1414
Stores the Beta Compensation
circuitry settings for External Diode
2
External Diode 2
Beta Configuration
External Diode 1
Ideality Factor
Stores the ideality factor for
External Diode 1
12h
(1.008)
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
30h
31h
R/W
R/W
R
Page 38
Page 38
Page 29
External Diode 2
Ideality Factor
Stores the ideality factor for
External Diode 2
12h
(1.008)
Internal Diode Data
Low Byte
Stores the fractional data for the
Internal Diode
00h
00h
00h
External Diode 3
High Byte
Stores the integer data for External
Diode 3
R
Page 29
External Diode 3 Low
Byte
Stores the fractional data for
External Diode 3
R
External Diode 3
High Limit High Byte
Stores the integer portion of the
high limit for External Diode 3
55h
(85°C)
R/W
R/W
R/W
R/W
R/W
R/W
External Diode 3 Low
Limit High Byte
Stores the integer portion of the
low limit for External Diode 3
00h
(0°C)
Page 32
External Diode 3
High Limit Low Byte
Stores the fractional portion of the
high limit for External Diode 3
00h
00h
External Diode 3 Low
Limit Low Byte
Stores the fractional portion of the
low limit for External Diode 3
External Diode 3
Therm Limit
Stores the 8-bit critical temperature
limit for External Diode 3
55h
(85°C)
Page 34
Page 38
External Diode 3
Ideality Factor
Stores the ideality factor for
External Diode 3
12h
(1.008)
35h
36h
R-C
R-C
High Limit Status
Low Limit Status
Status bits for the High Limits
Status bits for the Low Limits
00h
00h
Page 40
Page 41
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Table 7.1 Register Set in Hexadecimal Order (continued)
REGISTER
ADDRESS
DEFAULT
VALUE
R/W
REGISTER NAME
FUNCTION
PAGE
37h
40h
R
Therm Limit Status
Status bits for the Therm Limits
00h
00h
Page 41
Controls the digital filter setting for
the External Diode 1 channel
R/W
R
Filter Control
Page 42
Page 42
Page 42
Page 42
Page 43
Product ID
(EMC1413)
Stores a fixed value that identifies
the device
FDh
FDh
FEh
FFh
21h
25h
5Dh
04h
Product ID
(EMC1414)
Stores a fixed value that identifies
the device
R
Stores a fixed value that
represents SMSC
R
Manufacturer ID
Revision
Stores a fixed value that
represents the revision number
R
7.1
Data Read Interlock
When any temperature channel high byte register is read, the corresponding low byte is copied into
an internal ‘shadow’ register. The user is free to read the low byte at any time and be guaranteed that
it will correspond to the previously read high byte. Regardless if the low byte is read or not, reading
from the same high byte register again will automatically refresh this stored low byte data.
7.2
Temperature Data Registers
Table 7.2 Temperature Data Registers
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Internal Diode
High Byte
00h
29h
01h
10h
23h
24h
R
128
64
32
16
8
4
2
1
00h
Internal Diode
Low Byte
R
R
R
R
R
0.5
128
0.5
0.25
64
0.125
32
-
16
-
-
8
-
-
4
-
-
2
-
-
1
-
00h
00h
00h
00h
00h
External Diode
1 High Byte
External Diode
1 Low Byte
0.25
64
0.125
32
External Diode
2 High Byte
128
0.5
16
-
8
-
4
-
2
-
1
-
External Diode
2 Low Byte
0.25
0.125
As shown in Table 7.2, all temperatures are stored as an 11-bit value with the high byte representing
the integer value and the low byte representing the fractional value left justified to occupy the MSBits.
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA2S9HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
7.3
Status Register
Table 7.3 Status Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
02h
R
Status
BUSY
-
-
HIGH LOW FAULT THERM
-
00h
The Status Register reports general error conditions. To identify specific channels, refer to
Section 7.10, Section 7.15, Section 7.16, and Section 7.17. The individual Status Register bits are
cleared when the appropriate High Limit, Low Limit, or Therm Limit register has been read or cleared.
Bit 7 - BUSY - This bit indicates that the ADC is currently converting. This bit does not cause either
the ALERT or THERM pins to be asserted.
Bit 4 - HIGH - This bit is set when any of the temperature channels exceeds its programmed high limit.
See the High Limit Status Register for specific channel information (Section 7.15). When set, this bit
will assert the ALERT pin.
Bit 3 - LOW - This bit is set when any of the temperature channels drops below its programmed low
limit. See the Low Limit Status Register for specific channel information (Section 7.16). When set, this
bit will assert the ALERT pin.
Bit 2 - FAULT - This bit is asserted when a diode fault is detected on any of the external diode
channels. See the External Diode Fault Register for specific channel information (Section 7.10). When
set, this bit will assert the ALERT pin.
Bit 1 - THERM - This bit is set when the any of the temperature channels exceeds its programmed
Therm Limit. See the Therm Limit Status Register for specific channel information (Section 7.17).
7.4
Configuration Register
Table 7.4 Configuration Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
03h
09h
MASK_
ALL
RUN/
STOP
ALERT/
COMP
DAVG_
DIS
R/W
Configuration
RECD1
RECD2
RANGE
APDD
00h
The Configuration Register controls the basic operation of the device. This register is fully accessible
at either address.
Bit 7 - MASK_ALL - Masks the ALERT pin from asserting.
‘0’ - (default) - The ALERT pin is not masked. If any of the appropriate status bits are set the ALERT
pin will be asserted.
‘1’ - - The ALERT pin is masked. It will not be asserted for any interrupt condition unless it is
configured in comparator mode. The Status Registers will be updated normally.
Bit 6 - RUN / STOP - Controls Active/Standby modes.
‘0’ (default) - The device is in Active mode and converting on all channels.
‘1’ - The device is in Standby mode and not converting.
Bit 5 - ALERT/COMP - Controls the operation of the ALERT pin.
‘0’ (default) - The ALERT pin acts as described in Section 6.3.
‘1’ - The ALERT pin acts in comparator mode as described in Section 6.3.2. In this mode the
MASK_ALL bit is ignored.
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA3S0HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Bit 4 - RECD1 - Disables the Resistance Error Correction (REC) for External Diode 1.
‘0’ (default) - REC is enabled for External Diode 1.
‘1’ - REC is disabled for External Diode 1.
Bit 3 - RECD2 - Disables the Resistance Error Correction (REC) for External Diode 2 and External
Diode 3.
‘0’ (default) - REC is enabled for External Diode 2 and External Diode 3.
‘1’ - REC is disabled for External Diode 2 and External Diode 3.
Bit 2 - RANGE - Configures the measurement range and data format of the temperature channels.
‘0’ (default) - The temperature measurement range is 0°C to +127.875°C and the data format is
binary.
‘1’ -The temperature measurement range is -64°C to +191.875°C and the data format is offset
binary (see Table 6.2).
Bit 1 - DAVG_DIS - Disables the dynamic averaging feature on all temperature channels.
‘0’ (default) - The dynamic averaging feature is enabled. All temperature channels will be converted
with an averaging factor that is based on the conversion rate as shown in Table 6.1.
‘1’ - The dynamic averaging feature is disabled. All temperature channels will be converted with a
maximum averaging factor of 1x (equivalent to 11-bit conversion). For higher conversion rates, this
averaging factor will be reduced as shown in Table 6.1.
Bit 0 - APDD (EMC1414 only) - Disables the anti-parallel diode operation. Beta Compensation is
disabled on External Diode 2 and 3 regardless of APDD setting. In addition, External Diode 2 Beta
Configuration register will be ignored.
‘0’ (default) - Anti-parallel diode mode is enabled. Two external diodes will be measured on the
DP2 and DN2 pins.
‘1’ - Anti-parallel diode mode is disabled. Only one external diode will be measured on the DP2
and DN2 pins.
7.5
Conversion Rate Register
Table 7.5 Conversion Rate Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
04h
0Ah
Conversion
Rate
06h
(4/sec)
R/W
-
-
-
-
CONV[3:0]
The Conversion Rate Register controls how often the temperature measurement channels are updated
and compared against the limits. This register is fully accessible at either address.
Bits 3-0 - CONV[3:0] - Determines the conversion rate as shown in Table 7.6.
Table 7.6 Conversion Rate
CONV[3:0]
HEX
3
2
1
0
CONVERSIONS / SECOND
0h
1h
0
0
0
0
0
0
0
1
1 / 16
1 / 8
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA3S1HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Table 7.6 Conversion Rate (continued)
CONV[3:0]
2
HEX
3
1
0
CONVERSIONS / SECOND
2h
3h
0
0
0
0
0
0
1
1
1
0
0
1
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1 / 4
1 / 2
4h
1
5h
2
6h
4 (default)
7h
8
8h
16
32
64
1
9h
Ah
Bh - Fh
All others
7.6
Limit Registers
Table 7.7 Temperature Limit Registers
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
05h
0Bh
06h
0Ch
07h
Internal Diode
High Limit
55h
(85°C)
R/W
128
64
32
16
8
4
2
1
Internal Diode
Low Limit
00h
(0°C)
R/W
R/W
128
128
64
64
32
32
16
16
8
8
4
4
2
2
1
1
External
Diode 1 High
Limit High
Byte
55h
(85°C)
0Dh
External
Diode 1 High
Limit Low
Byte
13h
R/W
R/W
R/W
0.5
128
0.5
0.25 0.125
-
16
-
-
8
-
-
4
-
-
2
-
-
1
-
00h
08h
0Eh
External
Diode 1 Low
Limit High
Byte
00h
(0°C)
64
32
External
Diode 1 Low
Limit Low
Byte
14h
0.25 0.125
00h
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA3S2HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Table 7.7 Temperature Limit Registers (continued)
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
External
Diode 2 High
Limit High
Byte
55h
(85°C)
15h
R/W
128
64
32
16
8
4
2
1
External
Diode 2 Low
Limit High
Byte
00h
(0°C)
16h
17h
18h
2Ch
2Dh
2Eh
2Fh
R/W
R/W
R/W
R/W
R/W
R/W
R/W
128
0.5
0.5
128
128
0.5
0.5
64
32
16
-
8
-
4
-
2
-
1
-
External
Diode 2 High
Limit Low
Byte
0.25 0.125
0.25 0.125
00h
00h
External
Diode 2 Low
Limit Low
Byte
-
-
-
-
-
External
Diode 3 High
Limit High
Byte
55h
(85°C)
64
64
32
32
16
16
-
8
8
-
4
4
-
2
2
-
1
1
-
External
Diode 3 Low
Limit High
Byte
00h
(0°C)
External
Diode 3 High
Limit Low
Byte
0.25 0.125
0.25 0.125
00h
00h
External
Diode 3 Low
Limit Low
Byte
-
-
-
-
-
The device contains both high and low limits for all temperature channels. If the measured temperature
exceeds the high limit, then the corresponding status bit is set and the ALERT pin is asserted.
Likewise, if the measured temperature is less than or equal to the low limit, the corresponding status
bit is set and the ALERT pin is asserted.
The data format for the limits must match the selected data format for the temperature so that if the
extended temperature range is used, the limits must be programmed in the extended data format.
The limit registers with multiple addresses are fully accessible at either address.
When the device is in Standby mode, updating the limit registers will have no effect until the next
conversion cycle occurs. This can be initiated via a write to the One Shot Register or by clearing the
RUN / STOP bit in the Configuration Register (see Section 7.4).
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA3S3HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
7.7
Scratchpad Registers
Table 7.8 Scratchpad Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
11h
12h
R/W
R/W
Scratchpad
Scratchpad
7
7
6
6
5
5
4
4
3
3
2
2
1
1
0
0
00h
00h
The Scratchpad Registers are Read / Write registers that are used for place holders to be software
compatible with legacy programs. Reading from the registers will return what is written to them.
7.8
One Shot Register
Table 7.9 One Shot Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Writing to this register initiates a single conversion cycle. Data
is not stored and always reads 00h
0Fh
W
One Shot
00h
The One Shot Register is used to initiate a one shot command. Writing to the one shot register when
the device is in standby mode and BUSY bit (in Status Register) is ‘0’, will immediately cause the ADC
to update all temperature measurements. Writing to the One Shot Register while the device is in active
mode will have no effect.
7.9
Therm Limit Registers
Table 7.10 Therm Limit Registers
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
External
Diode 1
Therm Limit
55h
(85°C)
19h
R/W
128
64
32
16
8
4
2
1
External
Diode 2
Therm Limit
55h
(85°C)
1Ah
R/W
128
64
32
16
8
4
2
1
Internal Diode
Therm Limit
55h
(85°C)
20h
21h
R/W
R/W
128
128
64
64
32
32
16
16
8
8
4
4
2
2
1
1
Therm
Hysteresis
0Ah
(10°C)
External
Diode 3
Therm Limit
55h
(85°C)
30h
R/W
128
64
32
16
8
4
2
1
The Therm Limit Registers are used to determine whether a critical thermal event has occurred. If the
measured temperature exceeds the Therm Limit, the THERM pin is asserted. The limit setting must
match the chosen data format of the temperature reading registers.
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA3S4HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Unlike the ALERT pin, the THERM pin cannot be masked. Additionally, the THERM pin will be released
once the temperature drops below the corresponding threshold minus the Therm Hysteresis.
7.10
External Diode Fault Register
Table 7.11 External Diode Fault Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
External
Diode Fault
1Bh
R-C
-
-
-
-
E3FLT
E2FLT
E1FLT
-
00h
The External Diode Fault Register indicates which of the external diodes caused the FAULT bit in the
Status Register to be set. This register is cleared when it is read.
Bit 3 - E3FLT (EMC1414 only) - This bit is set if the External Diode 3 channel reported a diode fault.
Bit 2 - E2FLT - This bit is set if the External Diode 2 channel reported a diode fault.
Bit 1 - E1FLT - This bit is set if the External Diode 1 channel reported a diode fault.
7.11
Channel Mask Register
Table 7.12 Channel Mask Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Channel
Mask
E3
MASK
E2
E1
INT
MASK
1Fh
R/W
-
-
-
-
00h
MASK MASK
The Channel Mask Register controls individual channel masking. When a channel is masked, the
ALERT pin will not be asserted when the masked channel reads a diode fault or out of limit error. The
channel mask does not mask the THERM pin.
Bit 3 - E3MASK (EMC1414 only) - Masks the ALERT pin from asserting when the External Diode 3
channel is out of limit or reports a diode fault.
‘0’ (default) - The External Diode 3 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 3 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
Bit 2 - E2MASK - Masks the ALERT pin from asserting when the External Diode 2 channel is out of
limit or reports a diode fault.
‘0’ (default) - The External Diode 2 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 2 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
Bit 1 - E1MASK - Masks the ALERT pin from asserting when the External Diode 1 channel is out of
limit or reports a diode fault.
‘0’ (default) - The External Diode 1 channel will cause the ALERT pin to be asserted if it is out of
limit or reports a diode fault.
‘1’ - The External Diode 1 channel will not cause the ALERT pin to be asserted if it is out of limit
or reports a diode fault.
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA3S5HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Bit 0 - INTMASK - Masks the ALERT pin from asserting when the Internal Diode temperature is out
of limit.
‘0’ (default) - The Internal Diode channel will cause the ALERT pin to be asserted if it is out of limit.
‘1’ - The Internal Diode channel will not cause the ALERT pin to be asserted if it is out of limit.
7.12
Consecutive ALERT Register
Table 7.13 Consecutive ALERT Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Consecutive
ALERT
TIME
OUT
22h
R/W
CTHRM[2:0]
CALRT[2:0]
-
70h
The Consecutive ALERT Register determines how many times an out-of-limit error or diode fault must
be detected in consecutive measurements before the ALERT or THERM pin is asserted. Additionally,
the Consecutive ALERT Register controls the SMBus Timeout functionality.
An out-of-limit condition (i.e. HIGH, LOW, or FAULT) occurring on the same temperature channel in
consecutive measurements will increment the consecutive alert counter. The counters will also be reset
if no out-of-limit condition or diode fault condition occurs in a consecutive reading.
When the ALERT pin is configured as an interrupt, when the consecutive alert counter reaches its
programmed value, the following will occur: the STATUS bit(s) for that channel and the last error
condition(s) (i.e. E1HIGH, or E2LOW and/or E2FAULT) will be set to ‘1’, the ALERT pin will be
asserted, the consecutive alert counter will be cleared, and measurements will continue.
When the ALERT pin is configured as a comparator, the consecutive alert counter will ignore diode
fault and low limit errors and only increment if the measured temperature exceeds the High Limit.
Additionally, once the consecutive alert counter reaches the programmed limit, the ALERT pin will be
asserted, but the counter will not be reset. It will remain set until the temperature drops below the High
Limit minus the Therm Hysteresis value.
For example, if the CALRT[2:0] bits are set for 4 consecutive alerts on an EMC1413 / EMC1414
device, the high limits are set at 70°C, and none of the channels are masked, then the ALERT pin will
be asserted after the following four measurements:
1. Internal Diode reads 71°C and both external diodes read 69°C. Consecutive alert counter for INT
is incremented to 1.
2. Both the Internal Diode and External Diode 1 read 71°C and External Diode 2 reads 68°C.
Consecutive alert counter for INT is incremented to 2 and for EXT1 is set to 1.
3. The External Diode 1 reads 71°C and both the Internal Diode and External Diode 2 read 69°C.
Consecutive alert counters for INT and EXT2 are cleared and EXT1 is incremented to 2.
4. The Internal Diode reads 71°C and both external diodes read 71°C. Consecutive alert counter for
INT is set to 1, EXT2 is set to 1, and EXT1 is incremented to 3.
5. The Internal Diode reads 71°C and both the external diodes read 71°C. Consecutive alert counter
for INT is incremented to 2, EXT2 is set to 2, and EXT1 is incremented to 4. The appropriate status
bits are set for EXT1 and the ALERT pin is asserted. EXT1 counter is reset to 0 and all other
counters hold the last value until the next temperature measurement.
Bit 7 - TIMEOUT - Determines whether the SMBus Timeout function is enabled.
‘0’ (default) - The SMBus Timeout feature is disabled. The SMCLK line can be held low indefinitely
without the device resetting its SMBus protocol.
‘1’ - The SMBus Timeout feature is enabled. If the SMCLK line is held low for more than 30ms,
the device will reset the SMBus protocol.
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA3S6HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Bits 6-4 - CTHRM[2:0] - Determines the number of consecutive measurements that must exceed the
corresponding Therm Limit before the THERM pin is asserted. All temperature channels use this value
to set the respective counters. The consecutive Therm counter is incremented whenever any
measurement exceed the corresponding Therm Limit.
If the temperature drops below the Therm Limit, the counter is reset. If a number of consecutive
measurements above the Therm Limit occurs, the THERM pin is asserted low.
Once the THERM pin has been asserted, the consecutive therm counter will not reset until the
corresponding temperature drops below the Therm Limit minus the Therm Hysteresis value.
The bits are decoded as shown in Table 7.14. The default setting is 4 consecutive out of limit
conversions.
Bits 3-1 - CALRT[2:0] - Determine the number of consecutive measurements that must have an out of
limit condition or diode fault before the ALERT pin is asserted. All temperature channels use this value
to set the respective counters. The bits are decoded as shown in Table 7.14. The default setting is 1
consecutive out of limit conversion.
Table 7.14 Consecutive Alert / Therm Settings
NUMBER OF CONSECUTIVE OUT OF LIMIT
2
1
0
MEASUREMENTS
1
0
0
0
(default for CALRT[2:0])
0
0
0
1
1
1
2
3
4
1
1
1
(default for CTHRM[2:0])
7.13
Beta Configuration Registers
Table 7.15 Beta Configuration Registers
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
External
Diode 1 Beta
Configuration
25h
R/W
-
-
-
-
ENABLE1
BETA1[2:0]
BETA2[2:0]
08h
08h for
EMC1413
and 07h
for
External
Diode 2 Beta
Configuration
26h
R/W
-
-
-
-
ENABLE2
EMC1414
These registers are used to set the Beta Compensation factor that is used for the external diode
channels.
Bit 3 - ENABLEX - Enables the Beta Compensation factor auto-detection function. The ENABLE2
control is disabled for the EMC1414; beta compensation cannot be enabled for External Diode 2 or 3.
‘0’ - The Beta Compensation Factor auto-detection circuitry is disabled.
‘1’ - The Beta Compensation factor auto-detection circuitry is enabled. At the beginning of every
conversion, the optimal Beta Compensation factor setting will be determined and applied. The
BETAX[2:0] bits will be automatically updated to indicate the current setting. This is the default for
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA3S7HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
EMC1413. This is the default for EMC1414 for External Diode 1 only; it is disabled and cannot be
enabled for External Diode 2 or 3.
Bit 2-0 - BETAX[2:0] - These bits always reflect the current beta configuration settings. If auto-detection
circuitry is enabled, these bits will be updated automatically and writing to these bits will have no effect.
If the auto-detection circuitry is disabled, these bits will determine the beta configuration setting that is
used for their respective channels.
Care should be taken when setting the BETAX[2:0] bits when the auto-detection circuitry is disabled.
If the Beta Compensation factor is set at a beta value that is higher than the transistor beta, the circuit
may introduce measurement errors. When measuring a discrete thermal diode (such as 2N3904) or a
CPU diode that functions like a discrete thermal diode (such as an AMD processor diode), the
BETAX[2:0] bits should be set to ‘111b’.
Table 7.16 CPU Beta Values
BETAX[2:0]
HEX
ENABLEX
2
1
0
MINIMUM BETA
0.11
0h
1h
0
0
0
0
0
0
0
0
1
0
0
0
0
1
1
1
1
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
X
0.18
2h
0.25
3h
0.33
4h
0.43
5h
1.00
6h
2.33
7h
Disabled
Auto-detection
8h - Fh
7.14
External Diode Ideality Factor Registers
Table 7.17 Ideality Configuration Registers
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
External
Diode 1
Ideality
Factor
27h
R/W
-
-
IDEALITY1[5:0]
IDEALITY2[5:0]
IDEALITY3[5:0]
12h
12h
12h
External
Diode 2
Ideality
Factor
28h
31h
R/W
R/W
-
-
-
-
External
Diode 3
Ideality
Factor
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA3S8HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
These registers store the ideality factors that are applied to the external diodes. Table 7.18 defines
each setting and the corresponding ideality factor. Beta Compensation and Resistance Error Correction
automatically correct for most diode ideality errors; therefore, it is not recommended that these settings
be updated without consulting SMSC.
Table 7.18 Ideality Factor Look-Up Table (Diode Model)
SETTING
FACTOR
SETTING
FACTOR
SETTING
FACTOR
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
0.9949
0.9962
0.9975
0.9988
1.0001
1.0014
1.0027
1.0040
1.0053
1.0066
1.0080
1.0093
1.0106
1.0119
1.0133
1.0146
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
1.0159
1.0172
1.0185
1.0200
1.0212
1.0226
1.0239
1.0253
1.0267
1.0280
1.0293
1.0306
1.0319
1.0332
1.0345
1.0358
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
30h
31h
32h
33h
34h
35h
36h
37h
1.0371
1.0384
1.0397
1.0410
1.0423
1.0436
1.0449
1.0462
1.0475
1.0488
1.0501
1.0514
1.0527
1.0540
1.0553
1.0566
For CPU substrate transistors that require the BJT transistor model, the ideality factor behaves slightly
differently than for discrete diode-connected transistors. Refer to Table 7.19 when using a CPU
substrate transistor.
Table 7.19 Substrate Diode Ideality Factor Look-Up Table (BJT Model)
SETTING
FACTOR
SETTING
FACTOR
SETTING
FACTOR
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0.9869
0.9882
0.9895
0.9908
0.9921
0.9934
0.9947
18h
19h
1Ah
1Bh
1Ch
1Dh
1Eh
1.0079
1.0092
1.0105
1.0120
1.0132
1.0146
1.0159
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
1.0291
1.0304
1.0317
1.0330
1.0343
1.0356
1.0369
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA3S9HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Table 7.19 Substrate Diode Ideality Factor Look-Up Table (BJT Model) (continued)
SETTING
FACTOR
SETTING
FACTOR
SETTING
FACTOR
0Fh
10h
11h
12h
13h
14h
15h
16h
17h
0.9960
0.9973
0.9986
1.0000
1.0013
1.0026
1.0039
1.0053
1.0066
1Fh
20h
21h
22h
23h
24h
25h
26h
27h
1.0173
1.0187
1.0200
1.0213
1.0226
1.0239
1.0252
1.0265
1.0278
2Fh
30h
31h
32h
33h
34h
35h
36h
37h
1.0382
1.0395
1.0408
1.0421
1.0434
1.0447
1.0460
1.0473
1.0486
APPLICATION NOTE: When measuring a 65nm Intel CPU, the Ideality Setting should be the default 12h. When
measuring a 45nm Intel CPU, the Ideality Setting should be 15h.
7.15
High Limit Status Register
Table 7.20 High Limit Status Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
High Limit
Status
35h
R-C
-
-
-
-
E3HIGH
E2HIGH
E1HIGH
IHIGH
00h
The High Limit Status Register contains the status bits that are set when a temperature channel high
limit is exceeded. If any of these bits are set, then the HIGH status bit in the Status Register is set.
Reading from the High Limit Status Register will clear all bits if. Reading from the register will also
clear the HIGH status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and
any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output
(see Section 6.3.2).
Bit 3 - E3HIGH (EMC1414 only) - This bit is set when the External Diode 3 channel exceeds its
programmed high limit.
Bit 2 - E2HIGH - This bit is set when the External Diode 2 channel exceeds its programmed high limit.
Bit 1 - E1HIGH - This bit is set when the External Diode 1 channel exceeds its programmed high limit.
Bit 0 - IHIGH - This bit is set when the Internal Diode channel exceeds its programmed high limit.
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA4S0HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
7.16
Low Limit Status Register
Table 7.21 Low Limit Status Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Low Limit
Status
36h
R-C
-
-
-
-
E3LOW E2LOW
E1LOW
ILOW
00h
The Low Limit Status Register contains the status bits that are set when a temperature channel drops
below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.
Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear
the LOW status bit in the Status Register.
The ALERT pin will be set if the programmed number of consecutive alert counts have been met and
any of these status bits are set.
The status bits will remain set until read unless the ALERT pin is configured as a comparator output
(see Section 6.3.2).
Bit 3 - E3LOW (EMC1414 only) - This bit is set when the External Diode 3 channel drops below its
programmed low limit.
Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low
limit.
Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low
limit.
Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.
7.17
Therm Limit Status Register
Table 7.22 Therm Limit Status Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Therm
Limit
Status
E3
E2
E1
THERM
37h
R-C
-
-
-
-
ITHERM
00h
THERM THERM
The Therm Limit Status Register contains the status bits that are set when a temperature channel
Therm Limit is exceeded. If any of these bits are set, the THERM status bit in the Status Register is
set. Reading from the Therm Limit Status Register will not clear the status bits. Once the temperature
drops below the Therm Limit minus the Therm Hysteresis, the corresponding status bits will be
automatically cleared. The THERM bit in the Status Register will be cleared when all individual channel
THERM bits are cleared.
Bit 3 - E3THERM (EMC1414 only) - This bit is set when the External Diode 3 channel exceeds its
programmed Therm Limit. When set, this bit will assert the THERM pin.
Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds its programmed Therm
Limit. When set, this bit will assert the THERM pin.
Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds its programmed Therm
Limit.
Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds its programmed Therm Limit.
When set, this bit will assert the THERM pin.
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA4S1HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
7.18
Filter Control Register
Table 7.23 Filter Configuration Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
40h
R/W
Filter Control
-
-
-
-
-
-
FILTER[1:0]
00h
The Filter Configuration Register controls the digital filter on the External Diode 1 channel.
Bits 1-0 - FILTER[1:0] - Control the level of digital filtering that is applied to the External Diode 1
temperature measurement as shown in Table 7.24. See Figure 6.3 and Figure 6.4 for examples on the
filter behavior.
Table 7.24 FILTER Decode
FILTER[1:0]
1
0
AVERAGING
0
0
1
1
0
1
0
1
Disabled (default)
Level 1
Level 1
Level 2
7.19
Product ID Register
Table 7.25 Product ID Register
ADDR
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
Product ID
(EMC1413)
FDh
FDh
R
0
0
1
0
0
0
0
1
21h
Product ID
(EMC1414)
R
0
0
1
0
0
1
0
1
25h
The Product ID Register holds a unique value that identifies the device.
7.20
SMSC ID Register
Table 7.26 Manufacturer ID Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
5Dh
FEh
R
SMSC ID
0
1
0
1
1
1
0
1
The Manufacturer ID register contains an 8-bit word that identifies the SMSC as the manufacturer of
the EMC1413 / EMC1414.
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA4S2HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
7.21
Revision Register
Table 7.27 Revision Register
ADDR.
R/W
REGISTER
B7
B6
B5
B4
B3
B2
B1
B0
DEFAULT
FFh
R
Revision
0
0
0
0
0
1
0
0
04h
The Revision register contains an 8-bit word that identifies the die revision.
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA4S3HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Chapter 8 Typical Operating Curves
Temperature Error vs. Ambient Temperature
(2N3904, TDIODE = 42.5°C, VDD = 3.3V)
Temperature Error vs. Filter Capacitor
(2N3904, TA = 27°C, TDIODE = 27°C, VDD = 3.3V)
1.0
0.8
1.0
0.8
0.6
0.5
0.4
0.3
0.2
0.0
0.0
-0.3
-0.5
-0.8
-1.0
-0.2
-0.4
-0.6
-0.8
-1.0
0
1000
2000
3000
4000
Filter Capacitor (pF)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient Temperature (°C)
Temperature Error vs. CPUTemperature
Typical 65nm CPUfrom major vendor
Temperature Error vs. External Diode Temperature
(2N3904, TA = 42.5°C, VDD = 3.3V)
(TA = 27°C, VDD= 3.3V, BETA = 011, CFILTER = 470pF)
1.0
0.8
5
4
3
0.6
Beta Compensation
Disabled
0.4
0.2
2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
1
0
Beta Compensation Enabled
-1
20
40
60
80
100
120
-40 -25 -10
5
20 35 50 65 80 95 110 125
CPU Temperature (°C)
External Diode Temperature (°C)
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA4S4HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Temperature Error vs. Ambient Temperature
(2N3904, TDIODE = 27°C, VDD = 3.3V)
Temperature Error vs. Series Resistance
1.0
0.8
0.6
0.4
0.2
0.0
120
100
80
60
40
20
0
2.0
1.5
EXT2 - A PD
EXT3 - A PD
REC Disabled
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
REC Enabled
0
50
100
150
200
Series R (Ohm)
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient Temperature (°C)
Supply Current vs. Conversion Rate
1200
1100
1000
900
800
700
600
500
400
300
200
Dynamic
Averaging
Enabled
Dynamic
Averaging
Disabled
1
2
4
8
16
32
64
Conversion Rate
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA4S5HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Chapter 9 Package Information
REVISION HISTORY
DESCRIPTION
INITIAL RELEASE
REVISION
A
DATE
RELEASED BY
S.K.ILIEV
5
3
3/29/05
D
PIN 1 IDENTIFIER
AREA (D/2 X E1/2)
e
c
4
3
E1
E
SEE DETAIL "A"
END VIEW
4
2
10X b
TOP VIEW
A2
A
C
SEATING PLANE
A1
ccc
C
NOTES:
1. ALL DIMENSIONS ARE IN MILLIMETER.
2. TOLERANCE ON THE TRUE POSITION OF EACH LEAD IS ± 0.04 mm AT MAXIMUM MATERIAL
CONDITION.
SIDE VIEW
3-D VIEW
3. PACKAGE BODY DIMENSIONS "D" AND "E1" DO NOT INCLUDE MOLD/INTERLEAD PROTRUSIONS
OR FLASH. MAXIMUM MOLD PROTRUSIONS OR FLASH IS 0.15 mm (0.006 INCHES) PER END AND
SIDE. DIMENSIONS "D" AND "E1" ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE
PLASTIC BODY, INCLUDING ANY MISMATCH BETWEEN TOP AND BOTTOM PLASTIC BODY. THEY
ARE DETERMINED AT DATUM PLANE "H".
H
4. DIMENSIONS "b" AND "c" APPLY TO THE FLAT SECTION OF THE LEAD BETWEEN 0.08 mm AND
0.15 mm FROM THE LEAD TIP.
5. DETAILS OF THE PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE
INDICATED.
C
GAUGE PLANE
0° - 8°
0.25
SEATING PLANE
THIRD ANGLE PROJECTION
UNLESS OTHERWISE SPECIFIED
DIMENSIONS ARE IN MILLIMETERS
AND TOLERANCES ARE:
L
80 ARKAY DRIVE
HAUPPAUGE, NY 11788
USA
DECIMAL
X.X ±0.1
ANGULAR
±1°
(0.95)
X.XX ±0.05
X.XXX ±0.025
TITLE
NAME
DATE
DIM AND TOL PER ASME Y14.5M
-
1994
PACKAGE OUTLINE
10 PIN TSSOP, 3x3 MM BODY, 0.50 MM PITCH
DETAIL "A"
MATERIAL
DRAWN
-
S.K.ILIEV
3/29/05
FINISH
CHECKED
DWG NUMBER
REV
-
S.K.ILIEV
3/29/05
3/29/05
A
MO-10-TSSOP-3x3
STD COMPLIANCE
APPROVED
SCALE
SHEET
PRINT WITH "SCALE TO FIT"
DO NOT SCALE DRAWING
S.K.ILIEV
1:1
JEDEC: MO-187
1 OF 1
Figure 9.1 10-Pin MSOP / TSSOP Package
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA4S6HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Figure 9.2 10-Pin DFN Package Drawing
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA4S7HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Figure 9.3 10-Pin DFN Package Dimensions
Figure 9.4 10 Pin DFN PCB Footprint
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA4S8HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
9.1
Package Markings
The EMC1414 devices will be marked as shown in Figure 9.5 and Figure 9.6.
The EMC1413 devices will be marked as shown in Figure 9.7 and Figure 9.8.
TOP
LINE 1: Device code, first 2 of last 6
3
L
3
L
L
L
L
L
digits of lot number
LINE 2: Last 4 digits of lot number
e4
PIN 1
BOTTOM
BOTTOM MARKING IS NOT ALLOWED
Figure 9.5 EMC1414-A 10-Pin DFN Package Markings
TOP
LINE: 1-T – Device Number
1 4 1 4
2x 1.5pt
V R C C
LINE: 2-T Version, Revision, Country Code (VRCC)
e3
PB-FREE/GREEN SYMBOL
(Matte Sn)
PIN 1
ALL TOP LINES CENTER
HORIZONTAL ALIGNMENT
BOTTOM
PIN 1
LINE: 1-B – Date Code (YYWW)
3x 1.5pt
Y Y W W
2 3
4 5 6 a
LINE: 2-B – First 3 Digits of Lot Number
LINE: 3-B – Last 4 Digits of Lot Number
1
Figure 9.6 EMC1414 10-Pin MSOP Package Markings
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA4S9HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
TOP
LINE 1: Device Code, First 2 of last 6 digits
of Lot Number
3
0
2x 0.6
LINE 2: Last 4 digits of Lot Number
e4
PB-FREE/GREEN SYMBOL
(Ni/Pd PP-LF)
PIN 1
LINES 1 & 2: CENTER HORIZONTAL ALIGNMENT
LINE 3: AS SHOWN
BOTTOM
BOTTOM MARKING IS NOT ALLOWED
Figure 9.7 EMC1413-A 10-Pin DFN Package Markings
TOP
LINE: 1-T – Device Number
1 4 1 3
2x 1.5pt
V R C C
LINE: 2-T Version, Revision, Country Code (VRCC)
e3
PB-FREE/GREEN SYMBOL
(Matte Sn)
PIN 1
ALL TOP LINES CENTER
HORIZONTAL ALIGNMENT
BOTTOM
PIN 1
LINE: 1-B – Date Code (YYWW)
3x 1.5pt
Y Y W W
1 2 3
LINE: 2-B – First 3 Digits of Lot Number
LINE: 3-B – Last 4 Digits of Lot Number
4 5 6 a
Figure 9.8 EMC1413 10-Pin MSOP Package Markings
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA5S0HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Chapter 10 Document Revision History
Table 10.1 Customer Revision History
REVISION LEVEL & DATE
SECTION/FIGURE/ENTRY
CORRECTION
Rev. 1.41 (02-23-12)
Chapter 3, Pin Description
Labeled exposed pad in pinout figure and added
row in pin description table. Recommendation is to
ground the exposed pad.
Rev. 1.40 (01-05-12)
Table 4.3, "SMBus Electrical
Specifications"
Added conditions for tHD:DAT. Data hold time
minimum of 0.3µs is required when receiving from
the master.
Section 5.1.8, "SMBus and
I2C Compatibility"
Renamed from “SMBus and I2C Compliance.” First
paragraph, added first sentence: “The EMC1413 /
EMC1414 is compatible with SMBus and I2C.”
And added last sentence: “For information on
using the EMC1413 / EMC1414 in an I2C system,
refer to SMSC AN 14.0 SMSC Dedicated Slave
Devices in I2C Systems.”
Rev. 1.39 (06-07-11)
Figure 3.2, "EMC1413 /
EMC1414 Pin Diagram,
DFN-10"
Updated to include EMC1414.
Figure 9.5, "EMC1414-A 10- Added.
Pin DFN Package Markings"
Ordering Information
Added EMC1414-A-AIA to ordering information
table.
Rev. 1.38 (09-30-10)
Table 4.2, "Electrical
Specifications"
Filter MAX changed from “2.5nF” to “2.7nF”.
Section 7.21, "Revision
Register"
Set revision ID to 04h.
Chapter 5, System
Management Bus Interface
Protocol
Updated error on ACK bit settings and reorganized
chapter information and moved ALERT pin
considerations.
Chapter 6, Product
Description
Reorganized information for temperature
monitoring and ALERT pin considerations.
Rev. 1.37 (12-23-09)
Section 7.21, "Revision
Register"
Changed default from 01h to 03h to match the
actual value.
Ordering Information
Added EMC1414-A-AIA-TR in a 10-pin DFN
Section 4.1, "Absolute
Maximum Ratings"
Updated voltage on 5V tolerant pins with pull up
from -0.3 to 3.6 to 0 to 3.6.
Chapter 9, Package
Information
Added package information for the TDFN.
Section 9.1, "Package
Markings"
Added package marking information for the TDFN.
SMSC EMC1413 / EMC1414
Revision 1.41 (02-23-12)
DATA5S1HEET
Multiple Channel 1°C Temperature Sensors with Beta Compensation
Datasheet
Table 10.1 Customer Revision History (continued)
REVISION LEVEL & DATE
SECTION/FIGURE/ENTRY
CORRECTION
Rev. 1.35 (05-06-09)
Pin Table
Identified 5V tolerant pins. Added the following
application note below table: “For the 5V tolerant
pins that have a pull-up resistor (SMCLK,
SMDATA, THERM, ALERT), the voltage difference
between VDD and the pull-up voltage must never
exceed 3.6V.”
Table 4.1, "Absolute
Maximum Ratings"
Updated voltage limits for 5V tolerant pins with
pull-up resistors.
Added the following note below table: “For the 5V
tolerant pins that have a pull-up resistor (SMCLK,
SMDATA, THERM, ALERT), the pull-up voltage
must not exceed 3.6V when the device is
unpowered.”
Table 4.2, "Electrical
Specifications"
Added leakage current
Ordering Information and
Table 2.1, “Part Selection”
Added EMC1414-3 and EMC1413-3
Updated figures for package
Table 9.2, "10-Pin DFN
Package Drawing"
Rev. 1.34 (12-02-08)
Initial document creation
Revision 1.41 (02-23-12)
SMSC EMC1413 / EMC1414
DATA5S2HEET
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