AAT1161IWO-0.6-T1 [SKYWORKS]
Switching Regulator,;
| 型号： | AAT1161IWO-0.6-T1 |
| 厂家： | 
SKYWORKS SOLUTIONS INC. |
| 描述： | Switching Regulator, 开关 |
| 文件： | 总18页 (文件大小：1528K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
General Description
Features
The AAT1161 is an 800kHz high efficiency step down
DC-DC converter with wide input voltage range. With
4.0V to 13.2V input rating, the AAT1161 is the perfect
choice for 2-cell Li+ battery powered devices and mid
power range regulated 12V powered applications. The
internal power switch is capable of delivering up to 3A
load current.
Input Voltage Range: 4.0V to 13.2V
Up to 3A Load Current
Fixed or Adjustable Output:
Output Voltage: 0.6V to VIN
Less than 1μA Shutdown Current
Up to 95% Efficiency
▪
Integrated High-Side Power Switch
External Schottky Rectifier
800kHz Switching Frequency
Soft Start Function
Short-Circuit and Over-Temperature Protection
Minimum External Components
Tiny 14-pin 3x3mm TDFN Package
Temperature Range: -40°C to +85°C
The AAT1161 is a highly integrated device in order to
simplify system level design for the users. It is a non-
synchronous converter that is used with an external
Schottky diode rectifier for low-cost applications.
Minimum external components are required for the con-
verter. All the control circuits are integrated in the IC.
The AAT1161 optimizes efficiency throughout the entire
load range. It operates in a combination PWM/Light Load
mode for improved light-load efficiency. It can also oper-
ate in a forced Pulse Width Modulation (PWM) mode for
easy control of the switching noise as well as faster tran-
sient response. The high switching frequency allows the
use of small external components. The low current shut-
down feature disconnects the load from VIN and drops
shutdown current to less than 1μA.
Applications
Digital Camcorders
Industrial Applications
Portable DVD Players
Rack Mounted Systems
Set Top Boxes
The AAT1161 is available in a Pb-free, space-saving,
thermally-enhanced 14-pin TDFN33 package and is rated
over an operating temperature range of -40°C to +85°C.
Typical Application
L1
VOUT
VIN 4.5V- 13.2V
3.8μH
5V, 3A
6
8
LX
EN
10
R4
9
1
C1
IN
LX
FB
R3
10Ω
D1
11
C6
100pF
C3, 4, 5
66μF
C2
0.1μF
432kΩ
IN
10μF
AAT1161
13
4, 5
7
AIN
12
2
C8
1μF
R6
59kΩ
PGND
COMP
DGND
N/C
R5
51kΩ
3
AGND
LDO
14
PGND
EP1
C7
C9
1μF
150pF
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Pin Descriptions
Pin #
Symbol Function
Output voltage feedback input. FB senses the output voltage for regulation control. For fixed output ver-
sions, connect FB to the output voltage. For adjustable versions, drive FB from the output voltage through
a resistive voltage divider. The FB regulation threshold is 0.6V.
1
FB
Control compensation node. In most configurations external compensation is not required. If external
compensation is required, connect a series RC network from COMP to AGND. See Compensation section.
2
3
COMP
AGND
DGND
EN
Analog signal ground. Used for the Compensation, LDO bypass and feedback divider ground. Connect
AGND to DGND/PGND at a single point as close to the IC as possible or directly under the package ex-
posed thermal pad (EP).
Digital/Power Ground. Used for the input and enable ground. Connect DGND to AGND/PGND at a single
point as close to the IC as possible or directly under the package exposed thermal pad (EP).
Active high enable input. Drive EN high to turn on the AAT1161; drive it low to turn it off. For automatic
startup, connect EN to IN through a 4.7kΩ resistor. EN must be biased high, biased low, or driven to a
logic level by an external source. Do not let the EN pin float when the device is powered.
4, 5
6
7
N/C
LX
No Connect. Leave floating; do not connect anything to this pin.
Power switching node. LX is the drain of the internal P-channel switch. Connect the external rectifier
from LX to PGND and the external LC output filter from LX to the load.
8, 9
Power source input. Connect IN to the input power source. Bypass IN to DGND with a 10μF or greater
capacitor. Connect both IN pins together as close to the IC as possible. An additional 100nF ceramic
capacitor should also be connected between the two IN pins and DGND.
Power Ground. The exposed thermal pad (EP) should be connected to board ground plane and pins 3, 4,
5 and 12 directly under the package. The ground plane should include a large exposed copper pad under
the package for thermal dissipation (see package outline).
Internal analog bias input. AIN supplies internal power to the AAT1161. Connect AIN to the input source
voltage and bypass to AGND with a 0.1μF or greater capacitor. For additional noise rejection, connect to
the input power source through a 10Ω or lower value resistor.
10, 11
12, EP
13
IN
PGND
AIN
Internal LDO bypass node. The output voltage of the internal LDO is bypassed at LDO. The internal cir-
cuitry of the AAT1161 is powered from LDO. Do not draw external power from LDO. Bypass LDO to AGND
with a 1μF or greater capacitor.
14
LDO
Pin Configuration
TDFN33-14
(Top View)
1
2
3
4
5
6
7
14
13
12
11
10
9
FB
COMP
AGND
DGND
DGND
EN
LDO
AIN
PGND
IN
IN
LX
8
N/C
LX
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Absolute Maximum Ratings1
Symbol
Description
Value
Units
VIN, VAIN
VLX
VFB
VEN
TJ
Input Voltage
LX to GND Voltage
FB to GND Voltage
EN to GND Voltage
-0.3 to 14
V
V
V
V
°C
-0.3 to VIN + 0.3
-0.3 to VIN + 0.3
-0.3 to VIN + 0.3
-40 to 150
Operating Junction Temperature Range
Thermal Information2
Symbol
Description
Maximum Power Dissipation3
Thermal Resistance
Value
Units
PD
JA
2.0
50
W
°C/W
1. Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional operation at conditions other than the operating conditions
specified is not implied. Only one Absolute Maximum Rating should be applied at any one time.
2. Mounted on an FR4 board.
3. Derate 20mW/°C above 25°C.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Electrical Characteristics
4.0V < VIN < 13.2V. CIN= 22ꢀF, COUT= 66ꢀF; L= 2.2ꢀH or 3.8ꢀH, TA= -40 to +85C unless otherwise noted. Typical val-
ues are at TA= 25C.
Symbol Description
Conditions
Min
Typ
Max
Units
VIN
Input Voltage Range
4.0
13.2
4.0
V
Rising
VUVLO
Input Under-Voltage Lockout
V
Hysteresis
No Load
VEN = GND
0.3
150
IQ
ISHDN
Supply Current
Shutdown Current
300
1
ꢀA
ꢀA
0.94
VIN
2.5
VOUT
Output Voltage Range
Output Voltage Accuracy
Line Regulation
0.6
V
%
VOUT
VLINEREG
VIN
IOUT = 0A to 3A
-2.5
/
VIN = 4.5V to 13.2V
0.023
0.4
%/V
%
VLOADREG
Load Regulation
Feedback Reference Voltage (adjustable
version)
VIN = 12V, VOUT = 5V, IOUT = 0A to 3A
No Load, TA = 25°C
VFB
0.59
0.6
0.60
0.61
0.2
V
Adjustable Version
VOUT = 1.2V
IFBLEAK
FB Leakage Current
ꢀA
Fixed Version
2
0.8
2
FOSC
TS
Oscillator Frequency
Start-Up Time
Foldback Frequency
Maximum Duty Cycle
Minimum Turn-On Time
Soft-Start Time
1
MHz
ms
kHz
%
ns
ms
IOUT = 3A, VOUT = 5V
200
DC
TON
TSS
94
100
2
VIN = 12V
VIN = 6V
VIN = 12V, VOUT = 5V, IOUT = 3A
0.12
0.15
90
RDS(ON)H
P-Channel On Resistance
ILIM
Efficiency
PMOS Current Limit
%
A
4.0
6.0
ILXLEAK
TSD
THYS
VILEN
VIHEN
IEN
LX Leakage Current
VIN = 13.2V, VLX = 0 to VIN
1
ꢀA
°C
°C
V
V
ꢀA
Over-Temperature Shutdown Threshold
Over-Temperature Shutdown Hysteresis
EN Logic Low Input Threshold
EN Logic High Input Threshold
EN Input Current
140
25
0.4
1.0
1.4
-1.0
VEN = 0V, VEN = 13.2V
1. The AAT1161 is guaranteed to meet performance specifications over the -40°C to +85°C operating temperature range and is assured by design, characterization, and correla-
tion with statistical process controls.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Typical Characteristics
Efficiency vs. Load Current
(VOUT = 5V)
Efficiency vs. Load Current
(VOUT = 3.3V)
100
90
80
70
60
50
100
90
80
70
60
50
VIN = 5V
IN = 7V
40
30
20
10
0
40
30
20
10
0
VIN = 6V
IN = 7V
V
V
VIN = 10V
VIN = 12V
VIN = 13.2V
VIN = 10V
VIN = 12V
VIN = 13.2V
0.0001
0.001
0.01
0.1
1
10
10
12
0.0001
0.001
0.01
0.1
1
10
10
12
Load Current (A)
Load Current (A)
Load Regulation
Load Regulation
(VOUT = 5V)
(VOUT = 3.3V)
1
0.75
0.5
1.5
1.25
1
VIN = 13.2V
VIN = 12V
IN = 10V
VIN = 7V
VIN = 6V
V
0.25
0
0.75
0.5
VIN = 13.2V
VIN = 12V
VIN = 10V
VIN = 7V
-0.25
-0.5
-0.75
-1
0.25
0
-0.25
-0.5
V
IN = 6V
0.0001
0.001
0.01
0.1
1
0.0001
0.001
0.01
0.1
1
Load Current (A)
Load Current (A)
Line Regulation
(VOUT = 5V)
Line Regulation
(VOUT = 3.3V)
1
0.8
0.6
0.4
0.2
0
1
0.8
0.6
0.4
0.2
0
3A
1.5A
1A
100mA
10mA
-0.2
-0.4
-0.6
-0.8
-1
-0.2
-0.4
-0.6
-0.8
-1
3A
1.5A
1A
100mA
10mA
6
7
8
9
10
11
5
6
7
8
9
10
11
Input Voltage (V)
Input Voltage (V)
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Typical Characteristics
Non Switching Supply Current vs. Input Voltage
P-Channel RDS(ON) vs. Temperature
(VIN = 6V)
200
180
160
180
85°C
170
25°C
-40°C
160
150
140
130
120
110
100
6V
140
120
12V
100
80
60
40
20
0
-40
-15
10
35
60
85
5
6
7
8
9
10
11
12
Input Voltage (V)
Temperature (°C)
Switching Frequency vs. Temperature
VOUT Tolerance vs. Temperature
(VIN = 6V)
(VOUT = 3.3V; ILOAD = 3A)
1
0.8
0.6
0.4
0.2
0
810
805
800
795
790
785
780
775
770
-0.2
-0.4
-0.6
-0.8
VIN = 12V
VIN = 6V
-40
-15
10
35
60
85
-40
-15
10
35
60
85
Temperature (°C)
Temperature (°C)
Load Transient
Line Transient
(VOUT = 5.0V; CFF = 100pF; VIN = 6V to 11V;
IOUT = 3A; CIN = 10µF; COUT = 66µF; L = 3.8µH)
(VOUT = 5.0V; CFF = 100pF; IOUT = 1A to 3A; COUT = 66µF)
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
8
7
6
5
4
3
2
1
0
5.2
5.1
20
18
16
14
12
10
8
5.0
4.9
4.8
4.7
4.6
4.5
6
4
Time (200ms/div)
Time (200ms/div)
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Typical Characteristics
Load Transient
Start-Up Time
(VOUT = 5.0V; CFF = 100pF; RLOAD = 1.67Ω;
CIN = 10µF; COUT = 22µF; L = 3.8µH)
(VOUT = 5.0V; CFF = 100pF; IOUT = 50mA to 3A; COUT = 66µF)
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
8
7
6
5
4
3
2
1
0
9
7
7
6
5
4
3
2
1
0
-1
5
3
1
-1
-3
-5
-7
VENABLE
VOUT
ILOAD
Time (200ms/div)
Time (1ms/div)
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Functional Block Diagram
IN
LDO
AIN
Internal
Power
LDO
*
FB
Current
Sense Amp
Err
DH
Amp
Comp
Voltage
Reference
LX
Control
Logic
PGND
DGND
Input
EN
AGND
COMP
*
For fixed output voltage versions, FB is connected to the error amplifier through the resistive voltage divider shown.
Control Loop
Functional Description
The AAT1161 regulates the output voltage using con-
stant frequency current mode control. The AAT1161
monitors current through the high-side P-channel
MOSFET and uses that signal to regulate the output volt-
age. This provides improved transient response and
eases compensation. Internal slope compensation is
included to ensure the current “inside loop” stability.
High efficiency is maintained under light load conditions
by automatically switching to variable frequency Light
Load control. In this condition, transition losses are
reduced by operating at a lower frequency at light loads.
The AAT1161 uses an external Schottky rectifier diode to
minimize cost.
The AAT1161 is a current-mode step-down DC/DC con-
verter that operates over a wide 4V to 13.2V input voltage
range and is capable of supplying up to 3A to the load
with the output voltage regulated as low as 0.6V. The
P-channel power switch is internal, reducing the number
of external components required. An external Schottky
diode is used for the low side rectifier. The output voltage
is adjusted by an external resistor divider; fixed output
voltage versions are available upon request. The regula-
tion system is externally compensated, allowing the cir-
cuit to be optimized for each application. The AAT1161
includes cycle-by-cycle current limiting, frequency fold-
back for improved short-circuit performance, and thermal
overload protection to prevent damage in the event of an
external fault condition.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Low Dropout Operation
Applications Information
The AAT1161 operates with duty cycle up to 100% to
minimize the dropout voltage, increasing the available
input voltage range for a given output voltage. As the
input voltage decreases toward the output voltage, the
duty cycle increases until it reaches the maximum on-
time. Further reduction of the supply voltage forces the
PMOS on 100%; the output voltage is determined by the
p-channel MOSFET switch and inductor voltage drops.
Setting the Output Voltage
Figure 1 shows the basic application circuit for the AAT1161
and output setting resistors. Resistors R3 and R6 program
the output to regulate at a voltage higher than 0.6V. To
limit the bias current required for the external feedback
resistor string while maintaining good noise immunity, the
minimum suggested value for R6 is 5.9kΩ. Although a
larger value will further reduce quiescent current, it will
also increase the impedance of the feedback node, making
it more sensitive to external noise and interference. Table
1 summarizes the resistor values for various output volt-
ages with R6 set to either 5.9kΩ for good noise immunity
or 59kΩ for reduced no load input current. The external
resistors set the output voltage according to the follow-
ing equation:
Short-Circuit Protection
The AAT1161 uses a cycle-by-cycle current limit to pro-
tect itself and the load from an external fault condition.
When the inductor current reaches the internally set
6.0A current limit, the P-channel MOSFET switch turns
off, limiting the inductor and the load current. During an
overload condition, when the output voltage drops below
25% of the regulation voltage (0.15V at FB), the
AAT1161 switching frequency drops by a factor of 4. This
gives the inductor current ample time to reset during the
off time to prevent the inductor current from rising
uncontrolled in a short-circuit condition.
⎛
R3⎞
R6⎠
V
OUT = 0.6V 1 +
⎝
or
V
⎛
⎝
⎞
-1 · R6
⎠
OUT
R3 =
V
REF
Thermal Protection
The adjustable feedback resistors, combined with an
external feed forward capacitor (C1 in Figure 1), deliver
enhanced transient response for extreme pulsed load
applications. The addition of the feed forward capacitor
typically requires a larger output capacitor C3/C4/C5 for
stability. Larger C3/C4/C5 values reduce overshoot and
undershoot during startup and load changes. However,
do not exceed 470pF to maintain stable operation.
The AAT1161 includes thermal protection that disables
the regulator when the die temperature reaches 140ºC.
It automatically restarts when the temperature decreas-
es by 25ºC or more.
L1
VOUT
VIN 4.5V- 13.2V
3.8μH
5V, 3A
6
8
LX
EN
10
R4
9
1
C1
IN
LX
FB
R3
10Ω
D1
11
C6
100pF
C3, 4, 5
66μF
C2
0.1μF
432kΩ
IN
10μF
AAT1161
13
4, 5
7
AIN
12
2
C8
1μF
R6
59kΩ
PGND
COMP
DGND
N/C
R5
51kΩ
3
AGND
LDO
14
PGND
EP1
C7
150pF
C9
1μF
Figure 1: Typical Application Circuit.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Table 1 shows the resistor selection for different output
voltage settings.
mum recommended inductor is 3.8ꢀH. For 3.3V and
below, use a 2 to 2.2ꢀH inductor. For optimum voltage-
positioning load transients, choose an inductor with DC
series resistance in the 15mꢁ to 20mꢁ range. For
higher efficiency at heavy loads (above 1A), or minimal
load regulation (but some transient overshoot), the
resistance should be kept below 18mꢁ. The DC current
rating of the inductor should be at least equal to the
maximum load current plus half the ripple current to
prevent core saturation (3A + 526mA). Table 2 lists
some typical surface mount inductors that meet target
applications for the AAT1161.
R6 = 5.9kΩ
R3 (kΩ)
R6 = 59kΩ
R3 (kΩ)
VOUT (V)
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.8
1.85
2.0
2.5
3.3
5.0
1.96
2.94
3.92
4.99
5.90
6.81
7.87
8.87
11.8
12.4
13.7
18.7
26.7
43.2
19.6
29.4
39.2
49.9
59.0
68.1
78.7
88.7
118
124
137
187
267
Manufacturer’s specifications list both the inductor DC
current rating, which is a thermal limitation, and the
peak current rating, which is determined by the satura-
tion characteristics. The inductor should not show any
appreciable saturation under normal load conditions.
Some inductors may meet the peak and average current
ratings yet result in excessive losses due to a high DCR.
Always consider the losses associated with the DCR and
its effect on the total converter efficiency when selecting
an inductor. For example, the 3.7μH CDR7D43 series
inductor selected from Sumida has an 18.9mΩ DCR and
a 4.3ADC current rating. At full load, the inductor DC
loss is 170mW which gives only a 1.13% loss in effi-
ciency for a 3A, 5V output.
432
Table 1: Resistor Selection for Different Output
Voltage Settings. Standard 1% Resistors are
Substituted for Calculated Values.
Inductor Selection
For most designs, the AAT1161 operates with inductors
of 2ꢀH to 4.7ꢀH. Low inductance values are physically
smaller, but require faster switching, which results in
some efficiency loss. The inductor value can be derived
from the following equation:
Input Capacitor Selection
The input capacitor reduces the surge current drawn
from the input and switching noise from the device. The
input capacitor impedance at the switching frequency
shall be less than the input source impedance to prevent
high frequency switching current passing to the input. A
low ESR input capacitor sized for maximum RMS current
must be used. Ceramic capacitors with X5R or X7R
dielectrics are highly recommended because of their low
ESR and small temperature coefficients. A 22ꢀF ceramic
capacitor is sufficient for most applications.
VOUT · (VIN
-
VOUT
)
L1 =
VIN · ΔIL · FOSC
Where ∆IL is inductor ripple current. Large value induc-
tors lower ripple current and small value inductors result
in high ripple currents. Choose inductor ripple current
approximately 32% of the maximum load current 3A, or
∆IL = 959mA. For output voltages above 3.3V, the mini-
Max DCR
(mΩ)
Rated DC
Current (A)
Size WxLxH
(mm)
Manufacturer
Part Number
L (μH)
Sumida
Sumida
Coilcraft
CDRH103RNP-2R2N
CDR7D43MNNP-3R7NC
MSS1038-382NL
2.2
3.7
3.8
16.9
18.9
13
5.10
4.3
4.25
10.3x10.5x3.1
7.6x7.6x4.5
10.2x7.7x3.8
Table 2: Typical Surface Mount Inductors.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
To estimate the required input capacitor size, determine
the acceptable input ripple level (VPP) and solve for C.
The calculated value varies with input voltage and is a
maximum when VIN is double the output voltage.
minimizing EMI and input voltage ripple. The proper
placement of the input capacitor (C6) can be seen in the
evaluation board layout in Figure 3. Additional noise fil-
tering for proper operation is accomplished by adding a
small 0.1ꢀF capacitor on the IN pins (C2).
VO
⎛
VO ⎞
VIN ⎠
· 1 -
⎝
A laboratory test set-up typically consists of two long
wires running from the bench power supply to the eval-
uation board input voltage pins. The inductance of these
wires, along with the low-ESR ceramic input capacitor,
can create a high Q network that may affect converter
performance. This problem often becomes apparent in
the form of excessive ringing in the output voltage dur-
ing load transients. Errors in the loop phase and gain
measurements can also result. Since the inductance of a
short PCB trace feeding the input voltage is significantly
lower than the power leads from the bench power sup-
ply, most applications do not exhibit this problem. In
applications where the input power source lead induc-
tance cannot be reduced to a level that does not affect
the converter performance, a high ESR tantalum or alu-
minum electrolytic should be placed in parallel with the
low ESR, ESL bypass ceramic. This dampens the high Q
network and stabilizes the system.
VIN
CIN =
⎛ VPP
⎝ IO
⎞
- ESR ·FOSC
⎠
VO
⎛
VO ⎞
VIN ⎠
1
· 1 -
⎝
=
for VIN = 2 · VO
VIN
4
1
CIN(MIN)
=
⎛ VPP
⎝ IO
⎞
- ESR · 4 · FOSC
⎠
Always examine the ceramic capacitor DC voltage coef-
ficient characteristics when selecting the proper value.
For example, the capacitance of a 10μF, 16V, X5R ceram-
ic capacitor with 12V DC applied is actually about
8.5μF.
The maximum input capacitor RMS current is:
VO
⎛
VO ⎞
VIN ⎠
IRMS = IO ·
· 1 -
⎝
Output Capacitor Selection
VIN
The output capacitor is required to keep the output volt-
age ripple small and to ensure regulation loop stability.
The output capacitor must have low impedance at the
switching frequency. Ceramic capacitors with X5R or
X7R dielectrics are recommended due to their low ESR
and high ripple current. The output ripple VOUT is deter-
mined by:
The input capacitor RMS ripple current varies with the
input and output voltage and will always be less than or
equal to half of the total DC load current:
VO
VO
1
2
⎛
⎞
· 1 -
=
D · (1 - D) = 0.52 =
VIN
VIN
⎠
⎝
VOUT · (VIN - VOUT
)
⎛
1
⎞
for VIN = 2 · VO
ΔVOUT
≤
· ESR +
⎝
VIN · FOSC · L
8 · FOSC · COUT
⎠
IO
2
IRMS(MAX)
=
The output capacitor limits the output ripple and pro-
vides holdup during large load transitions. A 10μF to
47μF X5R or X7R ceramic capacitor typically provides
sufficient bulk capacitance to stabilize the output during
large load transitions and has the ESR and ESL charac-
teristics necessary for low output ripple. The output volt-
age droop due to a load transient is dominated by the
capacitance of the ceramic output capacitor. During a
step increase in load current, the ceramic output capac-
itor alone supplies the load current until the loop
responds. Within two or three switching cycles, the loop
responds and the inductor current increases to match
the load current demand. The relationship of the output
VO
⎛
VO
1 -
⎞
⎠
·
VIN
⎝
VIN
The term
appears in both the input voltage rip-
ple and input capacitor RMS current equations and is at
maximum when VO is twice VIN. This is why the input
voltage ripple and the input capacitor RMS current ripple
are a maximum at 50% duty cycle. The input capacitor
provides a low impedance loop for the edges of pulsed
current drawn by the AAT1161. Low ESR/ESL X7R and
X5R ceramic capacitors are ideal for this function. To
minimize stray inductance, the capacitor should be
placed as closely as possible to the IC. This keeps the
high frequency content of the input current localized,
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
voltage droop during the three switching cycles to the
output capacitance can be estimated by:
FOSC is the switching frequency and COUT is based on the
output capacitor calculation. The CCOMP value can be
determined from the following equation:
3 · ΔILOAD
DROOP · FOSC
4
COUT
=
CCOMP (C) =
V
FOSC
10
2πRCOMP (R5) ·
Once the average inductor current increases to the DC
load level, the output voltage recovers. The above equa-
tion establishes a limit on the minimum value for the
output capacitor with respect to load transients. The
internal voltage loop compensation also limits the mini-
mum output capacitor value to 22μF. This is due to its
effect on the loop crossover frequency (bandwidth),
phase margin, and gain margin. Increased output capac-
itance will reduce the crossover frequency with greater
phase margin.
Schottky Diode Selection
Power dissipation is the limiting factor when choosing a
diode. The worst-case average power can be calculated
as follows:
VOUT
⎛
PDIODE = 1 -
⎝
⎞
⎠
⋅ IOUT ⋅ VF
VIN
The maximum output capacitor RMS ripple current is
given by:
where VF is the voltage drop across the diode at the
given output current IOUTMAX. The total power dissipation
of the diode is the combined totaI of forward power dis-
sipation, reverse power dissipation and switching loss.
Ensure that the selected diode will be able to dissipate
the power based on the equation:
1
V
OUT · (VIN(MAX) - VOUT
)
IRMS(MAX)
=
·
L · FOSC · VIN(MAX)
2 · 3
Dissipation due to the RMS current in the ceramic output
capacitor ESR is typically minimal, resulting in less than
a few degrees rise in hot-spot temperature.
TJ(MAX) = TAMB + ΘJA · PDIODE
Where:
Compensation
θJA = Package Thermal Resistance (°C/W)
TJ(MAX) = Maximum Device Junction Temperature (°C)
TA = Ambient Temperature (°C)
The AAT1161 step-down converter uses peak current
mode control with slope compensation scheme to main-
tain stability with lower value inductors for duty cycles
greater than 50%. The regulation feedback loop in the
IC is stabilized by the components connected to the
COMP pin, as shown in Figure 1.
For reliable operation over the input voltage range,
ensure that the reverse-repetitive maximum voltage is
greater than the maximum input voltage (VRRM>VINMAX).
The diode’s forward-current specification must meet or
exceed the maximum output current (IF(AV)>=IOUTMAX).
See Table 3 for recommended diodes for different IOUT
conditions.
To optimize the compensation components, the following
equations can be used. The compensation resistor RCOMP
(R5) is calculated using the following equation:
2πVOUT · COUT
10GEA · GCOMP · VFB
·
FOSC
RCOMP (R5)=
Where VFB = 0.6V, GCOMP = 40.1734 and GEA = 9.091 ·
10-5.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Part Number
VF
IF(AV
)
VRRM
θJA
TJ(MAX)
Manufacturer Dimensions (mm)
M1FM3
D1FH3
SK32
0.46V
0.36V
0.5V
0.475A
0.43
0.5V
0.485V
0.43V
3A
3A
3A
3A
3A
2A
1A
30V
30V
20V
20V
40V
20V
30V
20V
80°C/W
65°C/W
60°C/W
55°C/W
46°C/W
25°C/W
426°C/W
426°C/W
150°C
125°C
150°C
125°C
150°C
150°C
125°C
125°C
Shindengen
Shindengen
MCC
Jinan Jingheng
IR/Microsemi
Diodes Inc.
Diodes Inc.
Diodes Inc.
2.8x1.8
4.4x2.5
7x6
4.3x3.6
7x6
4.3x3.6
1.7x1.3
1.7x1.3
SS5820
30BQ040/LSM345
B220/A
SDM100K30L
B0520WS
0.5A
Table 3: Recommended Schottky Diodes for Different Output Current Requirements.
4. The input capacitors (C2 and C6) should be con-
Layout Guidance
nected as close as possible to IN (Pins 4 and 5) and
DGND (Pin 6) to get good power filtering.
5. Keep the switching node LX away from the sensitive
FB node.
6. The feedback trace for the FB pin should be separate
from any power trace and connected as closely as
possible to the load point. Sensing along a high-
current load trace will degrade DC load regulation.
The feedback resistors should be placed as close as
possible to the FB pin (Pin 9) to minimize the length
of the high impedance feedback trace.
Figure 2 is the schematic for the evaluation board. When
laying out the PC board, the following layout guideline
should be followed to ensure proper operation of the
AAT1161:
1. Exposed pad EP1 must be reliably soldered to PGND/
DGND/AGND. The exposed thermal pad should be
connected to board ground plane and pins 6, 11, 13,
and 16. The ground plane should include a large
exposed copper pad under the package for thermal
dissipation.
7. The output capacitors C3, 4, and 5 and L1 should be
connected as close as possible and there should not
be any signal lines under the inductor.
8. The resistance of the trace from the load return to
the PGND (Pin 16) should be kept to a minimum.
This will help to minimize any error in DC regulation
due to differences in the potential of the internal
signal ground and the power ground.
2. The power traces, including GND traces, the LX
traces and the VIN trace should be kept short, direct
and wide to allow large current flow. The L1 connec-
tion to the LX pins should be as short as possible.
Use several via pads when routing between layers.
3. Exposed pad pin EP2 must be reliably soldered to the
LX pins 1 and 2. The exposed thermal pad should be
connected to the board LX connection and the induc-
tor L1 and also pins 1 and 2. The LX plane should
include a large exposed copper pad under the pack-
age for thermal dissipation.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
JP1
R1
4.75K
EN
R2
D1
Schottky
TP1
LX
NP
DGND
U1
VOUT
AAT1161
TP2
L1
VIN
6
10
11
9
8
1
2
TP3
EN
IN
LX
LX
3.3μH
VOUT
TB1
C1
VIN
TB2
IN
FB
R3
10
R4
43.2K
0.1μF
C2
COMP
100pF
13
3
7
AIN
AGND
N/C
R5
51.0K
4
12
VOUT
TB4
DGND
PGND
C3
22μF
C4
22μF
C5
22μF
C6
150pF
NP
VIN
TB3
C7
22μF
TP4
5
14
DGND
LDO
EP
C8
LDO
R6
5.90K
0.1μF
C9
150pF
C10
0.1μF
GND
TP5
GND
TP7
GND
GND
DGND PGND
PGND
AGND
Note: Connect GND, DGND, PGND, and AGND at IC
C2 - Increase C2 to reduce overshoot
Figure 2: AAT1161 Evaluation Board Schematic.
Figure 3: AAT1161 Evaluation Board
Top Side Layout.
Figure 4: AAT1161 Evaluation Board
Bottom Side Layout.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Design Example
Specifications
VOUT
VIN
5V @ 3A, Pulsed Load ILOAD = 3A
12V nominal
FOSC
TAMB
800kHz
85°C in TDFN34-16 Package
Output Inductor
VOUT · (VIN VOUT
L1 =
-
)
= 3.8µH; see Table 2.
VIN · ΔIL · FOSC
ΔIL = 0.32 · ILOAD
For Coilcraft inductor MSS1038 3.8ꢀH DCR = 13m max.
⎛
⎞
⎠
VOUT
VO1
5
V
5V
⎛
⎞
⎠
ΔI1 =
⋅ 1 -
⎝
=
⋅ 1 -
= 959mA
⎝
L1 ⋅ FOSC
VIN
3.8µH ⋅ 800kHz
12V
ΔI1
2
IPK1 = ILOAD
+
= 3A + 0.479A = 3.48A
2
PL1 = ILOAD ⋅ DCR = 3A2 ⋅ 13mΩ = 117mW
Output Capacitor
VDROOP = 0.2V
3 · ΔILOAD
VDROOP · FOSC
3 · 3A
COUT
=
=
= 56µF; use three 22µF
0.2V · 800kHz
(VOUT) · (VIN(MAX) - VOUT
)
1
5V · (12V - 5V)
1
·
= 277mArms
IRMS(MAX)
=
·
=
3.8µH · 800kHz · 12V
L · FOSC · VIN(MAX)
2· 3
2· 3
Pesr = esr · IRMS2 = 5mΩ · (277mA)2 = 384µW
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Input Capacitor
Input Ripple VPP = 50mV
1
1
CIN =
=
= 26µF; use 22µF
⎛ VPP
⎝ ILOAD
⎞
⎛ 50mV
⎞
⎠
- ESR · 4 · FOSC
- 5mΩ · 4 · 800kHz
⎠
⎝
3A
ILOAD
IRMS(MAX)
=
= 1.5Arms
2
P = esr · IRMS2 = 5mΩ · (1.5A)2 = 11.25mW
AAT1161 Losses
Total losses can be estimated by calculating at the nominal input voltage (12V). All values assume an 85°C ambient
temperature and a 140°C junction temperature with the TDFN 50°C/W package.
RDS(ON) = 0.18
tSW = 5ms
IQ = 300ꢀA
ILOAD2 · (RDS(ON) · VOUT
)
+ [(tsw · FOSC · ILOAD + IQ) · VIN]
PLOSS
=
VIN
PLOSS = 823mW
TJ(MAX) = TAMB + ΘJA · PLOSS = 85°C + (50°C/W) · 0.823W = 126°C
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Ordering Information
Package
Marking1
Part Number (Tape and Reel)2
AAT1161IWO-0.6-T1
TDFN33-14
1HXYY
Skyworks Green™ products are compliant with
all applicable legislation and are halogen-free.
For additional information, refer to Skyworks
Definition of Green™, document number
SQ04-0074.
Package Information
TDFN33-143
Detail "A"
Index Area
1.650 0.050
3.000 0.050
Top View
Bottom View
0.425 0.050
+ 0.100
0.000
- 0.000
Pin 1 Indicator
(Optional)
Side View
Detail "A"
All dimensions in millimeters.
1. XYY = assembly and date code.
2. Sample stock is generally held on part numbers listed in BOLD.
3. The leadless package family, which includes QFN, TQFN, DFN, TDFN and STDFN, has exposed copper (unplated) at the end of the lead terminals due to the manufacturing
process. A solder fillet at the exposed copper edge cannot be guaranteed and is not required to ensure a proper bottom solder connection.
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DATA SHEET
AAT1161
13.2V Input, 3A Step-Down Converter
Copyright © 2012 Skyworks Solutions, Inc. All Rights Reserved.
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works may change its documentation, products, services, specifications or product descriptions at any time, without notice. Skyworks makes no commitment to update the materials or information and shall have no
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