AAT1164B-Q5-T [AAT]
TRIPLE-CHANNEL TFT LCD POWER SOLUTION; 三通道TFT LCD电源解决方案型号: | AAT1164B-Q5-T |
厂家: | ADVANCED ANALOG TECHNOLOGY, INC. |
描述: | TRIPLE-CHANNEL TFT LCD POWER SOLUTION |
文件: | 总24页 (文件大小:1242K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
Product information presented is current as of publication date. Details are subject to change without notice.
TRIPLE-CHANNEL TFT LCD POWER SOLUTION
WITH OPERATIONAL AMPLIFIERS
FEATURES
GENERAL DESCRIPTION
The AAT1164/AAT1164B/AAT1164C is a triple-channel
TFT LCD power solution that provides a step-up PWM
controller, two high voltage LDO drivers (one for positive
voltage and one for negative voltage), five operational
amplifiers, and one high voltage switch up to 28V for
TFT LCD display.
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Built in 3A, 0.2Ω Switching NMOS
Positive LDO Driver Up to 28V/5mA
Negative LDO Driver Down to –14V/5mA
1 VCOM and 4 VGAMMA Operational Amplifiers
28V High Voltage Switch for VGH
Internal Soft-Start Function
The PWM controller consists of an on-chip voltage
reference, oscillator, error amplifier, current sense circuit,
comparator, under-voltage lockout protection and
internal soft-start circuit. The thermal and power fault
protection prevents internal circuit being damaged by
excessive power.
1.2MHz Fixed Switching Frequency
3 Channels Fault and Thermal Protection
Low Dissipation Current
QFN-32 Package Available
The high voltage LDO drivers generate two regulated
output voltage (VOUT2 and VOUT3) set by external resistor
dividers. VGH voltage does not activate until DLY voltage
exceeds 1.25V.
PIN CONFIGURATION
The AAT1164/AAT1164B/AAT1164C contains 4+1
operational amplifiers. VO1, VO2, VO4, and VO5 are for
gamma corrections and VO3 is for VCOM. In the short
circuit condition, operational amplifiers are capable of
sourcing 100mA current for VGAMMA, and 200mA
current for VCOM
.
With the minimal external components, the
AAT1164/AAT1164B/AAT1164C offers a simple and
economical solution for TFT LCD power.
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
ORDERING INFORMATION
DEVICE
TYPE
TEMP.
RANGE
MARKING
DESCRIPTION
PART NUMBER
PACKAGE PACKING
MARKING
1. Part Name
2. Lot No.
(6~9 Digits)
3. Date Code
(4 Digits)
AAT1164
XXXXX
XXXX
Q5:VQFN
32-5*5
T: Tape
and Reel
ꢀ
ꢀ
AAT1164
AAT1164-Q5-T
–40 C to +85 C
1. Part Name
AAT1164B 2. Lot No.
XXXXX
XXXX
Q5:VQFN
32-5*5
T: Tape
and Reel
ꢀ
ꢀ
AAT1164B AAT1164B-Q5-T
AAT1164C AAT1164C-Q5-T
(6~9 Digits)
3. Date Code
(4 Digits)
–40 C to +85 C
1. Part Name
AAT1164C 2. Lot No.
XXXXX
XXXX
Q5:VQFN
32-5*5
T: Tape
and Reel
ꢀ
ꢀ
(6~9 Digits)
3. Date Code
(4 Digits)
–40 C to +85 C
NOTE: All AAT products are lead free and halogen free.
TYPICAL APPLICATION
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
VDD
VALUE
7
UNIT
V
VDD to GND
VDD1, SW to GND (for AAT1164/AAT1164B)
VDD1, SW to GND (for AAT1164C)
VOUT3, OUT3, VGH to GND
OUT2 to GND
VH1
13.5
14.5
30
V
VH1
V
VH2
V
VH3
–14
V
Input Voltage 1 (IN1, IN2, IN3, DLY, CTL,)
VI1
VDD+0.3
V
Input Voltage 2 (VI1+, VI1–, VI2+, VI2–, VI3+, VI3–,
VI4+, VI4–, VI5+, VI5–)
VI2
VH1+0.3
V
Output Voltage 1 (EO,
V
)
VO1
VO2
VDD+0.3
VH1+0.3
V
V
REF
Output Voltage 2 (ADJ, VO1, VO2, VO3, VO4, VO5)
Operating Free-Air Temperature Range
Storage Temperature Range
–40 ꢀC to +85ꢀC
–45 ꢀC to +125ꢀC
1,600
ꢀC
ꢀC
TC
TSTORAGE
Pd
Power Dissipation
mW
Note: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. Exposure to absolute maximum rating conditions for extended period of time may affect device reliability.
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April 2007
AAT1164/AAT1164B/AAT1164C
ELECTRICAL CHARACTERISTICS
temperature, VDD = 3.3V, VDD1 = 10V.)
(VDD = 2.6V to 5.5V, TC = –40°C to 85°C , unless otherwise specified. Typical values are tested at 25°C ambient
PARAMETER
SYMBOL
TEST CONDITION
MIN
2.6
8
TYP
MAX
5.5
13
UNIT
V
VDD Input Voltage Range
VDD
AAT1164/AAT1164B
AAT1164C
V
VDD1 Input Voltage Range
VDD Under Voltage Lockout
VDD Operating Current
VDD1
VUVLO
IVDD
8
14
V
Falling
2.1
2.3
2.2
2.4
0.56
5.6
7
2.3
2.5
0.80
10.0
10
V
Rising
V
VIN1 = 1.5V, Not Switching
VIN1 = 1.0V, Switching
VVI1+~VVI5+ = 4V
mA
mA
mA
VDD1 Operating Current
Thermal Shutdown
IVDD1
ꢀ
TSHDN
160
C
Reference Voltage
PARAMETER
SYMBOL
TEST CONDITION
MIN
TYP
MAX
UNIT
IVREF = 100µA
Reference Voltage
VREF
1.231
1.250 1.269
V
IVREF = 100µA,
Line Regulation
Load Regulation
-
-
2
1
5
5
%/mV
%/mA
VDD = 2.6V~5.5V
IVREF = 0~100µA
Oscillator
PARAMETER
SYMBOL
fOSC
TEST CONDITION
MIN
1.05
84
TYP
1.20
87
MAX
1.35
90
UNIT
MHz
%
Oscillation Frequency
Maximum Duty Cycle
DMAX
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AAT1164/AAT1164B/AAT1164C
ELECTRICAL CHARACTERISTICS
temperature, VDD = 3.3V, VDD1 = 10V.)
(VDD = 2.6V to 5.5V, TC = –40°C to 85°C , unless otherwise specified. Typical values are tested at 25°C ambient
Soft Start & Fault Detect
PARAMETER
SYMBOL
tSS1
TEST CONDITION
MIN
TYP
14
MAX
UNIT
ms
ms
ms
ms
V
Channel 1 Soft Start Time
Channel 2 Soft Start Time
Channel 3 Soft Start Time
During Fault Protect Trigger Time
IN1 Fault Protection Voltage
IN2 Fault Protection Voltage
IN3 Fault Protection Voltage
tSS2
14
tSS3
14
tFP
55
VF1
1.00
0.40
1.00
1.05
0.45
1.05
1.10
0.50
1.10
VF2
V
VF3
V
Error Amplifier (Channel 1)
PARAMETER
SYMBOL
VIN1
TEST CONDITION
MIN
1.221
–40
TYP
1.233
0
MAX
1.245
40
UNIT
V
Feedback Voltage
V
= 1V to1.5V
Input Bias Current
IB1
nA
IN1
Level to Produce
VEO = 1.233V
Feedback-Voltage Line Regulation
0.05
0.15
%/mV
2.6V <
V
< 5.5V
DD
∆I = 5µA
Transconductance
Voltage Gain
Gm
AV
105
µS
1,500
V/V
N-MOS Switch (Channel 1)
PARAMETER
SYMBOL
ILIM
TEST CONDITION
MIN
TYP
3.0
MAX
UNIT
A
Current Limit
On-Resistance
RON
ISW = 1.0A
VSW = 12V
0.2
Ω
µ
A
Leakage Current
ISWOFF
0.01
20.00
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
ELECTRICAL CHARACTERISTICS
temperature, VDD = 3.3V, VDD1 = 10V.)
(VDD = 2.6V to 5.5V, TC = –40°C to 85°C , unless otherwise specified. Typical values are tested at 25°C ambient
Negative Charge Pump (Channel 2)
PARAMETER
IN2 Threshold Voltage
IN2 Input Bias Current
OUT2 Leakage Current
SYMBOL
VIN2
TEST CONDITIONS
IOUT2 = –100
MIN
235
–40
TYP
250
0
MAX
265
40
UNIT
mV
µ
A
IB2
VIN2 = –0.25V to 0.25V
VIN2 = 0V, OUT2 = –12V
nA
µ
A
IOFF2
–20
–50
OUT2 Source Current
IOUT2
VIN2 = 0.35V, OUT2 = –10V
1
4
mA
Positive Charge Pump (Channel 3)
PARAMETER
IN3 Threshold Voltage
IN3 Input Bias Current
OUT3 Leakage Current
OUT3 Sink Current
SYMBOL
TEST CONDITIONS
MIN
1.22
–40
TYP
1.25
0
MAX
1.28
40
UNIT
V
IOUT3 = 100µA
VIN3
IB3
VIN3 = 1V to 1.5V
nA
µ
A
IOFF3
IOUT3
VIN3 = 1.4V, OUT3 = 28V
VIN3 = 1.1V, OUT3 = 25V
40
80
1
4
mA
High Voltage Switch Controller
PARAMETER
DLY Source Current
SYMBOL
IDLY
TEST CONDITIONS
MIN
TYP
−5
MAX
−6
UNIT
µ
A
−
4
DLY Threshold Voltage
DLY Discharge RON
VDLY
RDLY
VIL
1.22
1.25
8
1.28
V
Ω
V
CTL Input Low Voltage
CTL Input High Voltage
CTL Input Bias Current
Propagation Delay CTL to VGH
VOUT3 to VGH Switch R-on
ADJ to VGH Switch R-on
VGH to GND1 Switch R-on
0.5
40
VIH
2
V
IB4
VCTL = 0 to VDD
–40
0
nA
ns
Ω
tPP
OUT3 = 25V
100
15
RONSC
RONDC
RONCG
VDLY = 1.5V, VCTL = VDD
VDLY = 1.5V, VCTL = GND
VDLY = 1V
30
60
30
Ω
1.5
2.5
3.5
kΩ
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April 2007
AAT1164/AAT1164B/AAT1164C
ELECTRICAL CHARACTERISTICS
(VDD = 2.6V to 5.5V, TC = –40°C to 85°C , unless otherwise specified. Typical values are tested at 25°C ambient
temperature, VDD = 3.3V, VDD1 = 10V.)
VCOM and VGAMMA Buffer
PARAMETER
SYMBOL
VOS
TEST CONDITIONS
VVI1+ ~ VVI5+ = 4V
MIN
-
TYP
2
MAX UNIT
Input Offset Voltage
Input Bias Current
12
40
mV
nA
IB5
VVI1+ ~ VVI5+ = 4V
−40
0
IVO1, IVO2, IVO4, IVO5
5mA,
VVI1, VVI2, VVI4, VVI5 = 0V,
4V,10V
=
VVI–
+0.15
-
-
-
VOL
IVO3 = 50mA, VVI3 = 4V
4.03
-
4.06
-
Output Swing
V
IVO1, IVO2, IVO4, IVO5
–50mA,
VVI1, VVI2, VVI4, VVI5 = 0V,
4V, 10V
=
VVI–
−0.15
VOH
IVO3 = –50mA, VVI3 = 4V
IVO1, IVO2, IVO4, IVO5
IVO3
3.94
3.97
100
200
-
-
-
-
-
mA
mA
Short Circuit Current
ISHORT
VVI1+, VVI3+ = 2V to 8V,
VVI3+ ~ VVI5+ = 8V to 2V,
20% to 80%
V/µs
µs
Slew Rate
SR
tS
-
-
12
5
-
-
VVI1+ ~ VVI5+ = 3.5V to 4.5V,
90%
Settling Time
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AAT1164/AAT1164B/AAT1164C
TYPICAL OPERATING CHARACTERISTICS
ꢀ
(VIN = 5V, VOUT1 = 12V, VOUT2 = –7V, VOUT3 = 27V, TC = +25
C
, unless otherwise noted.)
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April 2007
AAT1164/AAT1164B/AAT1164C
TYPICAL OPERATING CHARACTERISTICS (CONT.)
ꢀ
(VIN = 5V, VOUT1 = 12V, VOUT2 = –7V, VOUT3 = 27V, TC = +25
C
, unless otherwise noted.)
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April 2007
AAT1164/AAT1164B/AAT1164C
PIN DESCRIPTION
PIN NO.
NAME
QFN-32
I/O
DESCRIPTION
1
VOUT3
VERF
GND
GND1
VO1
VI1–
VI1+
VO2
VI2–
VI2+
GND2
VI3+
VO3
VDD1
VI4+
VI4–
VO4
VI5+
VI5–
VO5
SW
-
O
-
Channel 3 Output Voltage (gate high voltage input)
2
Internal Reference Voltage Output
Ground
3
4
-
SW MOS Ground
5
O
I
Operational Amplifier 1 Output
Operational Amplifier 1 Negative Input
Operational Amplifier 1 Positive Input
Operational Amplifier 2 Output
Operational Amplifier 2 Negative Input
Operational Amplifier 2 Positive Input
Ground for Operational Amplifiers
VCOM Operational Amplifier Positive Input
VCOM Operational Amplifier Output
High Voltage Power Supply Input
Operational Amplifier 4 Positive Input
Operational Amplifier 4 Negative Input
Operational Amplifier 4 Output
Operational Amplifier 5 Positive Input
Operational Amplifier 5 Negative Input
Operational Amplifier 5 Output
Main PWM Switching Pin
6
7
I
8
O
I
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
I
-
I
I
-
I
I
O
I
I
O
-
VDD
IN1
-
Power Supply Input
I
Main PWM Feedback Pin
EO
O
I
Main PWM Error Amplifier Output
Positive Charge Pump Feedback Pin
IN3
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April 2007
AAT1164/AAT1164B/AAT1164C
PIN NO.
QFN-32
26
I/O
DESCRIPTION
NAME
OUT3
IN2
O
I
Positive Charge Pump Output
27
28
29
30
31
32
Negative Charge Pump Feedback Pin
Negative Charge Pump Output
OUT2
DLY
CTL
O
I
High Voltage Switch Delay Control
High Voltage Switch Control Pin
I
ADJ
O
O
Gate High Voltage Fall Time Setting Pin
Switching Gate High Voltage for TFT
VGH
–
–
–
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
FUNCTION BLOCK DIAGRAM
AAT1164/AAT1164B
2
22
VREF
VDD
Fail/ Thermal
Control
Fail
1.233V
Reference Voltage
1.25V
0.25V
SW
Error Amplifier
21
4
IN1
23
24
1. 233V
Digital Control Block
1
GND
EO
Comparator
Current Sense
and Limit
GND
GND2
OUT2
Oscillator
3
11
28
IN2
IN3
27
25
0.25V
OUT3
26
1.25V
VI1-
6
VO1
VO2
VO3
5
8
VI1+
7
9
VI2-
VI2+
10
12
VI3+
13
17
20
14
VI4-
16
VO4
VI4+
15
19
VI5-
VO5
VI5+
18
29
DLY
CTL
VDD1
High Voltage Control
30
31
VOUT3
ADJ
1
VGH
32
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
FUNCTION BLOCK DIAGRAM
AAT1164/AAT1164C
2
22
VREF
VDD
Fail/ Thermal
Control
Fail
1.233V
Reference Voltage
1.25V
0.25V
SW
Error Amplifier
21
4
IN1
23
1. 233V
Digital Control Block
1
GND
EO
24
Comparator
Current Sense
and Limit
GND
GND2
OUT2
Oscillator
3
11
28
IN2
IN3
27
25
0.25V
OUT3
26
1.25V
VI1-
6
VO1
VO2
VO3
5
8
VI1+
7
9
VI2-
VI2+
10
12
VI3+
13
17
20
14
VI4-
16
VO4
VI4+
15
19
VI5-
VO5
VI5+
18
29
DLY
CTL
VDD1
High Voltage Control
30
31
2.5kΩ
VOUT3
ADJ
1
VGH
32
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
TYPICAL APPLICATION CIRCUIT
Figure 1. Application Circuit
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April 2007
AAT1164/AAT1164B/AAT1164C
∆I
Lpeak-peak
DESIGN PROCEDURE
k =
I
IN
Boost Converter Design
: Boost converter efficiency
η
Setting the Output Voltage and Selecting
the Lead Compensation Capacitor
k: The ratio of the inductor peak to peak ripple current to
the input DC current
The output voltage of boost converter is set by the
resistor divider from the output (VOUT1) to GND with the
center tap connected to IN1, where VIN1, the boost
converter feedback regulation voltage is 1.233V,
Choose R2 (Figure 2) between 5.1kΩ to 51kΩ and
calculate R1 to satisfy the following equation.
VIN: Input voltage
VO: Output voltage
IO: Output load current
fS: Switching frequency
D: Duty cycle
∆ILpeak–peak: Inductor peak to peak ripple current
IIN: Input DC current
2
VOUT1
R1 = R
−1
V
IN1
The AAT1164 SW current limit ( LIM ) and inductor’s
I
saturation current rating ( LSAT ) should exceed IL(peak)
I
,
VOUT1
and the inductor's DC current rating should exceed IIN.
For the best efficiency, choose an inductor with less DC
series resistance (rL ).
VREF
IN1
R1
EO
gm
24
23
VIN1
and
>
IL(peak)
I
RC
CC
I
LSAT
LIM
R2
CP
I >I
LDC IN
V D
IN
,
I
= I
+
L(peak)
IN
GND
2Lf
S
GND
IO
η(1− D)
,
I
=
IN
Figure 2. Feedback Circuit
2
I
O
Inductor Selection
P
≈
r
L
DCR
η(1− D)
The minimum inductance value is selected to make
sure that the system operates in continuous conduction
mode (CCM) for high efficiency and to prevent EMI. The
equation of inductor uses a parameter k, which is the
ratio of the inductor peak to peak ripple current to the
input DC current. The best trade-off between voltage
ripple of transient output current and permanent output
ILDC: DC current rating of inductor
PDCR: Power loss of inductor series resistance
Table 1. Inductor Data List
rL
C6-K1.8L
DC CURRENT RATING
3.9
6.8
µ
µ
H
H
2.5A
41m
Ω
current has a k between 0.4 and 0.5.
ηV
68m
Ω
Ω
2.2A
1.8A
2
O
,
D(1−D)
L ≥
10µH
81m
kI f
O S
MITSUMI Product-Max Height:1.9mm
V
IN
D = 1−
V
O
,
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April 2007
AAT1164/AAT1164B/AAT1164C
Example 1: In the typical application circuit (Figure 1)
the output load current is 300mA with 13.3V output
voltage and input voltage of 5V. Choose a k of 0.431
and efficiency of 90%.
For example,
PDIODE = PDSW + PDCOM = 0.0273W or 0.68% power loss.
Input Capacitor Selection
The input capacitors have two important functions in
PWM controller. First, an input capacitor provides the
power for soft start procedure and supply the current for
the gate-driving circuit. A 10 µF ceramic capacitor is
used in typical circuit. Second, an input bypass
capacitor reduces the current peaks, the input voltage
drop, and noise injection into the IC. A low ESR
ceramics capacitor 0.1µF is used in typical circuit. To
ensure the low noise supply at VDD, VDD is decoupled
from input capacitor using an RC low pass filter.
0.9 *13.3
0.431* 0.3 *1.26
6.8µH
L ≥
0.624(0.376)2
≈
I
O
I
=
= 0.886A
IN
η(1− D)
V D
IN
I
= I +
IN
= 1.0778A
L(peak)
2Lf
S
PDCR = 0.0534W or 1.34% power loss
Schottky Diode Selection
Schottky has to be able to dissipate power. The
dissipated power is the forward voltage and input DC
current. To achieve the best efficiency, choose a
Schottky diode with less recovery capacitor (CT) for fast
recovery time and low forward voltage (VF).
For boost converter, the reverse voltage rating (VR)
should be higher than the maximum output voltage, and
current rating should exceed the input DC current.
VDD
VDD
PDIODE = PDSW + PDCOM
PDSW = (1–D) VFQRfS
QR = VRCTQR
Figure 3. Input Bypass Capacitor Affects the VDD
Drop.
PDCOM = VFIO (1–D)
Output Capacitor
The output capacitor maintains the DC output voltage. A
PDIODE: Total power loss of diode for boost converter
PDSW: Switching loss of diode for boost converter
PDCOM: Conduction loss of diode for boost converter
r
Low ESR ( C ) ceramic capacitor can reduce the output
ripple and power loss. There are two parameters which
can affect the output voltage ripple: 1. the voltage drops
when the inductor current flows through the ESR of
output capacitor; 2. charging and discharging of the
Table 2. Schottky Data List
SMA
VF
VR
CT
B220A
B240A
0.24V
0.24V
14V
28V
150pF
150pF
output capacitor also affect the output voltage ripple.
VRIPPLE = VRIPPLE (COUT ) + VRIPPLE (ESR)
DIODES Product-Max Height: 2.3mm
–
–
–
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
IOD
VRIPPLE (COUT ) ≈
β
fSCOUT
V
(ESR) ≈ I
r
RIPPLE
L(peak) C
V
D
D (1−D)R
2
L
O
I
=
+
[
]
C(rms)
R
1−D 12
Lf
S
L
2
P
= I
(
r
)
ESR
C(rms)
C
ESR: Equivalent Series Resistance
Figure 4. Closed-Current Loop for Boost with PCM
r
= 20mΩ
C
Example 2:
C
= 38µF,
) = 4.1mV
RIPPLE OUT
OUT
V
(C
V
(ESR)
= 21.5mV
+
RIPPLE
+
−
−
V
=
25.6mV
RIPPLE
I
= 0.411A
C(rms)
P
= 0.00338W or 0.08% power loss
ESR
Boost Converter Power loss
β
−
The largest portions of power loss in the boost
converter are the internal power MOSFET, the inductor,
the Schottky diode, and the output capacitor. If the
boost converter has 90% efficiency, there is
approximately 7.89% power loss in the internal
MOSFET, 1.34% power loss in the inductor, 0.68%
power loss in the Schottky diode, and 0.08% power loss
in the output capacitor.
+
Figure 5. Block Diagram of Boost Converter with
Peak Current Mode (PCM)
Power Stage Transfer Functions
The duty to output voltage transfer function Tp is
:
Loop Compensation Design
VO
d
(s + ωesr )(s − ω
)
z2
2
n
Tp(s)
=
= Tp0
The voltage-loop gain with current loop closed sets the
stability of steady state response and dynamic
performance of transient response. The loop
compensation design is as follows:
s2
+ 2ξωns + ω
−
rC
D R + rC
L
1
Where Tp0
=
VO
,
ω
=
esr
C
r
OUT C
1
−
(
)
(
)
And
2
RL
1
(
−
D
−
r
1−D 2 RL + r
)
(
)
ω
=
, ωn =
z2
L
LCOUT R + r
(
)
L C
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
2
[r R + r + R r 1−D ] + L
2
s2 + 2ξωns +ωn
2
C
(
)
(
)
12fS
OUT
L
C
L C
ξ =
,
T (s) =
x
icl
2
R + r [r + 1−D R ]
2
s+ ωzi s2 +
ω
shs +12fS
RCS pi0
T
(
)
2 LC
(
)
(
)
(
)
OUT
L
C
L
r = r + Dr + (1− D)R
F
L
DS
The Voltage-Loop Gain with Current Loop
Closed
rL is the inductor equivalent series resistance, rC is
capacitor ESR, RL is the converter load resistance, COUT
is the output filter capacitor, rDS is the transistor turn on
resistance, and RF is the diode forward resistance.
The duty to inductor current transfer functionTpi is:
The control to output voltage transfer function Td is
:
VO(s)
Td(s) =
= T (s)Tp(s)
icl
VC(s)
The voltage-loop gain with current loop closed is:
LVI(s) = TC(s)Td(s)
i
T (s) = = T
s +ω
zi
l
pi
pi0
2
2
d
s + 2ξω s +ω
n
n
β
VO R + 2r
2
,
1
L
C
12fS Tp0
RCSTpi0
s + ωc
Where Tpi0
=
ωzi =
= βgmRC
×
L R +r
L
COUT R / 2+r
( )
(
)
C
L
C
s
s + ω
s − ω
z2
Current Sampling Transfer Function
z1
s + ω (s2 + sω +12fS
)
2
Error voltage to duty transfer function Fm(s) is:
(
)
zi
sh
2
2
2fS s2 + 2ξω s +ω
d
n
n
V
FB
Fm(s) =
=
Where β =
Vei
Tpi0RCSs s +ω s +ω
V
O
(
)
(
)
zi
sh
The compensator transfer function
3
ωs
M2 − Ma
M1 + Ma
1−
1+
α
α
Whereωsh
ωs = 2 fS
=
,
α
=
,
V
s + ω
c
C
π
T (s) =
C
= g R
m C
,
V
s
fb
π
Where
1
ω
=
c
R C
C
Therefore, Fm(s) depends on duty to inductor current
transfer function Tpi(s), and fS is the clock switching
frequency; RCS is the current-sense amplifier
transresistance.
C
For the boost converter M1 = VIN / L and
M2 = (VO–VIN) / L.
For AAT1164, RCS = 0.24 V/A, Ma is slope
compensation, Ma = 0.8×106.
The closed-current loop transfer function Tpi(s) is
:
Figure 6. Voltage Loop Compensator
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
Compensator design guide:
Bode Diagram
60
1
2
1. Crossover frequencyfci
2. Gain margin>10dB
<
fS
40
20
0
-20
-40
-90
3. Phase margin>45
-135
-180
-225
-270
4. The LVI(s) = 1 at crossover frequency, Therefore,
the compensator resistance,
R
is determined by:
C
102
103
104
Frequency (Hz)
105
106
R + 2r
VO 2πfciCOUTRCS
L
C
RC
=
Figure 7. Bode Plot of Loop Gain Using Matlab®
Simulation
VFB
gmk
r
1− D R −
)
(
L
1− D
(
)
Table 3. k Factor Table
Best Corner
Positive and Negative LDO Driver
Output Voltage Selection
k Factor
COUT
Frequency
The output voltage of positive LDO driver is set by a
resistive divider from the output (VOUT3) to GND with the
center tap connected to the IN3, where VIN3, the positive
LDO driver feedback regulation voltage, is 1.25V.
21.533µF
25.079µF
32.587µF
36.312µF
38.469µF
23.740kHz
21.842kHz
20.095kHz
15.649kHz
13.247kHz
4.692
5.083
6.042
5.230
4.703
Choose R6 (Figure 8) between 10k
Ω and 51kΩ . And
calculate R5 with the following equation.
5. The output filter capacitor is chosen so
pole cancels R C zero
C R
OUT L
6
VOUT3
R5 = R
−1
C
C
V
IN3
R
L
The output voltage of negative LDO driver is set by a
resistive divider from the output (VOUT2) to VREF with
the center tap connected to IN2, where VIN2, the
negative LDO driver feedback regulation voltage, is
εRCCC = COUT
+ rC , and
2
R
L
COUT
CC
=
+ rC
εRC
2
ε = (1 ~ 3)
0.25V. Choose R9 (Figure 9) between10k
Ω and
51kΩ and calculate R8 with the following equation.
Example 3:
V
= 5V, VO = 13.3V, IO = 300mA, fS = 1,190kHz,
IN
9
V
− VOUT2
IN2
R8 = R
VFB = 1.233V,
L
= 6.65µH, gm = 85µS,
VREF − V
IN2
rL = 76.689mΩ
r
= 9.13mΩ RF = 0.7667Ω , C = 1.95nF,
C
C
µF
R
= 7.6kΩ
,
COUT = 38.5
,
ε
= 3,
R
= 0.23V/A.
C
CS
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Advanced Analog Technology, Inc.
April 2007
AAT1164/AAT1164B/AAT1164C
SW
C5
1µF
used. BAT54S (Figure 8 and 9) has fast recovery time
and low forward voltage for best efficiency.
VOUT1
C6
1µF
U1
BAT54S
13.3V/300mA
LDO Driver Base-Emitter Resistors
For AAT1164, the minimum drive current for positive
and negative LDO drivers are 1mA, thus the minimum
base-emitter resistance can be calculated by the
following equation:
R4
6.8kΩ
Q1
MMBT4403
OUT3 26
C7
1µF
U2
BAT54S
SW
R5
200 kΩ
VOUT3
25V/30mA
3 25
C8
1µF
R6
10kΩ
R4
R7
≥ VBE(max) / ((IOUT3(min) −IC ) / hfe(min))
(min)
(min)
VOUT3
1
≥ VBE(max) / ((IOUT2(min) −IC ) / hfe(min)
)
Figure 8. The Positive LDO Driver
Table 4. Pass Transistor Specifications
MMBT4401
0.65V
MMBT4403
VBE(max)
0.5V
90
h
130
fe(min)
DIODES Product, Package: SOT23
Example 5:
Output current of VOUT3 and VOUT2 are 30mA, the
minimum base-emitter resistor can be calculated as
Figure 9. The Negative LDO Driver
Example 4:
R4
R7
≥ 0.5 / ((1mA − 30mA ) / 90) ≥ 750Ω
(min)
(min)
≥ 0.65 / ((1mA − 30mA ) / 130) ≥ 845
Ω
For system design
The minimum value can be used, however, the larger
value has the advantage of reducing quiescent current.
VOUT3 = 25V, R5 = 200kΩ, R6 = 10kΩ,
VOUT2
= −6V, R8 = 62kΩ, R9 = 10kΩ
So we choose6.8kΩ to be R4.
Flying Capacitors
Charge Pump Output Capacitor
Increasing the flying capacitor (C5, C7, C9) values can
lower output voltage ripples. The 1µF ceramic
capacitors works well in positive LDO driver. A 0.1µF
ceramic capacitor works well in negative LDO driver.
Using low ESR ceramic capacitor to reduce the output
voltage ripple is recommended and output voltage ripple
is dominated by the capacitance value. The minimum
capacitance value can be calculated by the following
equation:
LDO Driver Diode
To achieve high efficiency, a Schottky diode should be
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AAT1164/AAT1164B/AAT1164C
ILOAD
COUT
≥
2VripplefS
Example 6:
The output voltage ripple of VOUT3 and VOUT2 is under
1%, the minimum capacitance value can be calculated
as
30mA
COUT(VOUT3 ) ≥
≈ 0.1µF
η
2× 250mV ×1.19MHz
30mA
COUT(VOUT2) ≥
≈ 0.33µF
η
2× 60mV ×1.19MHz
η
: Efficiency, about 60% at charge pump circuit
Table 5. Recommended Components
DESIGNATION DESCRIPTION
6.8 µH, 1.8A,
L
MITSUMI C6-K1.8L 6R8
200mA 30V Schottky barrier
diode (SOT-23),
U1, U2, U3
DIODES BAT54S
2A 20V rectifier diode
DIODES DFLS220L
10 µF, 25V X5R ceramic
capacitor
D
C3
1 µF, 25V X5R ceramic
capacitor
C5, C6, C7
0.1 µF, 50V X5R ceramic
capacitor
C2, C4, C9, C10, C12
Operational Amplifier
The AAT1164 has five independent amplifiers. The
operational amplifiers are usually used to drive VCOM
and the gamma correction divider string for TFT-LCD.
The output resistors and capacitors of amplifiers are
used as low pass filters and compensators for unity gain
stable.
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April 2007
AAT1164/AAT1164B/AAT1164C
Soft Start Waveform
supply. The ground connection of the VDD and VREF
bypass capacitor should be connected to the analog
ground pin (GND) with a wide trace.
LAYOUT CONSIDERATION
The system’s performances including switching noise,
transient response, and PWM feedback loop stability
are greatly affected by the PC board layout and
grounding. There are some general guidelines for
layout:
Output Capacitors
Place output capacitors as close as possible to the IC.
Minimize the length and maximize the width of traces to
get the best transient response and reduce the ripple
noise. We choose 10µF ceramics capacitor to reduce
the ripple voltage, and use 0.1µF ceramics capacitor to
reduce the ripple noise.
Inductor
Always try to use a low EMI inductor with a ferrite core.
Filter Capacitors
Place low ESR ceramics filter capacitors (between
0.1µF and 0.22µF) close to VDD and VREF pins. This
will eliminate as much trace inductance effects as
possible and give the internal IC rail a cleaner voltage
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AAT1164/AAT1164B/AAT1164C
Feedback
If external compensation components are needed for
stability, they should also be placed close to the IC.
Take care to avoid the feedback voltage-divider
resistors’ trace near the SW. Minimize feedback track
lengths to avoid the digital signal noise of TFT control
board.
Ground Plane
The grounds of the IC, input capacitors, and output
capacitors should be connected close to a ground plane.
It would be a good design rule to have a ground plane
on the PCB. This will reduce noise and ground loop
errors as well as absorb more of the EMI radiated by the
inductor. For boards with more than two layers, a
ground plane can be used to separate the power plane
and the signal plane for improved performance.
PC Board Layout
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April 2007
AAT1164/AAT1164B/AAT1164C
PACKAGE DIMENSION
VQFN32
C
PIN 1 INDENT
b
E2
E
e
A1
D
A
D2
L
Dimensions In Millimeters
Symbol
MIN
0.8
TYP
0.9
MAX
1.0
A
A1
b
C
D
0.00
0.18
------
4.9
0.02
0.25
0.2
0.05
0.30
------
5.1
5.0
D2
E
3.05
4.9
3.10
5.0
3.15
5.1
E2
e
L
3.05
------
0.35
0.000
3.10
0.5
0.40
------
3.15
------
0.45
0.075
y
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Advanced Analog Technology, Inc
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Page 24 of 24
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