SP488EEP [SIPEX]

Enhanced Quad RS-485/RS-422 Line Receivers; 增强型四RS - 485 / RS - 422线路接收器
SP488EEP
型号: SP488EEP
厂家: SIPEX CORPORATION    SIPEX CORPORATION
描述:

Enhanced Quad RS-485/RS-422 Line Receivers
增强型四RS - 485 / RS - 422线路接收器

线路驱动器或接收器 驱动程序和接口 接口集成电路 光电二极管 信息通信管理
文件: 总10页 (文件大小:113K)
中文:  中文翻译
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®
SP488E and SP489E  
Enhanced Quad RS-485/RS-422 Line Receivers  
RS-485 or RS-422 Applications  
Quad Differential Line Receivers  
Receiver Output Disable  
–7V to +12V Common Mode Input Range  
1mA Supply Current  
Single +5V Supply Operation  
Superior Drop-in Replacement for  
SN75173, SN75175, LTC488 and LTC489  
Improved ESD Specifications:  
+15kV Human Body Model  
+15kV IEC1000-4-2 Air Discharge  
+8kV IEC1000-4-2 Contact Discharge  
DESCRIPTION…  
The SP488E and SP489E are low-power quad differential line receivers that meet the  
specifications of RS-485 and RS-422 serial protocols with enhanced ESD performance. The  
ESD tolerance has been improved on these devices to over +15kV for both Human Body  
Model and IEC1000-4-2 Air Discharge Method. These devices are superior drop-in replace-  
ments to Sipex's SP488 and SP489 devices as well as popular industry standards. As with  
the original versions, the SP488E features a common receiver enable control and the  
SP489E provides independent receiver enable controls for each pair of receivers. Both  
feature wide common-mode input ranges. The receivers have a fail-safe features which  
forces a logic "1" output when receiver inputs are left floating. Both are available in 16-pin  
plastic DIP and SOIC packages.  
RI1B  
RI1A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI1B  
RI1A  
RO1  
EN  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI4B  
RI4A  
RO4  
EN  
SP489E  
4
SP488E  
4
RI4B  
RI4A  
RO4  
1
1
RO1  
EN1/EN2  
RO2  
EN3/EN4  
RO3  
RO2  
RI2A  
RI2B  
GND  
2
RI2A  
2
RO3  
RI3A  
RI3B  
3
RI2B  
RI3A  
RI3B  
3
GND  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
ABSOLUTE MAXIMUM RATINGS  
These are stress ratings only and functional  
operation of the device at these or any other above  
those indicated in the operation sections of the  
specifications below is not implied. Exposure to  
absolute maximum rating conditions for extended  
periods of time may affect reliability.  
VCC .................................................................. +7V  
Input Voltages  
Logic....................................0.5V to (VCC +0.5V)  
Receiver ..................................................... +14V  
Receiver Output Voltage........ –0.5V to (VCC +0.5V)  
Input Currents  
Logic........................................................ +25mA  
Storage Temperature ................. –65°C to +150°C  
Power Dissipation  
Plastic DIP .............................................. 375mW  
(derate 7mW/°C above +70°C)  
Small Outline .......................................... 375mW  
(derate 7mW/°C above +70°C)  
Lead Temperature (soldering, 10 sec) ......... 300°C  
SPECIFICATIONS  
VCC = 5V±5%; typicals at 25°C; TMIN TA TMAX unless otherwise noted.  
PARAMETER  
MIN.  
TYP.  
MAX.  
UNIT  
CONDITIONS  
DC CHARACTERISTICS  
Digital Inputs  
Voltage  
VIL  
EN, EN, EN1/EN2, EN3/EN4  
0.8  
+2  
Volts  
Volts  
µA  
VIH  
2.0  
Input Current  
0V VIN VCC  
RECEIVER INPUTS  
Input Resistance  
Differential Input Threshold  
Input Current (A, B)  
12  
–0.2  
kOhm  
Volts  
–7V VCM 12V  
–7V VCM 12V  
VCC = 0V or 5.25V; IIN2  
VIN = +12V  
+0.2  
+1.0  
–0.8  
mA  
mA  
VIN = –7V  
Maximum Data Rate  
10  
Mbps  
RECEIVER OUTPUTS  
Output Voltage  
VOH  
VOL  
3.5  
V
V
µA  
IO = –4mA; VID = +0.2V  
IO = +4mA; VID = –0.2V  
0.4V VO 2.4V,  
0.4  
+1  
High Impedance Output Current  
EN = O, EN = 1,  
EN1 / EN2 = EN3 / EN4 = O  
POWER REQUIREMENTS  
Supply Voltage  
Supply Current  
4.75  
5.00  
1
5.25  
5
Volts  
mA  
No load  
ENVIRONMENTAL AND MECHANICAL  
Operating Temperature  
–C  
–E  
0
–40  
–65  
+70  
+85  
+150  
°C  
°C  
°C  
Storage Temperature  
Package  
–_P  
16–pin Plastic DIP  
16–pin SOIC  
–_T  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
2
100pF  
EN  
S1  
S2  
1k  
A
VCC  
DRIVER  
RCVR  
ROn  
CL  
CL  
DI  
54Ω  
1kΩ  
B
100pF  
EN  
1/4 SP486E  
1/4 SP488E  
Figure 2. Enable/Disable Timing Test Circuit  
Figure 1. Timing Test Circuit  
SP488 PINOUT  
Pin 1 — RI1B — Receiver 1 input B.  
Pin 6 — RI2A — Receiver 2 input A.  
Pin 7 — RI2B — Receiver 2 input B.  
Pin 8 — GND — Digital Ground.  
Pin 9 — RI3B — Receiver 3 input B.  
Pin 10 — RI3A — Receiver 3 input A.  
Pin 2 — RI1A Receiver 1 input A.  
Pin 3 — RO1 — Receiver 1 Output — If  
Receiver 1 output is enabled, if RI1A> RI B by  
200mV, Receiver output is high. If Rece1iver 1  
outputisenabled, andifRI A<RI1B by200mV,  
Receiver 1 output is low.1  
Pin 4 — EN — Receiver Output Enable. Please  
refer to SP488E Truth Table (1).  
Pin 11 — RO3 — Receiver 3 Output — If  
Receiver 3 output is enabled, if RI A > RI3B by  
200mV, Receiver 3 output is high.3If Receiver 3  
output is enabled, and if RI3A < RI3B by 200mV,  
Receiver 3 output is low.  
Pin 5 — RO2 — Receiver 2 Output —  
If Receiver 2 output is enabled, if RI2A > RI B  
by 200mV, Receiver 2 output is high. 2If  
Receiver 2 output is enabled, and if RI2A < RI2B  
by 200mV, Receiver 2 output is low.  
Pin12ENReceiverOutputEnable. Please  
refer to SP488E Truth Table (1).  
PINOUT  
RI1B  
RI1A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI1B  
RI1A  
RO1  
EN  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI4B  
RI4A  
RO4  
EN  
SP489E  
4
SP488E  
4
RI4B  
RI4A  
RO4  
1
1
RO1  
EN1/EN2  
RO2  
RO2  
RI2A  
RI2B  
GND  
EN3/EN4  
RO3  
2
2
RO3  
RI3A  
RI3B  
RI2A  
3
3
RI2B  
RI3A  
RI3B  
GND  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
3
Pin 13 — RO4 — Receiver 4 Output — If  
Receiver 4 output is enabled, if RI A > RI4B by  
200mV, Receiver 4 output is high.4If Receiver 4  
output is enabled, and if RI4A < RI4B by  
200mV, Receiver 4 output is low.  
Pin 9 — RI3B — Receiver 3 input B.  
Pin 10 — RI3A — Receiver 3 input A.  
Pin 11 — RO3 — Receiver 3 Output — If  
Receiver 3 output is enabled, if RI A > RI3B by  
200mV, Receiver 3 output is high.3If Receiver 3  
output is enabled, and if RI3A < RI3B by  
200mV, Receiver 3 output is low.  
Pin 14 — RI4A — Receiver 4 input A.  
Pin 15 — RI4B — Receiver 4 input B.  
Pin 16 — Supply Voltage VCC — 4.75V VCC  
5.25V.  
Pin 12 — EN3/EN4 — Receiver 3 and 4 Output  
Enable. Please refer to SP489E Truth Table (2).  
Pin 13 — RO4 — Receiver 4 Output — If  
Receiver 4 output is enabled, if RI A > RI4B by  
200mV, Receiver 4 output is high.4If Receiver 4  
output is enabled, and if RI4A < RI4B by  
200mV, Receiver 4 output is low.  
SP489E PINOUT  
Pin 1 — RI1B — Receiver 1 input B.  
Pin 2 — RI1A — Receiver 1 input A.  
Pin 3 — RO1 —  
Receiver 1 Output — If  
Pin 14 — RI4A — Receiver 4 input A.  
Pin 15 — RI4B — Receiver 4 input B.  
Receiver 1 output is enabled, if RI1A > RI B by  
200mV, Receiver output is high. If Rece1iver 1  
outputisenabled, andifRI A<RI1B by200mV,  
Receiver 1 output is low.1  
Pin 16 — Supply Voltage VCC — 4.75V VCC  
5.25V.  
Pin 4 — EN1/EN2 — Receiver 1 and 2 Output  
Enable. Please refer to SP489E Truth Table (2).  
FEATURES…  
The SP488E and SP489E are low–power quad  
differential line receivers meeting RS-485 and  
RS-422 standards. The SP488E features active  
high and active low common receiver enable  
controls; the SP489E provides independent,  
active high receiver enable controls for each  
pair of receivers. Both feature tri–state outputs  
and a -7V to +12V common–mode input range  
permitting a +7V ground difference between  
devices on the communications bus. The  
SP488E/489E are equipped with a fail–safe  
feature which forces a logic high at the receiver  
output when the input is left floating. Data rates  
up to 10Mbps are supported. Both are available  
in 16-pin plastic DIP and SOIC packages.  
Pin 5 — RO2 — Receiver 2 Output — If  
Receiver 2 output is enabled, if RI A > RI2B by  
200mV, Receiver 2 output is high.2If Receiver 2  
output is enabled, and if RI2A < RI2B by  
200mV, Receiver 2 output is low.  
Pin 6 — RI2A — Receiver 2 input A.  
Pin 7 — RI2B — Receiver 2 input B.  
Pin 8 — GND — Digital Ground.  
DIFFERENTIAL  
A – B  
ENABLES  
EN  
OUTPUT  
RO  
EN  
DIFFERENTIAL  
A – B  
ENABLES  
EN /EN or EN /EN  
4
OUTPUT  
RO  
V
ID 0.2V  
H
X
X
L
H
H
1
2
3
V
0.2V  
H
H
H
L
H
X
ID  
–0.2V < VID < +0.2V  
H
X
X
L
X
X
–0.2V < V < +0.2V  
ID  
V
ID 0.2V  
H
X
X
L
L
L
V
0.2V  
L
ID  
X
Hi–Z  
X
L
H
Hi–Z  
Table 1. SP488E Truth Table  
Table 2. SP489E Truth Table  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
4
AC PARAMETERS  
VCC = 5V±5%; typicals at 25°C; TAMB = 25°C unless otherwise noted.  
PARAMETER  
MIN.  
TYP.  
MAX.  
UNIT  
CONDITIONS  
PROPAGATION DELAY  
Receiver Input to Output  
CL = 15pF; Figure 1, 3  
Low to HIGH (tPLH  
High to LOW (tPHL  
Differential Receiver Skew (tSKD  
)
)
45  
45  
5
60  
60  
ns  
ns  
ns  
)
tSKD = tPHL - tPLH  
RECEIVER ENABLE  
To Output HIGH  
30  
35  
60  
60  
ns  
ns  
CL = 15pF; Figures 2 and 4  
(S2 closed)  
CL = 15pF; Figures 2 and 4  
(S1 closed)  
To Output LOW  
RECEIVER DISABLE  
From Output LOW  
35  
30  
60  
60  
ns  
ns  
CL = 15pF; Figures 2 and 4  
(S1 closed)  
CL = 15pF; Figures 2 and 4  
(S2 closed)  
From Output HIGH  
F = 1MHZ: tr < 10ns: tf < 10ns  
0V  
+VOD  
Input A–B  
0V  
–VOD  
tPHL  
tPLH  
VOH  
VOL  
RO  
1.5V  
1.5V  
Figure 3. Receiver Propagation Delays  
F = 1MHZ: tr < 10ns: tf < 10ns  
1.5V  
3V  
EN  
1.5V  
0V  
tZL  
tLZ  
5V  
RO  
1.5V  
0.5V  
0.5V  
VOL  
Output normally low  
tZH  
tHZ  
Output normally high  
1.5V  
VOH  
0V  
RO  
Figure 4. Receiver Enable/Disable Timing  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
5
R
R
S
S
R
R
C
C
SW2  
SW2  
SW1  
SW1  
Device  
Under  
Test  
DC Power  
Source  
C
C
S
S
Figure 5. ESD Test Circuit for Human Body Model  
Contact-Discharge Module  
Contact-Discharge Module  
R
R
R
R
S
S
R
R
V
V
C
C
SW2  
SW2  
SW1  
SW1  
Device  
Under  
Test  
DC Power  
Source  
C
C
S
S
R
R
and R add up to 330for IEC1000-4-2.  
and R add up to 330for IEC1000-4-2.  
S
S
V
V
Figure 6. ESD Test Circuit for IEC1000-4-2  
ESD TOLERANCE  
The SP488E and SP489E devices incorporate  
ruggedized ESD cells on all driver output and  
receiver input pins. The ESD structure is  
improved over our previous family for more  
rugged applications and environments sensitive  
to electro-static discharges and associated  
transients. The improved ESD tolerance is at  
least +15kV without damage nor latch-up.  
The Human Body Model has been the generally  
acceptedESDtestingmethodforsemiconductors.  
This method is also specified in MIL-STD-883,  
Method 3015.7 for ESD testing. The premise of  
this ESD test is to simulate the human body’s  
potential to store electro-static energy and  
discharge it to an integrated circuit. The  
simulation is performed by using a test model as  
showninFigure5. ThismethodwilltesttheIC’s  
capability to withstand an ESD transient during  
normal handling such as in manufacturing areas  
where the ICs tend to be handled frequently.  
There are different methods of ESD testing  
applied:  
a) MIL-STD-883, Method 3015.7  
b) IEC1000-4-2 Air-Discharge  
c) IEC1000-4-2 Direct Contact  
The IEC-1000-4-2, formerly IEC801-2, is  
generallyusedfortestingESDonequipmentand  
systems. For system manufacturers, they must  
guarantee a certain amount of ESD protection  
since the system itself is exposed to the outside  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
6
environment and human presence. The premise  
with IEC1000-4-2 is that the system is required  
to withstand an amount of static electricity when  
ESD is applied to points and surfaces of the  
equipmentthatareaccessibletopersonnelduring  
normal usage. The transceiver IC receives most  
of the ESD current when the ESD source is  
applied to the connector pins. The test circuit for  
IEC1000-4-2 is shown on Figure 6. There are  
two methods within IEC1000-4-2, the Air  
Discharge method and the Contact Discharge  
method.  
potential to the system and humidity will tend to  
change the discharge current. For example, the  
rise time of the discharge current varies with the  
approach speed.  
The Contact Discharge Method applies the ESD  
current directly to the EUT. This method was  
devised to reduce the unpredictability of the  
ESD arc. The discharge current rise time is  
constant since the energy is directly transferred  
without the air-gap arc. In situations such as  
handheldsystems,theESDchargecanbedirectly  
dischargedtotheequipmentfromapersonalready  
holdingtheequipment. Thecurrentistransferred  
ontothekeypadortheserialportoftheequipment  
directly andthentravelsthroughthePCBandfinally  
to the IC.  
30A  
15A  
0A  
The circuit model in Figures 5 and 6 represent  
the typical ESD testing circuit used for all three  
methods. TheCS isinitiallychargedwiththeDC  
power supply when the first switch (SW1) is on.  
Now that the capacitor is charged, the second  
switch(SW2)isonwhileSW1switchesoff. The  
voltage stored in the capacitor is then applied  
throughRS, thecurrentlimitingresistor, ontothe  
device under test (DUT). In ESD tests, the SW2  
switch is pulsed so that the device under test  
receives a duration of voltage.  
t=0ns  
t=30ns  
t  
Figure 7. ESD Test Waveform for IEC1000-4-2  
With the Air Discharge Method, an ESD voltage  
is applied to the equipment under test (EUT)  
throughair. Thissimulatesanelectricallycharged  
person ready to connect a cable onto the rear of  
the system only to find an unpleasant zap just  
before the person touches the back panel. The  
high energy potential on the person discharges  
through an arcing path to the rear panel of the  
system before he or she even touches the system.  
This energy, whether discharged directly or  
through air, is predominantly a function of the  
discharge current rather than the discharge  
voltage. Variables with an air discharge such as  
approach speed of the object carrying the ESD  
Forthe HumanBodyModel, the current limiting  
resistor (RS) and the source capacitor (CS) are  
1.5kWan100pF,respectively. ForIEC-1000-4-2,  
the current limiting resistor (RS) and the source  
capacitor (CS) are 330W an 150pF, respectively.  
The higher C value and lower RS value in the  
IEC1000-4-2Smodel are more stringent than the  
HumanBodyModel. Thelargerstoragecapacitor  
injects a higher voltage to the test point when  
SW2 is switched on. The lower current limiting  
resistor increases the current charge onto the test  
point.  
DEVICE PIN  
TESTED  
HUMAN BODY  
MODEL  
IEC1000-4-2  
Air Discharge Direct Contact  
Level  
Driver Outputs  
Receiver Inputs  
+15kV  
+15kV  
+15kV  
+15kV  
+8kV  
+8kV  
4
4
Table 3. Transceiver ESD Tolerance Levels  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
7
PACKAGE: PLASTIC  
DUAL–IN–LINE  
(NARROW)  
E1  
E
D1 = 0.005" min.  
(0.127 min.)  
A1 = 0.015" min.  
(0.381min.)  
D
A = 0.210" max.  
(5.334 max).  
C
A2  
Ø
L
B1  
B
e
= 0.300 BSC  
(7.620 BSC)  
e = 0.100 BSC  
(2.540 BSC)  
A
ALTERNATE  
END PINS  
(BOTH ENDS)  
DIMENSIONS (Inches)  
Minimum/Maximum  
(mm)  
16–PIN  
0.115/0.195  
(2.921/4.953)  
A2  
0.014/0.022  
(0.356/0.559)  
B
0.045/0.070  
B1  
C
(1.143/1.778)  
0.008/0.014  
(0.203/0.356)  
0.780/0.800  
(19.812/20.320)  
D
0.300/0.325  
(7.620/8.255)  
E
0.240/0.280  
E1  
L
(6.096/7.112)  
0.115/0.150  
(2.921/3.810)  
0°/ 15°  
(0°/15°)  
Ø
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
8
PACKAGE: PLASTIC  
SMALL OUTLINE (SOIC)  
(WIDE)  
E
H
D
A
Ø
A1  
L
e
B
DIMENSIONS (Inches)  
Minimum/Maximum  
(mm)  
16–PIN  
A
A1  
B
D
E
0.093/0.104  
(2.352/2.649)  
0.004/0.012  
(0.102/0.300)  
0.013/0.020  
(0.330/0.508)  
0.398/0.413  
(10.10/10.49)  
0.291/0.299  
(7.402/7.600)  
e
0.050 BSC  
(1.270 BSC)  
H
L
0.394/0.419  
(10.00/10.64)  
0.016/0.050  
(0.406/1.270)  
Ø
0°/8°  
(0°/8°)  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
9
ORDERING INFORMATION  
Quad RS485 Receivers:  
Model ........................ Enable/Disable ...................................... Temperature Range........................ Package  
SP488ECP ............... Common; active Low and Active High .. 0°C to +70°C ....................16–pin Plastic DIP  
SP488ECT................ Common; active Low and Active High .. 0°C to +70°C ............................. 16–pin SOIC  
SP488EEP................ Common; active Low and Active High .. –40°C to +85°C ................16–pin Plastic DIP  
SP488EET ................ Common; active Low and Active High .. –40°C to +85°C ......................... 16–pin SOIC  
SP489ECP ............... One per driver pair; active High ............ 0°C to +70°C ....................16–pin Plastic DIP  
SP489ECT................ One per driver pair; active High ............ 0°C to +70°C ............................. 16–pin SOIC  
SP489EEP................ One per driver pair; active High ............ –40°C to +85°C ................16–pin Plastic DIP  
SP489EET ................ One per driver pair; active High ............ –40°C to +85°C ......................... 16–pin SOIC  
Please consult the factory for pricing and availability on a Tape-On-Reel option.  
Co rp o ra tio n  
SIGNAL PROCESSING EXCELLENCE  
Sipex Corporation  
Headquarters and  
Sales Office  
22 Linnell Circle  
Billerica, MA 01821  
TEL: (978) 667-8700  
FAX: (978) 670-9001  
e-mail: sales@sipex.com  
Sales Office  
233 South Hillview Drive  
Milpitas, CA 95035  
TEL: (408) 934-7500  
FAX: (408) 935-7600  
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the  
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.  
SP488E/489EDS/07  
SP488E/489E Enhanced Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
10  

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SP488ESTR-L

Line Driver/Receiver, PDIP16,
SIPEX

SP488ET

Quad RS-485/RS-422 Line Receivers
SIPEX

SP488ET-L

暂无描述
SIPEX

SP488ET/TR

Line Receiver, 4 Func, 4 Rcvr, CMOS, PDSO16, SOIC-16
SIPEX

SP488ETTR-L

Line Driver/Receiver, PDSO16,
SIPEX

SP489

Quad RS-485/RS-422 Line Receivers
SIPEX

SP489A

High Speed Quad RS-485/RS-422 Line Receivers
SIPEX