SP488ES-L/TR [SIPEX]

Line Driver/Receiver, PDIP16;
SP488ES-L/TR
型号: SP488ES-L/TR
厂家: SIPEX CORPORATION    SIPEX CORPORATION
描述:

Line Driver/Receiver, PDIP16

光电二极管
文件: 总6页 (文件大小:119K)
中文:  中文翻译
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®
SP488/489  
Quad RS-485/RS-422 Line Receivers  
RS-485 or RS-422 Applications  
Quad Differential Line Receivers  
Tri–state Output Control  
120ns Typical Receiver Propagation  
Delays  
–7V to +12V Common Mode Input  
Range  
1mA Supply Current  
Single +5V Supply Operation  
Pin Compatible with SN75173,  
SN75175, LTC488 and LTC489  
Now available in Lead Free  
DESCRIPTION…  
The SP488 and SP489 are low–power quad differential line receivers meeting RS-485 and RS-422  
standards. The SP488 features a common receiver enable control; the SP489 provides independent  
receiver enable controls for each pair of receivers. Both feature tri–state outputs and wide common–  
mode input range. The receivers have a fail–safe feature which forces a logic “1” output when receiver  
inputs are left floating. Both are available in 16–pin plastic DIP and SOIC packages.  
RI1B  
RI1A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI1B  
RI1A  
RO1  
EN  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI4B  
RI4A  
RO4  
EN  
SP489  
4
SP488  
4
RI4B  
RI4A  
RO4  
1
1
RO1  
EN1/EN2  
RO2  
EN3/EN4  
RO3  
RO2  
RI2A  
RI2B  
GND  
2
RI2A  
2
RO3  
RI3A  
RI3B  
3
RI2B  
RI3A  
RI3B  
3
GND  
SP488/489  
Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
ABSOLUTE MAXIMUM RATINGS  
These are stress ratings only and functional operation of the device  
at these or any other above those indicated in the operation  
sections of the specifications below is not implied. Exposure to  
absolute maximum rating conditions for extended periods of time  
may affect reliability.  
VCC ............................................................................................ +7V  
Input Voltages  
Logic ............................................................. –0.5V to (VCC +0.5V)  
Receiver ............................................................................... ±14V  
Receiver Output Voltage ................................. –0.5V to (VCC +0.5V)  
Input Currents  
Logic .................................................................................. ±25mA  
Storage Temperature ............................................ –65°C to +150°C  
Power Dissipation  
Plastic DIP ........................................................................ 375mW  
(derate 7mW/°C above +70°C)  
Small Outline .................................................................... 375mW  
(derate 7mW/°C above +70°C)  
Lead Temperature (soldering, 10 sec) ................................... 300°C  
SPECIFICATIONS  
VCC = 5V±5%; typicals at 25°C; TMIN TA TMAX unless otherwise noted.  
PARAMETER  
MIN.  
TYP.  
MAX.  
UNIT  
CONDITIONS  
DC CHARACTERISTICS  
Digital Inputs  
Voltage  
VIL  
EN, EN, EN1/EN2, EN3/EN4  
0.8  
Volts  
Volts  
µA  
VIH  
2.0  
Input Current  
±2  
0V VIN VCC  
RECEIVER INPUTS  
Input Resistance  
Differential Input Threshold  
Input Current (A, B)  
12  
–0.2  
kOhm  
Volts  
–7V VCM 12V  
–7V VCM 12V  
VCC = 0V or 5.25V; IIN2  
VIN = +12V  
+0.2  
+1.0  
–0.8  
mA  
mA  
VIN = –7V  
Maximum Data Rate  
10  
Mbps  
RECEIVER OUTPUTS  
Output Voltage  
VOH  
VOL  
3.5  
V
V
µA  
IO = –4mA; VID = +0.2V  
IO = +4mA; VID = –0.2V  
VCC = maximum; 0.4V VO 2.4V  
0.4  
±1  
High Impedance Output Current  
POWER REQUIREMENTS  
Supply Voltage  
Supply Current  
4.75  
5.00  
1
5.25  
5
Volts  
mA  
No load  
ENVIRONMENTAL AND MECHANICAL  
Operating Temperature  
–C  
–E  
0
–40  
–65  
+70  
+85  
+150  
°C  
°C  
°C  
Storage Temperature  
Package  
–_S  
16–pin Plastic DIP  
16–pin SOIC  
–_T  
SP488/489  
Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
2
100pF  
EN  
S1  
S2  
1k  
A
VCC  
CL  
DRIVER  
RCVR  
ROn  
CL  
DI  
54Ω  
1kΩ  
B
100pF  
EN  
1/4 SP486  
1/4 SP488  
Figure 2. Enable/Disable Timing Test Circuit  
Figure 1. Timing Test Circuit  
SP488 PINOUT  
Pin 1 — RI1B — Receiver 1 input B.  
Pin 6 — RI2A — Receiver 2 input A.  
Pin 7 — RI2B — Receiver 2 input B.  
Pin 8 — GND — Digital Ground.  
Pin 9 — RI3B — Receiver 3 input B.  
Pin 10 — RI3A — Receiver 3 input A.  
Pin 2 — RI1A Receiver 1 input A.  
Pin 3 — RO1 — Receiver 1 Output — If Re-  
ceiver 1 output is enabled, if RI1A > RI1B by  
200mV, Receiver output is high. If Receiver 1  
outputisenabled, andifRI A<RI1B by200mV,  
Receiver 1 output is low.1  
Pin 4 — EN — Receiver Output Enable. Please  
refer to SP488 Truth Table (1).  
Pin 11 — RO3 — Receiver 3 Output — If  
Receiver 3 output is enabled, if RI A > RI3B by  
200mV, Receiver 3 output is high.3If Receiver 3  
output is enabled, and if RI3A < RI3B by  
200mV, Receiver 3 output is low.  
Pin 5 — RO2 — Receiver 2 Output — If Re-  
ceiver 2 output is enabled, if RI2A > RI2B by  
200mV, Receiver 2 output is high. If Receiver 2  
output is enabled, and if RI2A < RI2B by  
200mV, Receiver 2 output is low.  
Pin12ENReceiverOutputEnable. Please  
refer to SP488 Truth Table (1).  
PINOUT  
RI1B  
RI1A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI1B  
RI1A  
RO1  
EN  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
VCC  
RI4B  
RI4A  
RO4  
EN  
SP489  
4
SP488  
4
RI4B  
RI4A  
RO4  
1
1
RO1  
EN1/EN2  
RO2  
RO2  
RI2A  
RI2B  
GND  
EN3/EN4  
RO3  
2
2
RO3  
RI3A  
RI3B  
RI2A  
3
3
RI2B  
RI3A  
RI3B  
GND  
SP488/489  
Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
3
Pin 13 — RO4 — Receiver 4 Output — If  
Receiver 4 output is enabled, if RI A > RI4B by  
200mV, Receiver 4 output is high.4If Receiver 4  
output is enabled, and if RI4A < RI4B by  
200mV, Receiver 4 output is low.  
Pin 9 — RI3B — Receiver 3 input B.  
Pin 10 — RI3A — Receiver 3 input A.  
Pin 11 — RO3 — Receiver 3 Output — If  
Receiver 3 output is enabled, if RI A > RI3B by  
200mV, Receiver 3 output is high.3If Receiver 3  
output is enabled, and if RI3A < RI3B by  
200mV, Receiver 3 output is low.  
Pin 14 — RI4A — Receiver 4 input A.  
Pin 15 — RI4B — Receiver 4 input B.  
Pin 16 — Supply Voltage VCC — 4.75V VCC  
5.25V.  
Pin 12 — EN3/EN4 — Receiver 3 and 4 Output  
Enable. Please refer to SP489 Truth Table (2).  
Pin 13 — RO4 — Receiver 4 Output — If  
Receiver 4 output is enabled, if RI A > RI4B by  
200mV, Receiver 4 output is high.4If Receiver 4  
output is enabled, and if RI4A < RI4B by  
200mV, Receiver 4 output is low.  
SP489 PINOUT  
Pin 1 — RI1B — Receiver 1 input B.  
Pin 2 — RI1A — Receiver 1 input A.  
Pin 3 — RO1 — Receiver 1 Output — If Re-  
ceiver 1 output is enabled, if RI > RI1B by  
200mV, Receiver output is high.1IAf Receiver 1  
outputisenabled, andifRI A<RI1B by200mV,  
Receiver 1 output is low.1  
Pin 14 — RI4A — Receiver 4 input A.  
Pin 15 — RI4B — Receiver 4 input B.  
Pin 16 — Supply Voltage VCC — 4.75V VCC  
5.25V.  
Pin 4 — EN1/EN2 — Receiver 1 and 2 Output  
Enable. Please refer to SP489 Truth Table (2).  
FEATURES…  
Pin 5 — RO2 — Receiver 2 Output — If Re-  
ceiver 2 output is enabled, if RI2A > RI2B by  
200mV, Receiver 2 output is high. If Receiver 2  
output is enabled, and if RI2A < RI2B by  
200mV, Receiver 2 output is low.  
The SP488 and SP489 are low–power quad  
differential line receivers meeting RS-485 and  
RS-422 standards. The SP488 features active  
high and active low common receiver enable  
controls; the SP489 provides independent, ac-  
tive high receiver enable controls for each pair  
of receivers. Both feature tri–state outputs and a  
-7V to +12V common–mode input range per-  
mitting a ±7V ground difference between de-  
vices on the communications bus. The SP488/  
489 are equipped with a fail–safe feature which  
forces a logic high at the receiver output when  
theinputisleftfloating.Dataratesupto10Mbps  
are supported. Both are available in 16-pin  
plastic DIP and SOIC packages.  
Pin 6 — RI2A — Receiver 2 input A.  
Pin 7 — RI2B — Receiver 2 input B.  
Pin 8 — GND — Digital Ground.  
DIFFERENTIAL  
A – B  
ENABLES  
EN  
OUTPUT  
RO  
EN  
DIFFERENTIAL  
A – B  
ENABLES  
EN /EN or EN /EN  
4
OUTPUT  
RO  
V
ID 0.2V  
H
X
X
L
H
H
1
2
3
V
0.2V  
H
H
H
L
H
X
ID  
–0.2V < VID < +0.2V  
H
X
X
L
X
X
–0.2V < V < +0.2V  
ID  
V
ID 0.2V  
H
X
X
L
L
L
V
0.2V  
L
ID  
X
Hi–Z  
X
L
H
Hi–Z  
Table 1. SP488 Truth Table  
Table 2. SP489 Truth Table  
SP488/489  
Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
4
AC PARAMETERS  
VCC = 5V±5%; typicals at 25°C; 0°C TA +70°C unless otherwise noted.  
PARAMETER  
MIN.  
TYP.  
MAX.  
UNIT  
CONDITIONS  
PROPAGATION DELAY  
Receiver Input to Output  
Low to HIGH (tPLH)  
High to LOW (tPHL)  
Differential Receiver Skew (tSKD  
Receiver Rise Time (tR)  
SP488  
SP489  
Receiver Fall Time (tF)  
SP488  
CL = 15pF; Figure 1, 3  
120  
120  
13  
250  
250  
ns  
ns  
ns  
)
10% to 90%  
90% to 10%  
30  
30  
70  
70  
ns  
ns  
20  
20  
40  
40  
ns  
ns  
SP489  
RECEIVER ENABLE  
To Output HIGH  
70  
80  
150  
200  
ns  
ns  
CL = 15pF; Figures 2 and 4  
(S2 closed)  
CL = 15pF; Figures 2 and 4  
(S1 closed)  
To Output LOW  
RECEIVER DISABLE  
From Output LOW  
70  
70  
150  
150  
ns  
ns  
CL = 15pF; Figures 2 and 4  
(S1 closed)  
CL = 15pF; Figures 2 and 4  
(S2 closed)  
From Output HIGH  
F = 1MHZ: tr < 10ns: tf < 10ns  
0V  
+VOD  
Input A–B  
0V  
–VOD  
tPHL  
tPLH  
VOH  
VOL  
RO  
1.5V  
1.5V  
Figure 3. Receiver Propagation Delays  
F = 1MHZ: tr < 10ns: tf < 10ns  
1.5V  
3V  
EN  
1.5V  
0V  
tZL  
tLZ  
5V  
RO  
1.5V  
0.5V  
0.5V  
VOL  
Output normally low  
tZH  
tHZ  
Output normally high  
1.5V  
VOH  
0V  
RO  
Figure 4. Receiver Enable/Disable Timing  
SP488/489  
Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
5
ORDERING INFORMATION  
Quad RS485 Receivers:  
Model ........................ Enable/Disable ...................................... Temperature Range........................ Package  
SP488CS .................. Common; active Low and Active High .. 0°C to +70°C ....................16–pin Plastic DIP  
SP488CT .................. Common; active Low and Active High .. 0°C to +70°C ............................. 16–pin SOIC  
SP488ES .................. Common; active Low and Active High .. –40°C to +85°C ................16–pin Plastic DIP  
SP488ET .................. Common; active Low and Active High .. –40°C to +85°C ......................... 16–pin SOIC  
SP489CS .................. One per driver pair; active High ............ 0°C to +70°C ....................16–pin Plastic DIP  
SP489CT .................. One per driver pair; active High ............ 0°C to +70°C ............................. 16–pin SOIC  
SP489ES .................. One per driver pair; active High ............ –40°C to +85°C ................16–pin Plastic DIP  
SP489ET .................. One per driver pair; active High ............ –40°C to +85°C ......................... 16–pin SOIC  
Now available in Lead Free. To order ad "-L" to the part number.  
Example: SP488/TR= Normal, SP488TR-L = Lead Free  
Co rp o ra tio n  
SIGNAL PROCESSING EXCELLENCE  
Sipex Corporation  
Headquarters and  
Sales Office  
22 Linnell Circle  
Billerica, MA 01821  
TEL: (978) 667-8700  
FAX: (978) 670-9001  
e-mail: sales@sipex.com  
Sales Office  
233 South Hillview Drive  
Milpitas, CA 95035  
TEL: (408) 934-7500  
FAX: (408) 935-7600  
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the  
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.  
SP488/489  
Quad RS-485/RS-422 Line Receivers  
© Copyright 2000 Sipex Corporation  
6

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