C8051F133 [SILICON]
100 MIPS, 64 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU; 100 MIPS ， 64 KB闪存， 10位ADC ， 64引脚混合信号MCU
| 型号： | C8051F133 |
| 厂家： | 
SILICON |
| 描述： | 100 MIPS, 64 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU |
| 文件： | 总2页 (文件大小：179K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
C8051F133
100 MIPS, 64 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU
Analog Peripherals
High-Speed 8051 µC Core
10-Bit ADC
-
Pipelined instruction architecture; executes 70% of instructions in 1 or 2
system clocks
-
-
-
-
-
-
±1 LSB INL; no missing codes
-
Up to 100 MIPS throughput with 100 MHz system clock
16 x 16 multiply/accumulate engine (2-cycle)
Programmable throughput up to 100 ksps
8 external inputs; programmable as single-ended or differential
Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5
Data-dependent windowed interrupt generator
Built-in temperature sensor (±3 °C)
-
Memory
-
-
8448 bytes data RAM
64 kB Flash; in-system programmable in 1024-byte sectors (1024 bytes
Two Comparators
are reserved)
Internal Voltage Reference
-
External parallel data memory interface
V
Monitor/Brown-out Detector
DD
Digital Peripherals
On-Chip JTAG Debug & Boundary Scan
-
-
32 port I/O; all are 5 V tolerant
-
-
-
-
On-chip debug circuitry facilitates full speed, non-intrusive in-system
debug (no emulator required)
Hardware SMBus™ (I2C™ Compatible), SPI™, and two UART serial
ports available concurrently
Provides breakpoints, single stepping, watchpoints, stack monitor
-
-
-
-
Programmable 16-bit counter/timer array with six capture/compare
modules
Inspect/modify memory and registers
5 general-purpose 16-bit counter/timers
Dedicated watchdog timer; bidirectional reset
Real-time clock mode using Timer 3 or PCA
Superior performance to emulation systems using ICE-chips, target
pods, and sockets
-
IEEE1149.1 compliant boundary scan
Clock Sources
-
-
-
Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation
On-chip programmable PLL: up to 100 MHz
External oscillator: Crystal, RC, C, or Clock
Supply Voltage: 3.0 to 3.6 V
-
Typical operating current: 50 mA at 100 MHz
Typical stop mode current: 0.4 µA
-
64-Pin TQFP
Temperature Range: –40 to +85 °C
VDD
VDD
Port I/O
Config.
VDD
Digital Power
DGND
DGND
DGND
P0.0
P0.7
UART0
P0
Drv
SFR Bus
UART1
SMBus
SPI Bus
PCA
AV+
AGND
C
R
O
S
S
B
A
R
Analog Power
P1.0/AIN2.0
P1.7/AIN2.7
P1
8
0
5
1
Drv
256 byte
RAM
TCK
TMS
TDI
Boundary Scan
Debug HW
JTAG
Logic
Timers 0,
1, 2, 4
P2.0
P2.7
TDO
P2
8kbyte
XRAM
Drv
Reset
RST
Timer 3/
RTC
VDD
Monitor
P3.0
P3.7
WDT
MONEN
P3
P0, P1,
P2, P3
Drv
External Data
Memory Bus
External Oscillator
Circuit
XTAL1
XTAL2
Latches
Crossbar
Config.
PLL
System
Clock
C
o
r
Circuitry
Calibrated Internal
Oscillator
FLASH
64kbyte
VREF
VREF
e
C
T
L
P4 Latch
Bus Control
P4
DRV
64x4 byte
cache
VREF0
P5 Latch
P6 Latch
P5
AIN0.0
AIN0.1
AIN0.2
AIN0.3
AIN0.4
AIN0.5
AIN0.6
AIN0.7
A
d
d
r
DRV
Address Bus
Data Bus
ADC
A
P6
Prog
Gain
M
U
X
100ksps
(10-Bit)
DRV
D
a
t
P7 Latch
TEMP
SENSOR
P7
DRV
CP0+
CP0-
CP1+
CP1-
CP0
a
CP1
General Purpose
Copyright © 2004 by Silicon Laboratories
8.9.2004
C8051F133
100 MIPS, 64 kB Flash, 10-Bit ADC, 64-Pin Mixed-Signal MCU
Selected Electrical Specifications
(TA = –40 to +85 C°, VDD = 3.0 V unless otherwise specified)
PARAMETER
GLOBAL CHARACTERISTICS
Supply Voltage
CONDITIONS
MIN
TYP
MAX
UNITS
3.0
—
—
50
0.6
16
10
0.4
—
3.6
—
V
mA
mA
µA
Supply Current
Clock = 100 MHz
(CPU active)
Clock = 1 MHz
—
—
Clock = 32 kHz
—
—
Supply Current
Oscillator off; VDD Monitor Enabled
Oscillator off; VDD Monitor Disabled
—
—
µA
(shutdown)
—
—
µA
Clock Frequency Range
INTERNAL CLOCKS
Oscillator Frequency
PLL Frequency
DC
100
MHz
24.0
—
24.5
—
25.0
100
MHz
MHz
A/D CONVERTER
Resolution
10
—
—
—
bits
LSB
LSB
dB
Integral Nonlinearity
Differential Nonlinearity
Signal-to-Noise Plus
Distortion
—
—
59
±1
±1
—
Guaranteed Monotonic
Throughput Rate
—
—
100
ksps
C8051F120DK Development Kit
Package Information
D
D1
MIN NOM MAX
(mm) (mm) (mm)
A
-
-
-
-
1.20
0.15
1.05
A1 0.05
A2 0.95
E1
E
b
D
0.17 0.22 0.27
-
-
-
-
-
12.00
10.00
0.50
-
-
-
-
-
64
D1
e
PIN 1
DESIGNATOR
1
e
A2
E
12.00
10.00
A
E1
b
A1
General Purpose
Copyright © 2004 by Silicon Laboratories
8.9.2004
Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders
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