SGM895 [SGMICRO]
Ultra-Small, Supervisory Circuit with Adjustable Sequencing;
| 型号： | SGM895 |
| 厂家： | 
Shengbang Microelectronics Co, Ltd |
| 描述： | Ultra-Small, Supervisory Circuit with Adjustable Sequencing |
| 文件： | 总19页 (文件大小：879K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SGM895/SGM896/SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
GENERAL DESCRIPTION
FEATURES
The SGM895/SGM896/SGM897/SGM898/SGM899 are
ultra-small, low-power and high-accuracy micro-
processor supervisory circuits with adjustable
sequencing capability. Since the high-impedance
detection input pin (IN) with a 0.5V threshold voltage is
separated from the power supply, these devices
provide great flexibility with adjustable thresholds by
using an external resistive divider. Moreover, the delay
time can be adjusted by an external capacitor
connected to the CDELAY pin. The devices are
suitable for some power sequencing, reset sequencing
and power-switching equipment.
● High Voltage Threshold Accuracy:
+25℃: ±1%
-40℃ to +125℃: ±1.6%
● Low Power Consumption: 2.1μA (TYP)
● Operating Supply Voltage Range: 1.6V to 5.5V
● Capacitor-Adjustable Delay
● Enable Input Options:
Active-High: SGM895 and SGM897
Active-Low: SGM896, SGM898 and SGM899
● Output Options:
Active-High Push-Pull: SGM895 and SGM899
Active-Low Push-Pull: SGM896
Active-High Open-Drain (28V Tolerant): SGM897
Active-Low Open-Drain (28V Tolerant): SGM898
● Available in Ultra-Small Green UTDFN-1.45×1-6AL
and TSOT-23-6 Packages
When the input voltage at IN (VIN) exceeds the VTH
threshold voltage (0.5V, TYP) and the ENABLE input is
high (or nENABLE is low), the OUT is high (or nOUT is
low). When VIN is lower than VTL (0.495V, TYP) or when
the ENABLE input is low (or nENABLE is high), the
OUT is low (or nOUT is high). The devices all have a
capacitor-adjustable input delay time (tDELAY) between
VIN greater than VTH and the output assertion. The
SGM89_A has a capacitor-adjustable enable output
delay time while the SGM89_P has a 350ns (TYP) fixed
delay time.
APPLICATIONS
Portable Equipment
Computers
μC Power Monitoring
Automotive Applications
Medical Equipment
Intelligent Instruments
All devices are available in ultra-small Green
UTDFN-1.45×1-6AL and TSOT-23-6 packages.
TYPICAL APPLICATION
1.6V to 5.5V
VCC
100nF
R1
R2
ENABLE
SGM895
IN
OUT
CDELAY
CCDELAY
GND
Figure 1. Typical Application Circuit of SGM895
SG Micro Corp
MAY 2023–REV. A.4
www.sg-micro.com
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
PACKAGE/ORDERING INFORMATION
SPECIFIED
TEMPERATURE
RANGE
PACKAGE
DESCRIPTION
ORDERING
NUMBER
PACKAGE
MARKING
PACKING
OPTION
MODEL
UTDFN-1.45×1-6AL
TSOT-23-6
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
SGM895AXUDL6G/TR
SGM895AXTN6G/TR
SGM895PXUDL6G/TR
SGM895PXTN6G/TR
SGM896AXUDL6G/TR
SGM896AXTN6G/TR
SGM896PXUDL6G/TR
SGM896PXTN6G/TR
SGM897AXUDL6G/TR
SGM897AXTN6G/TR
SGM897PXUDL6G/TR
SGM897PXTN6G/TR
SGM898AXUDL6G/TR
SGM898AXTN6G/TR
SGM898PXUDL6G/TR
SGM898PXTN6G/TR
SGM899AXUDL6G/TR
SGM899AXTN6G/TR
SGM899PXUDL6G/TR
SGM899PXTN6G/TR
J9X
CICXX
IAX
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
Tape and Reel, 5000
Tape and Reel, 3000
SGM895A
UTDFN-1.45×1-6AL
TSOT-23-6
SGM895P
SGM896A
SGM896P
SGM897A
SGM897P
SGM898A
SGM898P
SGM899A
SGM899P
CKFXX
QBX
UTDFN-1.45×1-6AL
TSOT-23-6
CL0XX
QCX
UTDFN-1.45×1-6AL
TSOT-23-6
CL1XX
I8X
UTDFN-1.45×1-6AL
TSOT-23-6
CIDXX
IBX
UTDFN-1.45×1-6AL
TSOT-23-6
CL2XX
QDX
UTDFN-1.45×1-6AL
TSOT-23-6
CL3XX
QEX
UTDFN-1.45×1-6AL
TSOT-23-6
CL4XX
I9X
UTDFN-1.45×1-6AL
TSOT-23-6
CIEXX
ICX
UTDFN-1.45×1-6AL
TSOT-23-6
CL5XX
MARKING INFORMATION
NOTE: X = Date Code. XX = Date Code
UTDFN-1.45×1-6AL
TSOT-23-6
YY X
YYY X X
Date Code - Week
Date Code - Year
Serial Number
Date Code - Quarter
Serial Number
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If
you have additional comments or questions, please contact your SGMICRO representative directly.
SG Micro Corp
www.sg-micro.com
MAY 2023
2
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
OVERSTRESS CAUTION
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed in Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to
absolute maximum rating conditions for extended periods
may affect reliability. Functional operation of the device at any
conditions beyond those indicated in the Recommended
Operating Conditions section is not implied.
VCC, ENABLE, nENABLE, IN............................... -0.3V to 6V
OUT, nOUT (Push-Pull) ...........................-0.3V to VCC + 0.3V
OUT, nOUT (Open-Drain) .................................. -0.3V to 30V
CDELAY...................................................-0.3V to VCC + 0.3V
Output Current (All Pins).............................................±20mA
Package Thermal Resistance
UTDFN-1.45×1-6AL, θJA .......................................... 294℃/W
TSOT-23-6, θJA ........................................................ 230℃/W
Junction Temperature.................................................+150℃
Storage Temperature Range.......................-65℃ to +150℃
Lead Temperature (Soldering, 10s)............................+260℃
ESD Susceptibility
ESD SENSITIVITY CAUTION
This integrated circuit can be damaged if ESD protections are
not considered carefully. SGMICRO recommends that all
integrated circuits be handled with appropriate precautions.
Failureto observe proper handlingand installation procedures
can cause damage. ESD damage can range from subtle
performance degradation tocomplete device failure. Precision
integrated circuits may be more susceptible to damage
because even small parametric changes could cause the
device not to meet the published specifications.
HBM.............................................................................4000V
CDM ............................................................................1000V
RECOMMENDED OPERATING CONDITIONS
Operating Junction Temperature Range......-40℃ to +125℃
Operating Ambient Temperature Range.......-40℃ to +125℃
DISCLAIMER
SG Micro Corp reserves the right to make any change in
circuit design, or specifications without prior notice.
SELECTOR GUIDE
DEVICE
SGM895A
SGM895P
SGM896A
SGM896P
SGM897A
SGM897P
SGM898A
SGM898P
SGM899A
SGM899P
ENABLE INPUT
Active-High
Active-High
Active-Low
Active-Low
Active-High
Active-High
Active-Low
Active-Low
Active-Low
Active-Low
OUTPUT
INPUT DELAY TIME ENABLE DELAY TIME
Active-High, Push-Pull
Active-High, Push-Pull
Active-Low, Push-Pull
Active-Low, Push-Pull
Active-High, Open-Drain
Active-High, Open-Drain
Active-Low, Open-Drain
Active-Low, Open-Drain
Active-High, Push-Pull
Active-High, Push-Pull
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
Capacitor-Adjustable
350ns Delay
Capacitor-Adjustable
350ns Delay
Capacitor-Adjustable
350ns Delay
Capacitor-Adjustable
350ns Delay
Capacitor-Adjustable
350ns Delay
SG Micro Corp
www.sg-micro.com
MAY 2023
3
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
PIN CONFIGURATIONS
SGM895/SGM897 (TOP VIEW)
SGM895/SGM897 (TOP VIEW)
1
2
3
6
5
4
ENABLE
GND
IN
VCC
CDELAY
VCC
ENABLE
GND
IN
1
2
6
5
4
CDELAY
OUT
OUT
3
UTDFN-1.45×1-6AL
TSOT-23-6
SGM896/SGM898 (TOP VIEW)
SGM896/SGM898 (TOP VIEW)
1
2
3
6
5
4
nENABLE
GND
VCC
CDELAY
VCC
nENABLE
GND
1
2
6
5
4
CDELAY
nOUT
nOUT
3
IN
IN
UTDFN-1.45×1-6AL
TSOT-23-6
SGM899 (TOP VIEW)
SGM899 (TOP VIEW)
1
2
3
6
5
4
nENABLE
GND
VCC
CDELAY
VCC
nENABLE
GND
1
2
6
5
4
CDELAY
OUT
OUT
3
IN
IN
UTDFN-1.45×1-6AL
TSOT-23-6
SG Micro Corp
MAY 2023
www.sg-micro.com
4
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
PIN DESCRIPTION
PIN
SGM895/SGM897
SGM896/SGM898
SGM899
NAME
FUNCTION
UTDFN-
TSOT-
UTDFN-
TSOT-
UTDFN-
TSOT-
1.45×1-6AL 23-6 1.45×1-6AL 23-6 1.45×1-6AL 23-6
Active-High Enable Input Pin. If ENABLE is set to low, the
output will immediately enter into false state (OUT is low or
nOUT is high) regardless of VIN. If VIN exceeds VTH, the output
1
1
—
—
—
—
ENABLE will enter into true state (OUT is high or nOUT is low) by setting
ENABLE high after the enable output delay time (adjustable
delay time for the SGM89_A and 350ns delay time for the
SGM89_P).
Active-Low Enable Input Pin. If nENABLE is set to high, the
output will immediately enter into false state (OUT is low or
nOUT is high) regardless of VIN. If VIN exceeds VTH, the output
nENABLE will enter into true state (OUT is high or nOUT is low) by setting
nENABLE low after the enable output delay time (adjustable
delay time for the SGM89_A and 350ns delay time for the
SGM89_P).
—
—
1
1
1
1
2
3
2
3
2
3
2
3
2
3
2
3
GND
Ground.
High-Impedance Detection Input. The detection threshold can
be adjusted by an external resistive divider connected to IN
pin. The output state changes when VIN exceeds VTH (0.5V,
TYP) or when VIN drops below VTL (0.495V, TYP).
IN
Active-High, Push-Pull (SGM895/SGM899) or Open-Drain
(SGM897) Output Pin. And the open-drain output needs a
pull-up resistor. The OUT is logic low when the enable input is
in the false state (ENABLE is low or nENABLE is high) or when
VIN drops below VTL (0.495V, TYP). The OUT is logic high after
the CDELAY adjustable delay period when the enable input is
in the true state (ENABLE is high or nENABLE is low) and VIN
4
4
—
—
4
4
OUT
exceeds VTH
.
Active-Low, Push-Pull (SGM896) or Open-Drain (SGM898)
Output Pin. And the open-drain output needs a pull-up resistor.
The nOUT is logic high when the enable input is in the false
state (ENABLE is low or nENABLE is high) or when VIN drops
below VTL (0.495V, TYP). The nOUT is logic low after the
CDELAY adjustable delay period when the enable input is in
the true state (ENABLE is high or nENABLE is low) and VIN
—
—
4
4
—
—
nOUT
exceeds VTH
.
Capacitor-Adjustable Delay. The delay time can be set by an
external capacitor (CCDELAY) between CDELAY and GND.
tDELAY (ms) = 3.95 × CCDELAY (nF) + 0.048ms
5
6
6
5
5
6
6
5
5
6
6
5
CDELAY
VCC
There is a 50µs (TYP) fixed delay for the output deasserting
when VIN falls below VTL.
Supply Voltage.
SG Micro Corp
www.sg-micro.com
MAY 2023
5
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
ELECTRICAL CHARACTERISTICS
(VCC = 1.6V to 5.5V, Full = -40℃ to +125℃, typical values are at VCC = 3.3V and TJ = +25℃, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
TEMP
MIN
TYP
MAX
UNITS
Supply
Operating Voltage Range
Under-Voltage Lockout (1)
VCC Supply Current
IN
VCC
VUVLO
ICC
Full
1.6
5.5
1.49
7.8
V
V
VCC falling
1.31
Full
Full
2.1
µA
0.495
0.492
0.489
0.487
0.500
0.500
0.495
0.495
5
0.505
0.508
0.501
0.503
+25℃
Full
Rising Threshold Voltage
Falling Threshold Voltage
VTH
VTL
VIN rising, 1.6V < VCC < 5.5V
VIN falling, 1.6V < VCC < 5.5V
V
V
+25℃
Full
Hysteresis
VHYST
IIN
VIN falling
mV
nA
Full
Full
Input Current
VIN = 0V or VCC
-20
20
CDELAY
Delay Charge Current
Delay Threshold
CDELAY Pull-Down Resistance
ENABLE/nENABLE
Input Low Voltage
Input High Voltage
Input Leakage Current
OUT/nOUT
ICD
Full
210
253
1.00
120
290
1.04
350
nA
V
VTCD
CDELAY rising
0.96
Full
Full
RCDELAY
Ω
VIL
VIH
Full
0.4
50
V
V
1.4
-50
Full
Full
ILEAK
ENABLE, nENABLE = VCC or GND
nA
VCC ≥ 1.2V, ISINK = 90µA,
SGM895/SGM897/SGM899 only
Full
Full
0.3
Output Low Voltage
(Open-Drain or Push-Pull)
VOL
V
VCC ≥ 2.25V, ISINK = 0.5mA
VCC ≥ 4.5V, ISINK = 1mA
0.3
0.4
Full
Full
VCC ≥ 2.25V, ISOURCE = 500µA
VCC ≥ 4.5V, ISOURCE = 800µA
0.8 × VCC
0.8 × VCC
Output High Voltage (Push-Pull)
VOH
ILKG
V
Full
Full
Output Open-Drain Leakage
Current
Output high impedance, VOUT = 28V
1
µA
Timing
CCDELAY = 0nF
VIN rising
Full
Full
Full
48
185
50
µs
ms
µs
tDELAY
IN to OUT/nOUT Propagation
Delay
CCDELAY = 47nF
tDL
VIN falling
ENABLE/nENABLE Minimum Input
Pulse Width
tPW
Full
Full
Full
1.1
µs
ns
ns
ENABLE/nENABLE Glitch Rejection
210
350
ENABLE/nENABLE to OUT/nOUT
Delay
tOFF
From device enabled to device disabled
From device disabled to device enabled
(SGM89_P)
tPROPP
Full
350
ns
ENABLE/nENABLE to OUT/nOUT
Delay
From device disabled
to device enabled
(SGM89_A)
CCDELAY = 0nF
CCDELAY = 47nF
Full
Full
30
µs
tPROPA
185
ms
NOTES:
1. If VCC is lower than VUVLO, the OUT will be low (or nOUT will be high).
2. The output state is not guaranteed if VCC is lower than 1.2V.
3. In the initial power-on phase, VCC must be greater than 1.6V and no less than 2ms to ensure correct output state.
SG Micro Corp
www.sg-micro.com
MAY 2023
6
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
TYPICAL PERFORMANCE CHARACTERISTICS
VCC = 3.3V and TJ = +25℃, unless otherwise noted.
Supply Current vs. Supply Voltage
Supply Current vs. Temperature
3.0
2.7
2.4
2.1
1.8
1.5
1.2
0.9
0.6
0.3
0.0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VCC = 5V
VCC = 3V
VCC = 1.5V
-40 -25 -10
5
20 35 50 65 80 95 110 125
Temperature (℃)
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
VCC (V)
IN Threshold vs. Temperature
OUT Delay vs. CCDELAY
4500
4000
3500
3000
2500
2000
1500
1000
500
0.5010
0.5005
0.5000
0.4995
0.4990
0.4985
0.4980
0
-40 -25 -10
5
20 35 50 65 80 95 110 125
0
200
400
600
800
1000
Temperature (℃)
CCDELAY (nF)
Output Low Voltage vs. Sink Current
(SGM895/SGM896/SGM899)
Output Low Voltage vs. Sink Current
(SGM897/SGM898)
1.5
1.2
0.9
0.6
0.3
0.0
1.5
1.2
0.9
0.6
0.3
0.0
VCC = 1.5V
VCC = 3V
VCC = 3V
VCC = 1.5V
VCC = 5V
VCC = 5V
0
2
4
6
8
10 12 14 16 18
0
2
4
6
8
10 12 14 16 18
ISINK (mA)
ISINK (mA)
SG Micro Corp
www.sg-micro.com
MAY 2023
7
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
TYPICAL PERFORMANCE CHARACTERISTICS (continued)
VCC = 3.3V and TJ = +25℃, unless otherwise noted.
Output High Voltage vs. Source Current
(SGM895/SGM896/SGM899)
Maximum Transient Duration vs. Input Overdrive
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
500
450
400
350
300
250
200
150
100
50
VCC = 5V
VCC = 3V
Reset Occurs
VCC = 1.5V
0
0
2
4
6
8
10 12 14 16 18
0
10 20 30 40 50 60 70 80 90 100
ISOURSE (mA)
VOVERDRIVE (mV)
Enable Turn-On/Off Delay (SGM895A)
Enable Turn-On/Off Delay (SGM895P)
OUT
OUT
ENABLE
ENABLE
Time (40μs/div)
Time (200ns/div)
SG Micro Corp
MAY 2023
www.sg-micro.com
8
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
FUNCTIONAL BLOCK DIAGRAM
ENABLE (SGM895)
nENABLE (SGM896/SGM899)
VCC
+
-
IN
OUT (SGM895/SGM899)
nOUT (SGM896)
Logic
0.5V
253nA
+
-
1.0V
CDELAY
SGM895, SGM896, SGM899
GND
Figure 2. SGM895/SGM896/SGM899 Block Diagram
SG Micro Corp
www.sg-micro.com
MAY 2023
9
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
DETAILED DESCRIPTION
The
SGM895/SGM896/SGM897/SGM898/SGM899
Supply Voltage Input (VCC)
are low-power and high-accuracy microprocessor
supervisory circuits with adjustable sequencing
capability.
The VCC voltage range is from 1.6V to 5.5V, When VCC
falls below VUVLO, the device deasserts. However, the
output state is not guaranteed if VCC is lower than 1.2V.
For noisy systems, it is recommended to place a 100nF
bypass capacitor close to the VCC pin. A 100kΩ
pull-down resistor should be connected to ground for
push-pull output device to ensure correct logic low
state.
When VIN exceeds VTH, set enable input to assert or
deassert output. After the enable input is asserted, the
output asserts with the CDELAY adjusted delay period
(SGM89_A) or with a 350ns fixed propagation delay
(SGM89_P). The output pin states of all devices are
based on various VIN and ebable input shown in Table 1,
2, and 3.
Detection Input (IN)
IN pin is used to monitor external voltage, with low
leakage current, and larger-value resistive divider will
not cause significant bias voltage. The rising threshold
Table 1. SGM895/SGM897 Output
IN Pin
ENABLE Pin
Low
OUT Pin
VTH is 0.5V and falling threshold VTL is 0.495V (VHYST =
VIN < VTH
VIN < VTH
VIN > VTH
Low
5mV). Refer to Table 1, 2 and 3. With asserted
ENABLE/nENABLE pin, when VIN is above VTH, OUT
goes high (nOUT goes low) after a tDELAY period. When
VIN falls below 0.495V, OUT goes low (nOUT goes
high) after a delay time of 50µs.
High
Low
Low
Low
OUT = VCC (SGM895)
OUT = high-impedance (SGM897)
VIN > VTH
High
Adjustable Delay (CDELAY)
Table 2. SGM896/SGM898 Output
An external capacitor connected between CDELAY pin
and GND is used to adjust delay time. With asserted
ENABLE/nENABLE pin, when VIN is above VTH, the
internal current ICD is 253nA (TYP). The current source
starts charging capacitor to 1V, OUT goes high (nOUT
goes low), and the capacitor is immediately discharged
to ensure next tDELAY period. Adjust the delay time
according to the equation:
IN Pin
nENABLE Pin
nOUT Pin
nOUT = VCC (SGM896)
nOUT = high-impedance (SGM898)
nOUT = VCC (SGM896)
nOUT = high-impedance (SGM898)
Low
VIN < VTH
Low
VIN < VTH
VIN > VTH
VIN > VTH
High
Low
High
nOUT = VCC (SGM896)
nOUT = high-impedance (SGM898)
tDELAY (ms) = 3.95 × CCDELAY (nF) + 0.048ms
(1)
where CCDELAY is the external capacitor from CDELAY
to GND.
Table 3. SGM899 Output
IN Pin
nENABLE Pin
Low
OUT Pin
Low
Under the condition of VIN > VTH, the output state
depends on the state of ENABLE (nENABLE). For
devices SGM89_A, the delay time can be adjusted by
external capacitor. For devices SGM89_P, the
propagation delay is fixed (tOFF = 350ns). Timing
diagrams of all devices are shown in Figure 3 to Figure
8.
VIN < VTH
VIN < VTH
VIN > VTH
VIN > VTH
High
Low
Low
High
High
Low
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SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
DETAILED DESCRIPTION (continued)
VCC
VUVLO
IN
VTH
VTL
(VTH - VHYST
)
t < tPROPA
ENABLE
OUT
t > tPW
tPROPA
tDELAY
tPROPA
tOFF
tDL
Figure 3. SGM895A/SGM897A Timing Diagram
VCC
VUVLO
IN
ENABLE
OUT
VTH
VTL
(VTH - VHYST
)
t > tPW
tPROPP
tDL
tDELAY
tOFF
tPROPP
Figure 4. SGM895P/SGM897P Timing Diagram
SG Micro Corp
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SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
DETAILED DESCRIPTION (continued)
VCC
VUVLO
IN
VTH
VTL
(VTH - VHYST
)
t < tPROPA
nENABLE
nOUT
t > tPW
tPROPA
tDL
tDELAY
tOFF
tPROPA
Figure 5. SGM896A/SGM898A Timing Diagram
VCC
VUVLO
IN
nENABLE
nOUT
VTH
VTL
(VTH - VHYST
)
t > tPW
tPROPP
tDL
tDELAY
tOFF
tPROPP
Figure 6. SGM896P/SGM898P Timing Diagram
SG Micro Corp
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MAY 2023
12
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
DETAILED DESCRIPTION (continued)
VCC
VUVLO
IN
VTH
VTL
(VTH - VHYST
)
t < tPROPA
nENABLE
OUT
t > tPW
tPROPA
tDL
tDELAY
tOFF
tPROPA
Figure 7. SGM899A Timing Diagram
VCC
VUVLO
IN
nENABLE
OUT
VTH
VTL
(VTH - VHYST
t > tPW
)
tPROPP
tDL
tDELAY
tOFF
tPROPP
Figure 8. SGM899P Timing Diagram
Enable Input (ENABLE or nENABLE)
Output (OUT/nOUT)
When VIN is above VTH, two types enable input
ENABLE/nENABLE determine the output state. The
SGM895/SGM897 are active-high enable input and
SGM896/SGM898/SGM899 are active-low enable
input. For devices SGM89_A, the delay time can be
adjusted by an external capacitor. For devices
SGM89_P, the propagation delay is fixed of 350ns.
There are four selectable output options. The
SGM895/SGM899 are active-high, push-pull output.
the SGM897 is active-high, open-drain output. the
SGM896 is active-low, push-pull output. And the
SGM898 is active-low, open-drain output. The
reference voltage of push-pull outputs are VCC, and the
pull-up reference voltage of open-drain outputs are up
to 28V.
The maximal logic-low threshold VIL is 0.4V and
minimal logic-high threshold VIH is 1.4V.
SG Micro Corp
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MAY 2023
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SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
APPLICATION INFORMATION
Input Threshold
Using an N-Channel Device for Sequencing
In higher power applications, the power loss of
N-channel MOSFET can be reduced due to its lower
on-resistance. However, it requires a sufficient positive
IN pin can be used to monitor external voltage through
resistive divider. With low leakage current, larger-value
resistors reduce current sonsumption without
significant bias voltage. According to typical application
circuit in Figure 1, for a given R2, R1 can be calculated
based on desired detection voltage through the
following equation:
VGS voltage to fully turn on. Figure 10 shows the switch
sequencing circuit by using an N-channel MOSFET. Up
to 28V pull-up voltage provides sufficient VGS voltage
for higher voltage applications.
VMONITOR
3.3V Always On
R = R ×
-1
(2)
1
2
VTH
P
0V to 28V
VMONITOR is the desired detection voltage. VTH is the
detector input threshold of 0.5V.
VCC
ENABLE
RP ULL -UP
OUT
R1
R2
SGM897
Pull-Up Resistor Values (SGM897/SGM898)
To ensure proper output logic-low voltage, pull-up
resistor value should be limited. Refer to Electrical
Characteristics section, if VCC is 2.25V, the pull-up
voltage is 28V, and for an output voltage lower than
0.3V, the pull-up resistor should be limited to 56kΩ. if
VCC is 4.5V and the pull-up voltage is 28V, and for an
output voltage lower than 0.4V, the pull-up resistor
should be limited to 28kΩ. The sink current ability
dependents on the VCC supply voltage.
IN
CDELAY
GND
Figure 9. Over-Voltage Protection
5V Bus
VCC
1.2V Input
N
Monitered
3.3V
1.2V Output
Typical Application Circuits
ENABLE
OUT
Three types typical applications are shown in.Figure 9,
10 and 11. Figure 9 shows that the SGM897 is used as
an over-voltage protection circuit by a P-channel
MOSFET. Figure 10 shows that the SGM895 is used as
a low-voltage sequencing with an N-channel MOSFET.
Figure 11 shows that the SGM895 is used in a
multiple-output sequencing circuit.
R1
R2
SGM895
IN
CDELAY
GND
CCDELAY
Figure 10. Low-Voltage Sequencing Using an N-Channel
MOSFET
SG Micro Corp
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MAY 2023
14
SGM895/SGM896
SGM897/SGM898/SGM899
Ultra-Small, Supervisory Circuits
with Adjustable Sequencing
APPLICATION INFORMATION (continued)
3.3V
2.5V
1.8V
1.2V
5V Bus
DC/DC
EN
DC/DC
EN
DC/DC
EN
DC/DC
EN
ON
OFF
System Enable
VCC
ENABLE
SGM895
CDELAY
GND
VCC
ENABLE
SGM895
CDELAY
GND
VCC
ENABLE
SGM895
CDELAY
GND
VCC
ENABLE
SGM895
CDELAY
GND
OUT
OUT
OUT
OUT
IN
IN
IN
IN
CCDELAY
CCDELAY
CCDELAY
CCDELAY
Figure 11. Multiple-Output Sequencing
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
MAY 2023 ‒ REV.A.3 to REV.A.4
Page
Changed Electrical Characteristics Section..........................................................................................................................................................6
Updated Detail Description section...............................................................................................................................................................10-13
Updated Application Information section...................................................................................................................................................... 14, 15
OCTOBER 2021 ‒ REV.A.2 to REV.A.3
Page
Updated Package Outline Dimensions section ............................................................................................................................................ 10, 11
OCTOBER 2021 ‒ REV.A.1 to REV.A.2
Page
Updated UTDFN-1.45×1-6AL Package..........................................................................................................................................................4, 16
JULY 2021 ‒ REV.A to REV.A.1
Page
Changed Package/Ordering Information section..................................................................................................................................................2
Changes from Original (JULY 2020) to REV.A
Page
Changed from product preview to production data.............................................................................................................................................All
SG Micro Corp
www.sg-micro.com
MAY 2023
15
PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
UTDFN-1.45×1-6AL
e
D
N6
E
L
N1
DETAIL A
b
L1
PIN 1#
TOP VIEW
BOTTOM VIEW
DETAIL B
SEATING PLANE
0.30
A
C
0.49
A2
A1
eee C
0.75
SIDE VIEW
L (L1)
L2
ALTERNATE A-3
ALTERNATE A-1
ALTERNATE A-2
0.5
DETAIL A
ALTERNATE TERMINAL CONSTRUCTION
RECOMMENDED LAND PATTERN (Unit: mm)
A2
A1
ALTERNATE B-1
ALTERNATE B-2 ALTERNATE B-3
DETAIL B
ALTERNATE CONSTRUCTION
Dimensions In Millimeters
Symbol
MIN
MOD
MAX
0.600
0.050
A
A1
A2
b
0.450
-
-0.004
-
0.150 REF
0.150
1.374
0.924
-
0.300
1.526
1.076
D
-
E
-
e
0.500 BSC
L
0.250
0.250
0.000
-
0.450
0.500
0.100
L1
L2
eee
-
-
0.050
NOTE: This drawing is subject to change without notice.
SG Micro Corp
TX000164.002
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PACKAGE INFORMATION
PACKAGE OUTLINE DIMENSIONS
TSOT-23-6
0.69
0.95
D
e
2.59
E1
E
0.99
b
RECOMMENDED LAND PATTERN (Unit: mm)
L
A
θ
0.25
A1
c
A2
Dimensions In Millimeters
Symbol
MIN
-
MOD
MAX
1.100
0.100
1.000
0.500
0.200
3.050
1.700
2.950
A
A1
A2
b
-
0.000
0.700
0.300
0.080
2.820
1.550
2.650
-
-
-
c
-
D
E
-
-
E1
e
-
0.950 BSC
L
0.300
0°
-
-
0.600
8°
θ
NOTES:
1. Body dimensions do not include mode flash or protrusion.
2. This drawing is subject to change without notice.
SG Micro Corp
TX00038.002
www.sg-micro.com
PACKAGE INFORMATION
TAPE AND REEL INFORMATION
REEL DIMENSIONS
TAPE DIMENSIONS
P2
P0
W
Q2
Q4
Q2
Q4
Q2
Q4
Q1
Q3
Q1
Q3
Q1
Q3
B0
Reel Diameter
P1
A0
K0
Reel Width (W1)
DIRECTION OF FEED
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF TAPE AND REEL
Reel Width
Reel
Diameter
A0
B0
K0
P0
P1
P2
W
Pin1
Package Type
W1
(mm)
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant
UTDFN-1.45×1-6AL
TSOT-23-6
7″
7″
9.5
9.5
1.15
3.20
1.60
3.10
0.75
1.10
4.0
4.0
4.0
4.0
2.0
2.0
8.0
8.0
Q1
Q3
SG Micro Corp
TX10000.000
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PACKAGE INFORMATION
CARTON BOX DIMENSIONS
NOTE: The picture is only for reference. Please make the object as the standard.
KEY PARAMETER LIST OF CARTON BOX
Length
(mm)
Width
(mm)
Height
(mm)
Reel Type
Pizza/Carton
7″ (Option)
7″
368
442
227
410
224
224
8
18
SG Micro Corp
www.sg-micro.com
TX20000.000
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