SGM11210M [SGMICRO]

DP10T Diversity Switch with MIPI RFFE for Carrier Aggregation;
SGM11210M
型号: SGM11210M
厂家: Shengbang Microelectronics Co, Ltd    Shengbang Microelectronics Co, Ltd
描述:

DP10T Diversity Switch with MIPI RFFE for Carrier Aggregation

文件: 总13页 (文件大小:668K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SGM11210M  
DP10T Diversity Switch  
with MIPI RFFE for Carrier Aggregation  
GENERAL DESCRIPTION  
FEATURES  
The SGM11210M is a dual single-pole/five-throw  
(2xSP5T) antenna switch, which supports from 0.1GHz  
to 3.8GHz. The device features low insertion loss and  
high isolation, which make it suitable for high linearity  
receiving applications. It also has the advantage of high  
linearity performance for diversity receiving in carrier  
aggregation applications.  
Supply Voltage Range: 2.4V to 4.8V  
Advanced Silicon-On-Insulator (SOI) Process  
Frequency Range: 0.1GHz to 3.8GHz  
Low Insertion Loss: 1dB (TYP) at 3.8GHz  
MIPI RFFE Interface Compatible  
No External DC Blocking Capacitors Required  
Available in a Green ULGA-2.4×2-18L Package  
The SGM11210M has the ability to integrate a DP10T  
(2×SP5T) RF switch and a programmable MIPI  
controller on silicon-on-insulator (SOI) process. Internal  
driver and decoder for switch control signals are offered  
by the controller, which makes it flexible in RF path  
band and routing selection.  
BLOCK DIAGRAM  
SCL SDA VIO VDD  
MIPI RFFE Interface  
RFA1  
RFA2  
RFA3  
RFA4  
RFB1  
RFB2  
RFB3  
RFB4  
No external DC blocking capacitors required on the RF  
paths as long as no external DC voltage is applied,  
which can save PCB area and cost.  
The SGM11210M is available in a Green ULGA-2.4×2-18L  
RFA5  
RFB5  
package.  
APPLICATIONS  
RFCOM_A RFCOM_B  
3G/4G Applications  
Figure 1. SGM11210M Block Diagram  
Carrier Aggregation Diversity  
SG Micro Corp  
DECEMBER 2022 – REV.A  
www.sg-micro.com  
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
PACKAGE/ORDERING INFORMATION  
SPECIFIED  
TEMPERATURE  
RANGE  
PACKAGE  
DESCRIPTION  
ORDERING  
NUMBER  
PACKAGE  
MARKING  
PACKING  
OPTION  
MODEL  
SGM02  
XXXXX  
SGM11210M ULGA-2.4×2-18L  
SGM11210MYULB18G/TR  
Tape and Reel, 3000  
-40to +85℃  
MARKING INFORMATION  
NOTE: XXXXX = Date Code, Trace Code and Vendor Code.  
X X X X X  
Vendor Code  
Trace Code  
Date Code - Year  
Green (RoHS & HSF): SG Micro Corp defines "Green" to mean Pb-Free (RoHS compatible) and free of halogen substances. If  
you have additional comments or questions, please contact your SGMICRO representative directly.  
OVERSTRESS CAUTION  
ABSOLUTE MAXIMUM RATINGS  
Stresses beyond those listed in Absolute Maximum Ratings  
may cause permanent damage to the device. Exposure to  
absolute maximum rating conditions for extended periods  
may affect reliability. Functional operation of the device at any  
conditions beyond those indicated in the Recommended  
Operating Conditions section is not implied.  
Supply Voltage, VDD ........................................................5V  
Supply Voltage for MIPI, VIO ...........................................2V  
SDA, SCL Control Voltage, VCTL ......................................2V  
RF Input Power, PIN ................................................. 25dBm  
Junction Temperature ..............................................+150℃  
Storage Temperature Range ......................-55to +150℃  
Lead Temperature (Soldering, 10s) ..........................+260℃  
ESD Susceptibility  
ESD SENSITIVITY CAUTION  
HBM......................................................................... 1000V  
This integrated circuit can be damaged if ESD protections are  
not considered carefully. SGMICRO recommends that all  
integrated circuits be handled with appropriate precautions.  
Failure to observe proper handling and installation  
procedures can cause damage. ESD damage can range from  
subtle performance degradation to complete device failure.  
Precision integrated circuits may be more susceptible to  
damage because even small parametric changes could  
cause the device not to meet the published specifications.  
RECOMMENDED OPERATING CONDITIONS  
Operating Temperature Range.....................-40to +85℃  
Operating Frequency Range ................... 0.1GHz to 3.8GHz  
Supply Voltage, VDD ......................................... 2.4V to 4.8V  
Supply Voltage for MIPI, VIO ..........................1.65V to 1.95V  
DISCLAIMER  
SG Micro Corp reserves the right to make any change in  
circuit design, or specifications without prior notice.  
SG Micro Corp  
www.sg-micro.com  
DECEMBER 2022  
2
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
PIN CONFIGURATION  
(TOP VIEW)  
RFB2  
RFB3  
RFB4  
RFB5  
N.C.  
1
2
3
4
5
18  
17  
16  
15  
14  
13  
12  
11  
10  
RFA2  
RFA3  
RFA4  
RFA5  
N.C.  
GND  
6
7
8
9
ULGA-2.4×2-18L  
PIN DESCRIPTION  
PIN  
NAME  
RFB2  
RFB3  
RFB4  
RFB5  
N.C.  
FUNCTION  
1
RF Port B2.  
RF Port B3.  
RF Port B4.  
RF Port B5.  
2
3
4
5, 10  
No Connection.  
DC Power Supply.  
Supply Voltage for MIPI.  
RFFE Data Signal.  
RFFE Clock Signal.  
RF Port A5.  
6
VDD  
7
VIO  
8
SDA  
9
SCL  
11  
RFA5  
RFA4  
RFA3  
RFA2  
RFA1  
RFCOM_A  
RFCOM_B  
RFB1  
GND  
12  
RF Port A4.  
13  
RF Port A3.  
14  
RF Port A2.  
15  
RF Port A1.  
16  
RF Common Port A.  
RF Common Port B.  
RF Port B1.  
17  
18  
Exposed Pad  
Ground.  
SG Micro Corp  
www.sg-micro.com  
DECEMBER 2022  
3
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
Register_0 TRUTH TABLE (RFCOM_B)  
Table 1. Register_0 Truth Table (RFCOM_B)  
Register_0 Bits  
State  
Mode  
D7  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D6  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D5  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D4  
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
D3  
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
D2  
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
D1  
0
0
1
1
0
0
0
0
1
1
0
0
1
1
0
0
D0  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
2
All Isolation  
RFB1  
3
RFB2  
4
RFB3  
5
RFB4  
6
RFB5  
7
RFB5 + RFB4  
RFB5 + RFB3  
RFB5 + RFB2  
RFB5 + RFB1  
RFB4 + RFB3  
RFB4 + RFB2  
RFB4 + RFB1  
RFB3 + RFB2  
RFB3 + RFB1  
RFB2 + RFB1  
8
9
10  
11  
12  
13  
14  
15  
16  
Register_1 TRUTH TABLE (RFCOM_A)  
Table 2. Register_1 Truth Table (RFCOM_A)  
Register_1 Bits  
State  
Mode  
D7  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D6  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D5  
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D4  
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
D3  
0
0
0
0
0
0
1
1
1
1
0
0
0
0
0
0
D2  
0
0
0
0
1
1
1
1
1
1
0
0
0
0
1
1
D1  
0
0
1
1
0
0
0
0
1
1
0
0
1
1
0
0
D0  
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
2
All Isolation  
RFA1  
3
RFA2  
4
RFA3  
5
RFA4  
6
RFA5  
7
RFA5 + RFA4  
RFA5 + RFA3  
RFA5 + RFA2  
RFA5 + RFA1  
RFA4 + RFA3  
RFA4 + RFA2  
RFA4 + RFA1  
RFA3 + RFA2  
RFA3 + RFA1  
RFA2 + RFA1  
8
9
10  
11  
12  
13  
14  
15  
16  
SG Micro Corp  
www.sg-micro.com  
DECEMBER 2022  
4
 
 
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
ELECTRICAL CHARACTERISTICS  
(TA = +25, VDD = 2.4V to 4.8V, typical values are at VDD = 2.8V, PIN = 0dBm, 50Ω, unless otherwise noted.)  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
DC Characteristics  
Supply Voltage  
VDD  
IDD  
2.4  
2.8  
32  
4.8  
60  
V
μA  
V
Supply Current  
Supply Voltage for MIPI  
Supply Current for MIPI  
VIO  
1.65  
1.8  
4.8  
VIO  
1.95  
10  
IVIO  
μA  
VCTL_H  
VCTL_L  
tSW  
High  
Low  
0.8 × VIO  
0
1.95  
0.45  
2
Control Voltage  
V
Switching Time  
Turn-On Time  
50% of control voltage to 90% of RF power  
Time from VDD = 0V to part on and RF at 90%  
1
5
μs  
μs  
tON  
10  
RF Characteristics  
f0 = 0.1GHz to 1.0GHz  
f0 = 1.0GHz to 2.0GHz  
f0 = 2.0GHz to 2.7GHz  
f0 = 2.7GHz to 3.8GHz  
f0 = 0.1GHz to 1.0GHz  
f0 = 1.0GHz to 2.0GHz  
f0 = 2.0GHz to 2.7GHz  
f0 = 2.7GHz to 3.8GHz  
f0 = 0.1GHz to 1.0GHz  
f0 = 1.0GHz to 2.0GHz  
f0 = 2.0GHz to 2.7GHz  
f0 = 2.7GHz to 3.8GHz  
f0 = 0.1GHz to 1.0GHz  
f0 = 1.0GHz to 2.0GHz  
f0 = 2.0GHz to 2.7GHz  
f0 = 2.7GHz to 3.8GHz  
0.40  
0.50  
0.60  
1.00  
40.0  
31.0  
26.0  
23.0  
40  
0.80  
1.00  
1.24  
1.68  
Insertion Loss  
(RFCOM to All RF Ports)  
IL  
dB  
dB  
dB  
25.9  
19.0  
14.0  
11.0  
27  
Isolation  
(RFCOM_A to Any Off RFA Port,  
RFCOM_B to Any Off RFB Port)  
ISO  
ISO  
21  
31  
Isolation  
(RFCOM_A to RFCOM_B)  
19  
26  
15  
23  
30  
25  
Input Return Loss  
(RFCOM to All RF Ports)  
RL  
dB  
24  
16  
0.1dB Compression Point  
(RFCOM to All RF Ports)  
P0.1dB  
f0 = 0.1GHz to 3.8GHz  
25  
dBm  
SG Micro Corp  
DECEMBER 2022  
www.sg-micro.com  
5
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
MIPI READ AND WRITE TIMING  
SCL  
SDA  
SA3  
SA2  
SA1  
SA0  
0
1
0
A4  
A3  
A2  
A1  
A0  
P
SSC  
Example Register Write Command Frame  
SCL  
Signal Driven by Master  
Signal Not Driven; Pull-Down Only  
For Reference Only  
SDA  
P
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
P
0
Example Data Frame  
Bus  
Park  
Figure 2. Register Write Command Timing Diagram  
SCL  
SDA  
SA3  
SA2  
SA1  
SA0  
0
1
1
A4  
A3  
A2  
A1  
A0  
P
SSC  
Example Register Read Command Frame  
Signal Driven by Master  
SCL  
SDA  
Signal Not Driven; Pull-Down Only  
Signal Driven by Slave  
P
0
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
P
0
For Reference Only  
Example Data Frame  
Bus  
Bus  
Park  
Park  
Figure 3. Register Read Command Timing Diagram  
COMMAND SEQUENCE BIT DEFINITIONS  
Command Frame Bits  
Bus  
Extended Operation  
Bus  
Bus  
Park  
Cycle  
Type SSC  
Parity Bits Park  
Cycle  
Data Frame  
Bits  
Parity  
Bits  
Data Frame Parity  
C[11:8] C[7] C[6:5]  
C[4]  
C[3:0]  
Park  
Bits  
Bits  
Cycle  
Reg  
Y
SA[3:0]  
SA[3:0]  
SA[3:0]  
0
0
1
10  
11  
A[4]  
A[4]  
D[4]  
A[3:0]  
A[3:0]  
D[3:0]  
Y
Y
Y
-
D[7:0]  
D[7:0]  
-
Y
Y
-
Y
Y
-
-
-
-
-
-
-
-
-
-
Write  
Reg  
Read  
Y
Y
Y
Reg0  
Write  
Y
D[6:5]  
Legends:  
SSC = Sequence Start Command  
SA = Slave Address  
A = Register Address  
D = Data Bit  
SG Micro Corp  
DECEMBER 2022  
www.sg-micro.com  
6
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
REGISTER MAPS  
Register_0  
Register Address: 0x00; R/W  
Table 3. Register_0 Register Details  
Bits  
Bit Name  
Description  
Description  
Description  
Default  
Type B/G  
No  
Trig  
D[7:0]  
MODE_CTRL  
See Table 1 section.  
00000000 R/W  
0, 1, 2  
Register_1  
Register Address: 0x01; R/W  
Table 4. Register_1 Register Details  
Bits  
Bit Name  
Default  
Type B/G  
No  
Trig  
D[7:0]  
MODE_CTRL  
See Table 2 section.  
00000000 R/W  
0, 1, 2  
PM_TRIG  
Register Address: 0x1C; R/W and W  
Table 5. PM_TRIG Register Details  
Bits  
Bit Name  
Default  
Type B/G  
Trig  
0: Normal  
1: Low power  
0: Active - Normal  
D[7]  
PWR_MODE_1  
0
R/W  
R/W  
Yes  
Yes  
No  
D[6]  
D[5]  
PWR_MODE_0  
0
0
No  
No  
1: Startup - All registers are reset to the default  
If any one of the three TRIGGER_MASK_x  
0: TRIGGER_2 enabled  
1: TRIGGER_2 disabled  
TRIGGER_MASK_2  
R/W  
R/W  
R/W  
No  
No  
No  
is set to logic '1', the corresponding trigger  
is disabled, in that case data written to a  
register associated with the trigger goes  
0: TRIGGER_1 enabled directly to the destination register.  
1: TRIGGER_1 disabled Otherwise, if the TRIGGER_MASK_x is  
set to logic '0', incoming data is written to  
D[4]  
D[3]  
TRIGGER_MASK_1  
TRIGGER_MASK_0  
0
0
No  
No  
the shadow register, and the destination  
register is unchanged until its corresponding  
trigger is asserted.  
0: TRIGGER_0 enabled  
1: TRIGGER_0 disabled  
0: Keep its associated destination registers unchanged  
D[2]  
D[1]  
D[0]  
TRIGGER_2  
TRIGGER_1  
TRIGGER_0  
1: Load its associated destination registers with the data in the parallel  
shadow register, provided TRIGGER_MASK_2 is set to logic '0'  
0: Keep its associated destination registers unchanged  
1: Load its associated destination registers with the data in the parallel  
shadow register, provided TRIGGER_MASK_1 is set to logic '0'  
0: Keep its associated destination registers unchanged  
0
0
0
W
W
W
Yes  
Yes  
Yes  
No  
No  
No  
1: Load its associated destination registers with the data in the parallel  
shadow register, provided TRIGGER_MASK_0 is set to logic '0'  
PRODUCT_ID  
Register Address: 0x1D; R  
Table 6. PRODUCT_ID Register Details  
Bits  
Bit Name  
Description  
Default  
Type B/G  
No  
Trig  
D[7:0]  
PRODUCT_ID  
Product number.  
00000000  
R
No  
SG Micro Corp  
www.sg-micro.com  
DECEMBER 2022  
7
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
REGISTER MAPS (continued)  
MANUFACTURER_ID  
Register Address: 0x001E; R  
Table 7. MANUFCTURER_ID Register Details  
Bits  
Bit Name  
Description  
Lower eight bits of Manufacturer ID.  
Default  
Type B/G  
No  
Trig  
D[7:0] MANUFACTURER_ID[7:0] Read-only. Note that during USID programming, the write command  
sequence is executed on the register, but the value does not change.  
01001010  
R
No  
MAN_USID  
Register Address: 0x001F; R and R/W  
Table 8. MAN_USID Register Details  
Bits  
Bit Name  
Description  
Default  
Type B/G  
Trig  
D[7:6]  
Reserved  
Reserved.  
Upper two bits of Manufacturer ID.  
00  
R
No  
No  
No  
No  
D[5:4] MANUFACTURER_ID[9:8] Read-only. Note that during USID programming, the write command  
sequence is executed on the register, but the value does not change.  
00  
R
No  
No  
D[3:0]  
USID  
USID of the device.  
1011  
R/W  
SG Micro Corp  
DECEMBER 2022  
www.sg-micro.com  
8
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
TYPICAL APPLICATION CIRCUIT  
Supply Voltage for MIPI  
DC Power Supply  
VIO  
SCL  
SDA  
RFFE Clock Signal  
RFFE Data Signal  
DNI  
DNI  
100nF  
100nF  
VDD  
RF Port B1  
RF Port B2  
RF Port B3  
RF Port B4  
RF Port B5  
RF Port A1  
RF Port A2  
RF Port A3  
RF Port A4  
RF Port A5  
RFB1  
RFB2  
RFB3  
RFB4  
RFB5  
RFA1  
RFA2  
RFA3  
RFA4  
RFA5  
SGM11210M  
RFCOM_A  
RF Common Port A  
RFCOM_B  
RF Common Port B  
Figure 4. SGM11210M Typical Application Circuit  
EVALUATION BOARD LAYOUT  
Figure 5. SGM11210M Evaluation Board Layout  
SG Micro Corp  
DECEMBER 2022  
www.sg-micro.com  
9
DP10T Diversity Switch  
SGM11210M  
with MIPI RFFE for Carrier Aggregation  
REVISION HISTORY  
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.  
Changes from Original (DECEMBER 2022) to REV.A  
Page  
Changed from product preview to production data..................................................................................................................................................... All  
SG Micro Corp  
www.sg-micro.com  
DECEMBER 2022  
10  
PACKAGE INFORMATION  
PACKAGE OUTLINE DIMENSIONS  
ULGA-2.4×2-18L  
D
L
e
PIN 1#  
L
D1  
e
E
E1  
L2  
L3  
L1  
L1  
TOP VIEW  
BOTTOM VIEW  
0.50  
0.40  
0.20  
1.80  
1.40  
0.70  
A
A2  
A1  
0.40  
0.20  
SIDE VIEW  
RECOMMENDED LAND PATTERN (Unit: mm)  
Dimensions In Millimeters  
Symbol  
MIN  
MOD  
0.550  
MAX  
0.600  
0.200  
A
A1  
A2  
D
0.500  
0.140  
0.170  
0.380 BSC  
2.400  
2.300  
1.900  
2.500  
2.100  
E
2.000  
D1  
E1  
e
0.500  
0.700  
0.400 BSC  
0.200  
L
L1  
L2  
L3  
0.100  
0.650  
0.350  
NOTE: This drawing is subject to change without notice.  
SG Micro Corp  
TX00214.000  
www.sg-micro.com  
PACKAGE INFORMATION  
TAPE AND REEL INFORMATION  
REEL DIMENSIONS  
TAPE DIMENSIONS  
P2  
P0  
W
Q2  
Q4  
Q2  
Q4  
Q2  
Q4  
Q1  
Q3  
Q1  
Q3  
Q1  
Q3  
B0  
Reel Diameter  
P1  
A0  
K0  
Reel Width (W1)  
DIRECTION OF FEED  
NOTE: The picture is only for reference. Please make the object as the standard.  
KEY PARAMETER LIST OF TAPE AND REEL  
Reel Width  
Reel  
Diameter  
A0  
B0  
K0  
P0  
P1  
P2  
W
Pin1  
Package Type  
W1  
(mm)  
(mm) (mm) (mm) (mm) (mm) (mm) (mm) Quadrant  
ULGA-2.4×2-18L  
7″  
9.5  
2.25  
2.65  
0.75  
4.0  
4.0  
2.0  
8.0  
Q2  
SG Micro Corp  
TX10000.000  
www.sg-micro.com  
PACKAGE INFORMATION  
CARTON BOX DIMENSIONS  
NOTE: The picture is only for reference. Please make the object as the standard.  
KEY PARAMETER LIST OF CARTON BOX  
Length  
(mm)  
Width  
(mm)  
Height  
(mm)  
Reel Type  
Pizza/Carton  
7″ (Option)  
7″  
368  
442  
227  
410  
224  
224  
8
18  
SG Micro Corp  
www.sg-micro.com  
TX20000.000  

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