SC1452EIMSTR_技术文档

SC1452

Dual 150mA LDO Regulator

with Programmable Reset

POWER MANAGEMENT

ꢀeatures

Description

The SC1452 is a state of the art device intended to

provide maximum performance and flexibility in battery

operated systems. It has been designed specifically to

fully support a single Li-Ion battery and its external charger

voltages.

u Up to 150mA per regulator output

u Low quiescent current (130µA typical with both

outputs at 150mA)

u Low dropout voltage

u Wide selection of output voltages

u Stable operation with ceramic caps

u Tight load and line regulation

u Current and thermal limiting

u Reverse input polarity protection

u <1µA off-mode current

The SC1452 contains two independently enabled, ultra

low dropout voltage regulators (ULDOs). It operates from

an input voltage range of 2.25V to 6.5V, and a wide

variety of output voltage options are available which are

designed to provide an initial tolerance of ±1% and ±2%

over temperature.

u Logic controlled enable

u Active low resets valid for V down to 0V

IN

Each regulator has an associated active-low reset signal

which is asserted when the voltage output declines

below the preset threshold. Once the output recovers,

the reset continues to be asserted (delayed) for a

predetermined time, 50ms for reset A and 150ms for

reset B. In the case of regulator B, the delay time may be

reduced by the addition of an external capacitor.

u Programmable reset

u ꢀull industrial temperature range

Applications

u Cellular telephones

u Palmtop/Laptop computers

u Battery-powered equipment

u Bar code scanners

The SC1452 has a bypass pin to enable the user to

capacitively decouple the bandgap reference for very low

output noise (down to 50µVrms).

u SMPS post regulator/dc to dc modules

u High efficiency linear power supplies

u DSP supplies

The devices utilize CMOS technology to achieve very low

operating currents (typically 130uA with both

outputs supplying 150mA). The dropout voltage is

typically 155mV at 150mA, helping to prolong battery

life. In addition, the devices are guaranteed to provide

400mA of peak current for applications which require

high initial inrush current. They have been designed to

be used with low ESR ceramic capacitors to save cost

and PCB area.

The SC1452 comes in the low profile 10-lead MSOP

package.

Typical Application Circuit

U1

1

10

3.0V OUT

2.5V OUT

3.3V IN

OUTA

OUTB

GND

IN

ENA

2

3

4

5

9

ENABLE OUTPUT A

8

BYP

7

RESET A

RESET B

ENABLE OUTPUT B

RSTA

RSTB

ENB

6

DLYB

SC1452FIMS

COUTA

1uF

COUTB

1uF

CBYP

10nF

CDLYB

10nF

CIN

1uF

Revision 2, March 2001

1

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SC1452

POWER MANAGEMENT

Absolute Maximum Ratings

Parameter

Symbol

Maximum

Units

Input Supply Voltage

V_IN

V_EN

T_A

-5 to +7

-5 to +V_IN

-40 to +85

-40 to +125

-60 to +150

113

V

Enable Input Voltage

Operating Ambient Temperature Range

Operating Junction Temperature Range

Storage Temperature

°C

T_J

°C

T_STG

θ_JA

°C

Thermal Impedance Junction to Ambient

Thermal Impedance Junction to Case

ESD Rating (Human Body Model)

°C/W

kV

42

θ_JC

ESD

2

Electrical Characteristics

Unless specified: T_A= 25°C, V_IN= V_OUT+ 1V, I_OUTA= I_OUTB= 1mA, C_IN= C_OUT= 1.0 µF, V_ENA= V_ENB= V_IN.

Values in bold apply over full operating temperature range.

Parameter

Symbol

Conditions

Min

Typ

Max Units

IN

Input Supply Voltage

Quiescent Current

V_IN

I_Q

2.25

6.5

150

200

250

1.0

V

V_ENA= 0V, V_ENB= V_IN, I_OUTB= 150mA or

V_ENB= 0V, V_ENA= V_IN, I_OUTA= 150mA

110

µA

V

_ENA= V_ENB= V_IN, I_OUTA= I_OUTB= 150mA

130

0.2

µA

V_IN= 6.5V, V_ENA= V_ENB= 0V (OFF)

1.5

OUTA, OUTB

Output Voltage⁽¹⁾

V_OUT

I_OUT= 1mA

-1%

V_OUT

2.5

-5

+1%

+2%

10

V

0mA ≤ I_OUT≤ 150mA, V_OUT+1V ≤V_IN≤ 5.5V

V_OUT+ 1V ≤ V_IN≤ 5.5V, I_OUT= 1mA

-2%

Line Regulation⁽¹⁾

Load Regulation⁽¹⁾

REG_(LINE)

REG_(LOAD)

mV

12

0.1mA ≤ I_OUT≤150mA

-20

-30

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2001 Semtech Corp.

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SC1452

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Electrical Characteristics (Cont.)

Unless specified: T_A= 25°C, V_IN= V_OUT+ 1V, I_OUTA= I_OUTB= 1mA, C_IN= C_OUT= 1.0 µF, V_ENA= V_ENB= V_IN.

Values in bold apply over full operating temperature range.

Parameter

Symbol

Conditions

Min

Typ

1

Max

Units

mV

Dropout Voltage⁽¹⁾⁽²⁾

V_D

I_OUT= 1mA

I_OUT= 50mA

52

70

90

mV

I_OUT= 150mA

155

210

270

mV

Current Limit

I_LIM

PSRR

e_n

400

mA

dB

Ripple Rejection

Output Voltage Noise

f = 120Hz, C_BYP= 10nF

59

27

f = 10Hz to 100kHz, I_OUT= 50mA,

µV_RMS

C

_BYP= 10nF, C_OUT= 2.2µF, 1.8V output

f = 10Hz to 100kHz, I_OUT= 50mA,

_BYP= 10nF, C_OUT= 2.2µF, 3.3V output

55

BYP

Start-up Rise Time

ENA, ENB

t_r

C_BYP= 10nF

1.25

ms

V

Enable Input Threshold

V_IH

V_IL

1.6

0.4

Enable Input Bias Current⁽³⁾

RSTA, RSTB

I_ENA/B

0V ≤ V_ENA/B≤ V_IN

-0.5

+0.5

µA

Reset Threshold

V_TH(RST)

V_OUTfalling

V_OUTrising

88

90

30

90

92

94

%V_OUT

Reset A Delay

Reset B Delay

t_RSTA

t_RSTB

50

70

ms

V_DLYB= 0V

150

4

210

C

_DLYB= 10nF

Reset A, B Output Voltage ⁽⁴⁾

V_OH

V_OL

I_SOURCE= 0.5mA

I_SINK= 1.2mA

90

98

%V_OUT

V

0.02

0.10

3.9

DLYB

Delay Voltage Threshold

Delay Source Current

V_TH(DLYB)

I_DLYB

1.250

3.0

V

V_OUTB< V_TH

2.1

µA

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2001 Semtech Corp.

3

SC1452

POWER MANAGEMENT

Electrical Characteristics (Cont.)

Unless specified: T_A= 25°C, V_IN= V_OUT+ 1V, I_OUTA= I_OUTB= 1mA, C_IN= C_OUT= 1.0 µF, V_ENA= V_ENB= V_IN.

Values in bold apply over full operating temperature range.

Parameter

Symbol

Conditions

Min

Typ

Max

Units

Over Temperature Protection

High Trip Level

Hysteresis

T_HI

150

20

°C

T_HYST

NOTES:

(1) Low duty cycle pulse testing with Kelvin connections required.

(2) Defined as the input to output differential at which the output drops 100mV below the value measured at a

differential of 1V. Not measurable on 1.5V and 1.8V outputs due to minimum V constraints.

IN

(3) Guaranteed by design.

(4) V will be a percentage of V , and V will be a percentage of V .

OUTB

OHA

OUTA

OHB

Timing Diagrams

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4

SC1452

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Pin Configuration

Voltage Options

Replace X in the part number (SC1452XIMS) by the

letter shown below for the corresponding voltage

option:

(Top View)

X

V_OUTA(V)

V_OUTB(V)

A

B

C

D

E

F

1.8

2.5

2.8

3.0

3.3

3.0

3.3

1.8

2.5

2.8

3.0

3.3

2.5

1.8

2.8

2.5

2.8

MSOP-10

Ordering Information

Part Numbers

SC1452XIMSTR ⁽¹⁾⁽²⁾

Notes:

Package

MSOP-10

G

H

J

(1) Where X denotes voltage options - see Voltage

Options table.

(2) Only available in tape and reel packaging. A reel

contains 2500 devices.

K

Pin Descriptions

Pin #

Pin Name

OUTA

Pin Function

1

2

3

4

Regulator A output.

Regulator B output.

Ground pin.

OUTB

GND

RSTA

Power on reset for output A. Active low when OUTA is below the reset threshold. RSTA

goes high 50ms (typical) after OUTA rises above the reset threshold.

5

RSTB

Power on reset for output B. Active low when OUTB is below the reset threshold. RSTB

goes high 150ms (typical - can be adjusted using C_DLYB) after OUTB rises above the reset

threshold.

6

7

DLYB

ENB

BYP

ENA

IN

Programmable delay for RESETB. Delay time can be set by connecting a capacitor, C_DLYB,

between this pin and ground. Ground this pin if using the default delay time.

Active high enable pin for output B. CMOS compatible input. Connect to IN if not being

used.

8

Bypass pin for bandgap reference. Connect a 10nF capacitor, C_BYP, between this pin and

ground for low noise operation.

9

Active high enable pin for output A. CMOS compatible input. Connect to IN if not being

used.

10

Input pin for both regulators.

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SC1452

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Block Diagram

Marking Information

# = Voltage options (Example: 452ꢀ)

yyww = Datecode (Example: 0008)

XXXX = Lot Number (Example: E01102)

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SC1452

POWER MANAGEMENT

Applications Information

Theory Of Operation

initial currents for DSP initialization.

The SC1452 is intended for applications where very low The SC1452 has a fast start-up circuit to speed up the

dropout voltage, low supply current and low output noise initial charging time of the bypass capacitor to enable

are critical. ꢀurthermore, the SC1452, by combining two the output voltage to come up quicker.

ultra low dropout (ULDO) regulators, along with enable

PIN Descriptions

controls and power-on resets (which function is usually The SC1452 includes thermal shutdown circuitry to turn

served by external devices), provides a very space off the device if T exceeds 150°C (typical), with the

J

efficient solution for multiple supply requirements.

device remaining off until T drops by 20°C (typical).

J

Reverse battery protection circuitry ensures that the

The SC1452 contains two ULDOs, both of which are device cannot be damaged if the input supply is

supplied by one input supply, between IN and GND. Each accidentally reversed, limiting the reverse current to less

ULDO has its own active high enable pin (ENA/ENB). than 1.5mA.

Pulling this pin low causes that specific ULDO to enter a

very low power shutdown state.

Adjusting RSTB Delay Time

Each ULDO also has its own power on reset pin (RSTA/ The power on reset delay for regulator B, t , can be

RSTB

RSTB), which asserts low whenever the output voltage is reduced externally by connecting a capacitor to the delay

below the reset threshold for that output. Each reset time set pin DLYB. If DLYB is connected to ground, the

remains asserted low until a specific delay time after the internally controlled delay time of 150ms (typ.) will apply.

output rises back above the reset threshold. ꢀor output

A, this delay time is typically 50ms. Output B has a Referring to the block diagram, as the output of regulator

programmable reset delay. If DLYB is grounded, the B (V ) rises and reaches the reset threshold voltage

OUTB

reset delay will be controlled by an internal timer to (92% V

), two things happen:

OUTB(NOM)

150ms. If a capacitor is connected between DLYB and 1) the internal 150ms timer starts;

GND, a constant current, I , charges this capacitor until 2) the 3µA current source turns on, charging C

(if

DLYB

the delay threshold, V

, is reached, or the internal connected).

TH(DLYB)

timer times out. See Adjusting RSTB Delay Time. One

advantage of on-board resets is that they remain asserted If DLYB is connected to ground, RSTB goes high 150ms

low all the way down to V = 0V, whereas after V crosses the threshold voltage. If a capacitor is

IN

OUTB

external devices may require pull-down resistors.

connected between DLYB and ground, the voltage at

DLYB can be described by the following equation:

A bypass pin (BYP) is provided to decouple the bandgap

reference to reduce output noise (on both outputs) and

also to improve power supply rejection.

−6

•

t

3 10

=

V_DLYB

C_DLYB

The SC1452 contains an internal bandgap reference An internal comparator compares this voltage to a 1.25V

which is fed into the inverting input of two error reference, and triggers the reset high once this voltage

amplifiers, one for each output. The output voltage of is reached. The delay time can be calculated by

each regulator is divided down internally using a resistor rearranging the above equation, solving for t:

divider and compared to the bandgap voltage. The error

C_DLYB• 1.25

3 • 10 ⁻⁶

amplifier drives the gate of a low R

pass device.

P-channel MOSꢀET

DS(ON)

t_RSTB

=

= 416,667 • C_DLYB

Each regulator has its own current limit circuitry to Note that the maximum delay time is 150ms, as RSTB

ensure that the output current will not damage the goes high when either the internal timer or externally set

device during output short, overload or start-up. The timer times out, so if t

is set externally for 200ms,

RSTB

current limit is guaranteed to be greater than 400mA to the reset delay will still be 150ms. Thus for a 150ms

allow fast charging of the output capacitor and high delay, DLYB should be grounded, and for a delay time

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SC1452

POWER MANAGEMENT

Applications Information (Cont.)

less than 150ms, C

can be calculated using the ꢀor all practical purposes, equation (1) can be reduced

DLYB

equation above, or read from the chart below.

to the following expression:

P_{D(MAX )}

=

(

V_{IN(MAX )}− V_{OUTA (MIN )}

)

• I_{OUTA (MAX )}

• I_{OUTB (MAX )}

1000

(2)

t_RSTB= 150ms max.

+

(

V_{IN(MAX )}− V_{OUTB (MIN )}

)

100

10

Looking at a typical application:

V

I

= 4.2V

IN(MAX)

= 3V - 2% (worst case) = 2.94V

OUTA

OUTB

1

= 3.3V - 2% (worst case) = 3.234V

= I

= 150mA

OUTB

OUTA

T = 85°C

0.1

0.01

A

Inserting these values into equation (2) above gives us:

P_{D(MAX )}

=

(

4.2 − 2.94

)

• 0.15 +

(

4.2 − 3.234

• 0.15

)

0.1

1

10

100

1000

C

_DLYB(nF)

= 0.189 + 0.145

= 0.334W

Component Selection

Using this figure, we can calculate the maximum thermal

Output capacitor - Semtech recommends a minimum

capacitance of 1µꢀ at the output with an equivalent

series resistance (ESR) of < 1Ω over temperature. The

SC1452 has been designed to be used with ceramic

capacitors, but does not have to be used with ceramic

capacitors, allowing the designer a choice. Increasing the

bulk capacitance will further reduce output noise and

improve the overall transient response.

impedance allowable to maintain T ≤ 125°C:

J

(

T_J(MAX)− T_{A(MAX )}

)

θ_{JA(MAX )}

=

P_D(MAX)

125 − 85

0.334

(

)

=

= 120°C/ W

With the standard MSOP-10 Land Pattern shown at the

end of this datasheet, and minimum trace widths, the

thermal impedance junction to ambient for SC1452 is

113°C/W. Thus no additional heatsinking is required for

the above conditions. The junction temperature can be

further reduced by using larger trace widths and

connecting pcb copper area to the GND pin (pin 3), which

connects directly to the device substrate. Lower junction

temperatures improve overall output voltage accuracy.

Input capacitor - Semtech recommends the use of a 1µꢀ

ceramic capacitor at the input. This allows for the device

being some distance from any bulk capacitance on the

rail. Additionally, input droop due to load transients is

reduced, improving overall load transient response.

Bypass capacitor - Semtech recommends the use of a

10nꢀ ceramic capacitor to bypass the bandgap

reference. Increasing this capacitor to 100nꢀ will

further improve power supply rejection. C_BYPmay be

omitted if low noise operation is not required.

Layout Considerations

While layout for linear devices is generally not as critical

as for a switching application, careful attention to detail

will ensure reliable operation.

Thermal Considerations

The worst-case power dissipation for this part is given

by:

1) Attaching the part to a larger copper footprint will

enable better heat transfer from the device, especially

on PCBs where there are internal ground and power

planes.

=

(

− •

)

P_{D(MAX )}

V_{IN(MAX )}V_{OUTA (MIN)}I_{OUTA (MAX )}

(1)

+

(

−

)

•

V_{IN(MAX )}V_{OUTB (MIN)}I_{OUTB (MAX )}

2) Place the input, output and bypass capacitors close

to the device for optimal transient response and device

behaviour.

+

•

V_{IN(MAX )}I_{Q(MAX )}

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8

SC1452

POWER MANAGEMENT

Applications Information (Cont.)

3) Connect all ground connections directly to the ground

plane. If there is no ground plane, connect to a common

local ground point before connecting to board ground.

Enable Input Voltage vs. Junction Temperature

vs. Input Voltage

1.6

1.4

1.2

1.0

0.8

0.6

0.4

V_IH@ V_IN= 6.5V

V_IH@ V_IN= 4V

V_IL@ V_IN= 6.5V

V

_IL@ V_IN= 4V

-50

-25

0

25

50

75

100

125

Typical Characteristics

T

_J(°C)

Output Voltage vs. Output Current

Output Voltage vs. Junction Temperature

vs. Output Current

vs. Junction Temperature

0

-2

T_J= 25°C

-2

-4

Top to bottom:

I_OUT= 1mA

I_OUT= 50mA

I_OUT= 100mA

-6

T_J= -40°C

-8

I

_OUT= 150mA

-10

-12

-10

T_J= 125°C

V_IN= V_OUT+ 1V

-50 -25

V_IN= V_OUT+ 1V

-12

0

25

50

75

100

125

150

0

25

50

75

100

T_J(°C)

I_OUT(mA)

Dropout Voltage vs. Output Current

vs. Junction Temperature

Dropout Voltage vs. Junction Temperature

vs. Output Current

200

175

150

125

100

75

200

175

150

125

100

75

I_OUT= 150mA

Top to bottom:

50

T_J= 125°C

T_J= 25°C

T_J= -40°C

I_OUT= 50mA

25

0

25

50

75

100

125

150

-50

-25

0

25

50

75

100

I_OUT(mA)

T_J(°C)

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SC1452

POWER MANAGEMENT

Typical Characteristics (Cont.)

Line Regulation vs.

Load Regulation vs.

Junction Temperature

10

9

8

7

6

5

4

3

2

1

0

I_OUT= 1mA

9

V_IN= V_OUT+ 1V

_OUT= 0.1mA to 150mA

I

8

V

_IN= V_OUT+ 1V to 6.5V

7

6

5

4

3

2

1

0

V_IN= V_OUT+ 1V to 5.5V

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

T_J(°C)

Current Limit vs. Junction Temperature

vs. Input Voltage

Off-State Quiescent Current

vs. Junction Temperature

0.80

0.75

0.70

0.65

0.60

0.55

0.50

0.45

0.40

400

350

300

250

200

150

100

50

V_IN= 6.5V

V_ENA= V_ENB= 0V

V_IN= 6.5V

V_IN= 4V

0

-50

-25

0

25

50

75

100

-50

-25

0

25

50

75

100

T_J(°C)

Quiescent Current vs. Junction Temperature

vs. Output Current

Quiescent Current vs. Junction Temperature

vs. Input Voltage

200

175

150

125

100

75

200

V_IN= 6.5V

I_OUTA= I_OUTB= 150mA

175

150

125

100

75

Top to bottom:

V_IN= 6.5V

V_IN= 5V

I

_OUTAor I_OUTB= 150mA

V_IN= 4V

50

25

0

-50

-25

0

25

50

75

100

-50

-25

0

25

50

75

100

T_J(°C)

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SC1452

POWER MANAGEMENT

Typical Characteristics (Cont.)

Bypass Start-up Rise Time vs. Junction Temperature

vs. Input Voltage

Reset Threshold Voltage

vs. Junction Temperature

2.00

94

93

92

91

90

89

88

C_BYP= 10nF

V

_OUTrising

1.75

1.50

V_IN= 4V

1.25

1.00

V_IN= 6.5V

0.75

0.50

0.25

0.00

V_OUTfalling

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

T_J(°C)

Reset Delay Times

vs. Junction Temperature

Delay Source Current and Voltage Threshold

vs. Junction Temperature

200

175

150

125

100

75

4.0

1.275

V

_OUT+ 1V ≤ V_IN≤ 6.5V

V_OUT+ 1V ≤ V_IN≤ 6.5V

3.8

3.6

3.4

3.2

3.0

2.8

2.6

2.4

2.2

2.0

1.270

1.265

1.260

1.255

1.250

1.245

1.240

1.235

1.230

1.225

t_RSTB, DLYB = 0V

I_DLYB

V_TH(DLYB)

t_RSTA

50

25

t

_RSTB, C_DLYB= 10nF

0

-50

-25

0

25

50

75

100

125

-50

-25

0

25

50

75

100

125

T_J(°C)

Output Spectral Noise Density vs.

)requency vs. Output Voltage

Output Spectral Noise Density vs. )requency

vs. Output Capacitance

10

Top to bottom:

V_OUT= 3.3V

V_OUT= 3.0V

V

_OUT= 2.8V

1

V_OUT= 2.5V

V_OUT= 1.8V

1

0.1

V_OUT= 3V

V_IN= V_OUT+ 1V

I_OUT= 50mA

V

_IN= 4V

Left to right:

C_OUT= 44µF

C_OUT= 22µF

C_OUT= 10µF

I_OUT= 50mA

C_BYP= 10nF

C_IN= 1µF

C

_IN= 1µF

0.01

C_BYP= 10nF

C_OUT= 2.2µF

T_J= 25°C

C

_OUT= 2.2µF

T_J= 25°C

0.01

0.001

0.01

0.1

1

10

100

1000

0.01

0.1

1

10

100

1000

f (kHz)

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SC1452

POWER MANAGEMENT

Typical Characteristics (Cont.)

Output Spectral Noise Density vs. )requency

vs. Bypass Capacitance

Output Spectral Noise Density vs. )requency

vs. Output Current

10

V_OUT= 1.8V

V_IN= 2.8V

Top to bottom:

_OUT= 150mA

I

I_OUT= 100mA

I_OUT= 50mA

1

C

_IN= 1µF

I

_OUT= 1mA

C_OUT= 2.2µF

T_J= 25°C

1

0.1

V_OUT= 1.8V

V_IN= 2.8V

C_BYP= 100pF

C_BYP= 1nF

C_BYP= 10nF

C

_IN= 1µF

0.01

C_BYP= 10nF

C_OUT= 2.2µF

T_J= 25°C

C

_BYP= 100nF

C_BYP= 1µF

0.01

0.001

0.01

0.1

1

10

100

1000

0.01

0.1

1

10

100

1000

f (kHz)

PSRR vs. )requency vs. Output Voltage

(C = 10n)ꢀ

(C = 100n)ꢀ

BYP

75

70

65

60

55

50

45

40

35

30

25

75

70

65

60

55

50

45

40

35

30

25

Top to bottom:

V_OUT= 1.8V

V_OUT= 2.5V

Top to bottom:

V_OUT= 1.8V

V_OUT= 2.8V

V_OUT= 2.5V

V_IN= V_OUT+ 1V

_IN= C_OUT= 1µF

C_BYP= 100nF

I_OUT= 1mA

T_J= 25°C

V_OUT= 3.0V

V_OUT= 3.3V

V_IN= V_OUT+ 1V

C_IN= C_OUT= 1µF

V_OUT= 2.8V

V_OUT= 3.0V

C

C_BYP= 10nF

V_OUT= 3.3V

I_OUT= 1mA

T_J= 25°C

0.01

0.1

1

10

100

1000

0.01

0.1

1

10

100

1000

f (kHz)

www.semtech.com

2001 Semtech Corp.

12

SC1452

POWER MANAGEMENT

Evaluation Board Schematic

J1

J2

ENA

ENB

JP1

JP2

J3

RIPPLE

J4

1

2

3

1

2

3

A

RIPPLE B

J5

VIN

1

2

3

4

5

1

2

3

4

5

OUTA ENABLE

OUTB ENABLE

U1

J6

1

2

3

4

5

10

9

OUTA

OUTB

GND

IN

ENA

OUTA

J7

8

R1

10k

BYP

OUTB

J8

7

RSTA

RSTB

ENB

6

R2 10k

DLYB

RSTA

J9

SC1452xIMS

JP3

R3

Open

R4

Open

C1

220uF

+

C2

2.2uF

C3

2.2uF

C4

1uF

C5

10nF

C6

10nF

1

2

RSTB

IQ MON

JP4

JP5

150mA

Short

150mA

Short

1

2

3

1

2

3

R5

(1)

R6

(1)

OUTA LOAD

OUTB LOAD

J10

OUTB LOAD DRV

U2

NOTE:

(1) See table below for resistor values

8

7

6

5

1

D

S

2

JP6

S

3

EN

S

4

1

2

3

Output Voltage

R

(Ohms) (1W)

G

1.8

2.5

2.8

3.0

3.3

12

16

18

20

22

OFF

Si4410

OUTB LOAD

J11

OUTA LOAD DRV

J12

GND

J13

GND

J14

GND

J15

GND

J16

GND

J17

GND

J18

GND

U3

8

7

6

5

1

D

S

2

JP7

S

3

EN

S

4

1

2

3

G

OFF

Si4410

OUTA LOAD

Evaluation Board Gerber Plots

Top Copper

Bottom Copper

www.semtech.com

2001 Semtech Corp.

13

SC1452

POWER MANAGEMENT

Evaluation Board Gerber Plots (Cont.)

Top Silk Screen

Evaluation Board Bill of Materials

Quantity

Reference

C1

Part/Description

220µF, 10V

2.2µF ceramic

1µF ceramic

10nF ceramic

Test pin

Vendor

Various

Murata

Various

Notes

1

2

1

2

3

2

7

6

1

2

1

2

C2, C3

C4

GRM42-6X7R225K16

GRM42-6X7R105K25

C5, C6

J1, J2

White

J3, J4

BNC socket

Test pin

V_OUTripple monitor

Red

J5 - J7

J8, J9

Test pin

Yellow

J10, J11

J12 - J18

JP1, JP2, JP4 - JP7

JP3

Test pin

Orange

Black

Test pin

Header, 3 pin

Header, 2 pin

10kΩ, 1/10W

Not placed

See schematic

SC1452xIMS

Si4410

R1, R2

R3, R4

R5, R6

U1

Various

Semtech

Vishay

1W

U2, U3

www.semtech.com

2001 Semtech Corp.

14

SC1452

POWER MANAGEMENT

Outline Drawing - MSOP-10

Land Pattern - MSOP-10

Contact Information

Semtech Corporation

Power Management Products Division

652 Mitchell Rd., Newbury Park, CA 91320

Phone: (805)498-2111 ꢀAX (805)498-3804

www.semtech.com

2001 Semtech Corp.

15


型号：	SC1452EIMSTR
厂家：	SEMTECH CORPORATION
描述：	Fixed Positive LDO Regulator, 2 Output, 3.3V1, 3.3V2, CMOS, PDSO10, MO-187BA, MSOP-10 光电二极管输出元件调节器
文件：	总15页 (文件大小：281K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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