SC1452EIMSTRT [SEMTECH]

Fixed Positive LDO Regulator, 2 Output, 3.3V1, 3.3V2, CMOS, PDSO10, ROHS-COMPLIANT, MO-187BA, MSOP-10;


型号：	SC1452EIMSTRT
厂家：	SEMTECH CORPORATION
描述：	Fixed Positive LDO Regulator, 2 Output, 3.3V1, 3.3V2, CMOS, PDSO10, ROHS-COMPLIANT, MO-187BA, MSOP-10 稳压器
文件：	总7页 (文件大小：119K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DUAL 150mA LDO REGULATOR WITH

PROGRAMMABLE RESET

SC1452

PRELIMINARY - August 7, 2000

TEL:805-498-2111 FAX:805-498-3804 WEB:http://www.semtech.com

DESCRIPTION

FEATURES

•= ^{Up to 150mA per regulator output}

The SC1452 is a state of the art device intended to

provide maximum performance and flexibility in battery

operated systems. It has been designed specifically to

fully support a single Li-Ion battery and its external

charger voltages.

•= Low quiescent current

•= Low dropout voltage

•= Wide selection of output voltages

•= Stable operation with ceramic caps

•= Tight load and line regulation

•= Current and thermal limiting

•= Reverse input polarity protection

•= <1uA off-mode current

The SC1452 contains two independently enabled, ultra

low dropout voltage regulators (ULDOs). It operates

from an input voltage range of 2.5V to 6.5V, and a wide

variety of output voltage options are available which are

designed to provide an initial tolerance of ±1% and

±2% over temperature.

•= Logic controlled electronic enable

•= Programmable reset

•= Full industrial temperature range

Each regulator has an associated active-low reset sig-

nal which is asserted when the voltage output declines

below the preset threshold. Once the output recovers,

the reset continues to be asserted (delayed) for a

predetermined time, 50ms for reset A and 150ms for

reset B. In the case of regulator B, the delay time may

be reduced by the addition of an external capacitor.

APPLICATIONS

•= Cellular telephones

•= Palmtop/Laptop computers

•= Battery-powered equipment

•= Bar code scanners

•= SMPS post regulator/dc to dc modules

•= High efficiency linear power supplies

The SC1452 has a bypass pin to enable the user to

capacitively decouple the bandgap reference for very

low output noise (down to 50µVrms).

ORDERING INFORMATION

Part Numbers

SC1452XIMSTR⁽¹⁾⁽²⁾

Notes:

(1) Where X denotes voltage options - see table on

page 5.

Package

MSOP-10

The devices utilize CMOS technology to achieve very

low operating currents (typically 150µA with both out-

puts supplying 150mA). The dropout voltage is typically

165mV at 150mA, helping to prolong battery life. In

addition, the devices are guaranteed to provide 400mA

of peak current for applications which require high initial

inrush current. They have been designed to be used

with low ESR ceramic capacitors to save cost and PCB

area.

(2) Only available in tape and reel packaging. A reel

contains 2500 devices.

The SC1452 comes in the low profile 10-lead MSOP

package.

TYPICAL APPLICATION

3.3V OUT

2.5V OUT

3.3V IN

OUTA

OUTB

GND

ENA

ENABLE OUTPUT A

BYP

RESET A

RESET B

ENABLE OUTPUT B

RSTA

RSTB

ENB

DLYB

SC1452JIMS

COUTA

1uF

COUTB

1uF

CBYP

10nF

CDLYB

10nF

CIN

1uF

652 MITCHELL ROAD NEWBURY PARK CA 91320

DUAL 150mA LDO REGULATOR WITH

PROGRAMMABLE RESET

SC1452

PRELIMINARY - August 7, 2000

ABSOLUTE MAXIMUM RATINGS

Parameter

Symbol

V_IN

Maximum

-5 to +7

Units

Input Supply Voltage

Enable Input Voltage

V_EN

T_A

-5 to +V_IN

-40 to +85

-40 to +125

-60 to +150

113

Operating Ambient Temperature Range

Operating Junction Temperature Range

Storage Temperature

°C

T_J

°C

T_STG

θ_JA

°C

Thermal Resistance Junction to Ambient

°C/W

Thermal Resistance Junction to Case

ESD Rating (Human Body Model)

°C/W

θ_JC

ESD

ELECTRICAL CHARACTERISTICS

Unless specified: T_A= 25°C, V_IN= V_OUT+ 1V, I_OUTA= I_OUTB= 1mA, C_OUT= 1.0 µF, V_ENA= V_ENB= V_IN. Values in bold apply over full operating

temperature range.

Parameter

Symbol

Condition

Min Typ Max Units

Input Supply Voltage

Quiescent Current

V_IN

I_Q

2.5

6.5

150

200

240

300

V_ENA= 0V, V_ENB= V_IN, I_OUTB= 150mA or

V_ENB= 0V, V_ENA= V_IN, I_OUTA= 150mA

150

0.5

µA

V_ENA= V_ENB= V_IN, I_OUTA= I_OUTB= 150mA

µA

V_ENA= V_ENB= 0V (OFF)

OUTA, OUTB

Output Voltage

V_OUT

REG_(LINE)

REG_(LOAD)

V_D

I_OUT= 1mA

-1% V_OUT+1%

-2%

+2%

0mA ≤ I_OUT=≤ 150mA, V_OUT+1V ≤=V_IN≤=5.5V

V_OUT+ 1V ≤ V_IN≤ 5.5V, I_OUT= 1mA

Line Regulation

Load Regulation

Dropout Voltage

-15

-30

-5

0.1mA ≤=I_OUT≤=150mA

I_OUT= 1mA

1.1

I_OUT= 50mA

120

250

300

I_OUT=150mA

165

Current Limit

I_LIM

400

652 MITCHELL ROAD NEWBURY PARK CA 91320

DUAL 150mA LDO REGULATOR WITH

PROGRAMMABLE RESET

SC1452

PRELIMINARY - August 7, 2000

ELECTRICAL CHARACTERISTICS (Cont.)

Unless specified: T_A= 25°C, V_IN= V_OUT+ 1V, I_OUTA= I_OUTB= 1mA, C_OUT= 1.0 µF, V_ENA= V_ENB= V_IN. Values in bold apply over full operating

temperature range.

Parameter

Symbol

Condition

Min Typ Max Units

OUTA, OUTB (Cont.)

Ripple Rejection

PSRR

e_n

f = 120Hz, C_BYP= 10nF

Output Voltage Noise

f = 10Hz to 99kHz, I_OUT= 50mA,

C_BYP= 10nF, C_OUT= 2.2µF

µV_RMS

BYP

Start-up Rise Time

ENABLE (ENA, ENB)

Enable Input Threshold

t_r

C_BYP= 10nF

1.5

V_IH

V_IL

I_EN

1.6

0.4

0.2

Enable Input Current

RSTA, RSTB

µA

Reset Threshold

V_TH

V_OUTfalling

V_OUTrising

%V_OUT

Reset A Delay

t_RSTA

t_RSTB

V_OH

V_OL

Reset B Delay

Reset A, B Output Voltage⁽¹⁾

V_DLYB= 0V

I_SOURCE= 0.5mA

I_SINK= 1.2mA

150

210

%V_OUT

0.3

DLYB

Delay Voltage Threshold

Delay Source Current

V_DLYB

I_DLYB

1.250

3.0

1.225

2.1

1.275

3.9

V_OUTB< V_TH

µA

OVER TEMPERATURE PROTECTION

High Trip Level

Hysteresis

T_HI

150

°C

T_HYST

NOTE:

(1) V_OHAwill be a percentage of V_OUTA, and V_OHBwill be a percentage of V_OUTB

652 MITCHELL ROAD NEWBURY PARK CA 91320

DUAL 150mA LDO REGULATOR WITH

PROGRAMMABLE RESET

SC1452

PRELIMINARY - August 7, 2000

BLOCK DIAGRAM

652 MITCHELL ROAD NEWBURY PARK CA 91320

DUAL 150mA LDO REGULATOR WITH

PROGRAMMABLE RESET

SC1452

PRELIMINARY - August 7, 2000

PIN CONFIGURATION

VOLTAGE OPTIONS

Replace X in the part number (SC1452XIMS) by the letter shown

below for the corresponding voltage option:

(Top View)

V_OUTA(V)

1.8

V_OUTB(V)

1.8

2.5

2.8

3.0

3.3

3.0

2.5

MSOP-10

3.0

1.8

3.0

2.8

3.3

2.5

3.3

2.8

MARKING INFORMATION

# = Voltage options (Example: 452F)

yyww = Datecode (Example: 0008)

XXXX = Lot Number (Example: E01102)

PIN DESCRIPTIONS

Pin # Pin Name

Pin Function

OUTA

OUTB

GND

Regulator A output.

Regulator B output.

Ground pin.

RSTA

RSTB

DLYB

Power on reset for regulator A. Active low when OUTA is below the reset threshold.

Power on reset for regulator B. Active low when OUTB is below the reset threshold.

Programmable delay for RESETB. Delay time can be set by connecting a capacitor, C_DLYB, be-

tween this pin and ground. Ground this pin if using the default delay time.

ENB

BYP

Active high enable pin for output B. CMOS compatible input. Connect to IN if not being used.

Bypass pin for bandgap reference. Connect a 10nF capacitor, C_BYP, between this pin and

ground for low noise operation.

ENA

Active high enable pin for output A. CMOS compatible input. Connect to IN if not being used.

Input pin for both regulators.

652 MITCHELL ROAD NEWBURY PARK CA 91320

DUAL 150mA LDO REGULATOR WITH

PROGRAMMABLE RESET

SC1452

PRELIMINARY - August 7, 2000

APPLICATIONS INFORMATION

Adjusting RSTB Delay Time

voltage is reached. The delay time can be calculated by

rearranging the above equation, solving for t:

C_DLYB• 1.25

3 • 10 ⁻⁶

t_RSTB

= 416,667 • C_DLYB

RSTB, the power on reset for regulator B, can be

reduced externally by connecting a capacitor to the

delay time set pin DLYB. If DLYB is connected to

ground, the internally controlled delay time of 150ms

(typ.) will apply.

Note that the maximum delay time is 150ms, as RSTB

goes high when either the internal timer or externally

set timer times out, so if t_RSTBis set externally for

200ms, the reset delay will still be 150ms. Thus for a

150ms delay, DLYB should be grounded, and for a

delay time less than 150ms, C_DLYBcan be calculated

using the equation above, or read from the chart below.

Referring to the block diagram, as the output of regula-

tor B (V_OUTB) rises and reaches the reset threshold

voltage (92% V_OUTB(NOM)), two things happen:

1) the internal 150ms timer starts;

2) the 3µA current source turns on, charging C_DLYB(if

connected).

1000

t_RSTB= 150ms max.

100

If DLYB is connected to ground, RSTB goes high

150ms after V_OUTBcrosses the threshold voltage. If a

capacitor is connected between DLYB and ground, the

voltage at DLYB can be described by the following

equation:

3 • 10⁻⁶• t

0.1

0.01

V_DLYB

C_DLYB

0.1

100

1000

An internal comparator compares this voltage to a

1.25V reference, and triggers the reset high once this

_DLYB(nF)

652 MITCHELL ROAD NEWBURY PARK CA 91320

DUAL 150mA LDO REGULATOR WITH

PROGRAMMABLE RESET

SC1452

PRELIMINARY - August 7, 2000

DEVICE OUTLINE - MSOP-10

LAND PATTERN - MSOP- 10 - DRAWING PENDING

ECN 00-1247

652 MITCHELL ROAD NEWBURY PARK CA 91320

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