LV5256GP [SANYO]
Bi-CMOS LSI Operating Mode Switching Type Step-Up/Down Converter; BI -CMOS LSI工作模式切换型升压/下变频器
| 型号： | LV5256GP |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Bi-CMOS LSI Operating Mode Switching Type Step-Up/Down Converter |
| 文件： | 总9页 (文件大小：143K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA1277
Bi-CMOS LSI
Operating Mode Switching Type
LV5256GP
Step-Up/Down Converter
Overview
The LV5256GP is an operating mode switching type step-up/step-down converter that can switch the operating mode by
using the external signal.
Functions
• Built-in Pch gate drive power supply
• Output short-circuit detection by monitoring the input side of the error amplifier
• OCP timer function
• Software start function
• Support for tracking function
• Built-in thermal protection circuit
• Built-in UVLO
• ON/OFF function: Off-time input current smaller than 1µA
• Oscillation frequency : 300kHz to 1.5MHz Oscillation frequency can be set by an external resistor
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
Maximum input voltage
V
V
V
I
max
12
3.6
16
IN
max
V
DD
max
Maximum output voltage
Maximum output current
Allowable input pin voltage
V
O
max
Between OUT and SW
650
mA
V
O
V
max
RT, FB, IN, OCP, SS, ONOFF, TRAC_IN,
DU_SEL, OPC_SEL pins
V
DD
CONT
Allowable power dissipation
Operating temperature
Storage temperature
Pd max
Topr
Mounted on a specified board *
0.8
-20 to +85
-40 to +125
W
°C
°C
Tstg
* Specified board : 50mm × 40mm × 0.8mm, glass epoxy 4-layer circuit board (2S2P).
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
's products or
equipment.
82708 MS PC 20080722-S00003 No.A1277-1/9
LV5256GP
Recommended Operating Conditions at Ta = 25°C
Parameter
Input voltage range
Symbol
Conditions
Ratings
Unit
V
V
V
4.5 to 10
2.9 to 3.1
IN
V
DD
Output voltage range
Output current
Step-down V1
V2
When in normal operation mode
When in tracking operation mode
When in normal operation mode
When in tracking operation mode
1.0 to V
IN
V
0 to V
IN
V
Step-up
V
V
1
2
5.3 to 14
V
OUT
V
to
V
OUT
IN
600
IO
mA
Electrical Characteristics at Ta = 25°C, V
DD
= 3.0V, V = 6.0V
IN
Ratings
typ
Parameter
Symbol
Conditions
Unit
V
min
max
Reference voltage
Reference voltage for comparison
Error amplifier
Vref
-1%
1.0
-1%
Input voltage range
Vrange
Av
0
60
2
1.5
V
dB
MHz
mA
µA
nA
V
Open loop voltage gain
Unity-gain bandwidth
110
8
Ft
Output source current
Output sink current
IfboL
IfboH
IiniL
IN = 2.0V, FB = 1.0V
IN = 0V, FB = 0V
IN = 0V
2
100
IN pin source current
100
100
300
FB pin output range
R_fb
ItracL
R_trac
0.1
0.1
2.8
TRAC_IN pin source current
TRAC_IN pin input operation range
Logic input pin block 1 (ONOFF)
Input voltage H level
IN = 0 to Vref
300
nA
V
Vref-0.1
VoniH
VoniL
IoniH
IoniL
V
V
Input voltage L level
0.5
0.5
Input current H level
ONOFF = 3.3V
ONOFF = 0V
0
0
µA
µA
Input current L level
Logic input pin block 2 (DU_SEL)
Input voltage H level
VduiH
VduiL
Rdu
2.8
2.8
7
V
V
Input voltage L level
Input pull-down resistance
Logic input pin block 3 (OCP_SEL)
Input voltage H level
200
100
kΩ
VocpiH
VocpiL
Rocp
V
V
Input voltage L level
0.5
13
Input pull-down resistance
Soft start
kΩ
Soft start source current
Soft start sink current
IssH
IssL
SS = 0V
10
1
µA
When reset, SS = 1.0V
mA
Short-circuit protection, SCP
Short-circuit protection detection
voltage 1
Vsc1
Vsc2
OCP_SEL=GND/OPEN *1
OCP_SEL=REG_0 *1
× 0.8
× 0.4
V
V
Short-circuit protection detection
voltage 2
SCP comparator offset voltage
SCPosf
IocpH
IocpL
Vocp
TRAC_IN = 0.7V, operation starts from 0.9V.
When in short-circuit protection detection mode
When in normal operation mode, OCP = 1.0V
-40
40
mV
µA
mA
V
OCP pin source current
OCP pin sink current
OCP timer latch voltage
10
1
0.3
1.1
3
1.2
1.3
Continued on next page.
No.A1277-2/9
LV5256GP
Continued from preceding page.
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
Therml protection, UVLO
Thermal protection operating
temperature
Tot
Design guarantee value *2
175
°C
Thermal protection hysteresis
Dot
Design guarantee value *2
REG_O monitored
20
2.8
2.5
3.8
3.5
°C
V
UVLO lock release voltage 1
UVLO lock voltage 1
UVLO lock release voltage 2
UVLO lock voltage 2
Oscillator
VuvloH
VuvloL
VuvloH2
VuvloL2
REG_O monitored
V
V
V
pin voltage
pin voltage
V
IN
V
IN
Oscillation frequency
Oscillation frequency range
F
RT = 100kΩ
0.8
1
1.2
1.5
MHz
MHz
V
R_F
VtriL
0.3
Triangular wave lower-side
threshold value
RT = 100kΩ
RT = 100kΩ
0.5
1.0
Triangular wave upper-side
threshold value
VtriH
Ivin1
V
Power supply pin block
Current drain
V
pin, when converter is in 1MHz operation
2
4
mA
IN
mode.
Ivin2
V
pin, when in ONOFF stop mode.
1.0
1.0
µA
µA
IN
Ivdd1
V
pin, when in ONOFF stop mode.
DD
Vout-5V Regulator
Output voltage
Voutm5
Ivoutm5
Vout-5V regulator, VOUT = 10.0V
Vout-5V regulator
VOUT-4.5
3.0
VOUT-5 VOUT-5.5
20
V
Drooping current
mA
Internal 3.3V Regulator
Output voltage
Vreg_o
Ireg_o
Ireg_o = 2.0mA
3.3
10
3.6
V
Drooping current
Vreg_o = 2V, V = 5V
IN
mA
Output characteristics
Main switch on resistance (Pch)
Main switch on resistance (Nch)
RonH
RonL
Tdead
V
V
= 5V
= 5V
0.7
0.7
25
Ω
Ω
IN
IN
Through current prevention dead
time
ns
Maximum on-duty (step-down)
DMAX1
DMAX2
RT = 100kΩ
RT = 100kΩ
100
85
%
%
Maximum on-duty (step-up)
Converter characteristics
Efficiency
Step-down η1
V
V
V
V
V
V
= 5.0V, V = 4.6V, I = 200mA
93
93
%
%
%
%
IN
IN
IN
IN
IN
IN
O
Step-up
η2
= 5.0V, VOUT1 = 6.6V, I = 200mA
O
Line regulation
Load regulation
Step-down ∆V1/V
IN
= 4.5 to 8.6V, V1 = 4.6V, I = 200mA
O
0
0
0
0
Step-up
∆VOUT1/V
IN
= 4.5 to 5.5V, VOUT1 = 6.6V, I = 200mA
O
Step-down ∆V1/I
= 8.4V, V1 = 4.6V, I = 0 to 200mA
O
O
Step-up
∆VOUT1/I
= 5.0, VOUT1 = 6.6V, I = 200mA
O
O
*1 IN pin voltage is the detection point. The lowest voltage among Vref, TRAC_IN, and SS is used.
*2 Design guarantee value, and no measurement is performed.
No.A1277-3/9
LV5256GP
Package Dimensions
unit : mm (typ)
3368
Pd max -- Ta
1.0
0.8
0.6
0.4
0.2
Mounted on a specified board : 50×40×0.8mm3
Glass epoxy 4-layer circuit board (2S2P)
TOP VIEW
3.0
SIDE VIEW
BOTTOM VIEW
(0.125)
(C0.17)
20
0.32
2
1
0.25
0.5
(0.5)
SIDE VIEW
0
–
20
0
20
40
60
80
100
Ambient temperature, Ta – °C
SANYO : VCT20(3.0X3.0)
Pin Assignment
15
14
13
12
11
IN 16
OCP_SEL 17
RT 18
10 VOUT-5
9
8
7
6
VOUT
SW
LV5256GP
Top view
V
19
PGND
NC
DD
LGND 20
1
2
3
4
5
No.A1277-4/9
LV5256GP
Block Diagrams and Sample Application Circuit 1 (Step-down)
100kΩ at 1MHz
0.1µF
REG_O
RT
VIN=4.5 to 10V
VIN
disable
VREG
1µF
BIAS
VREF
UVLO
OSC
3.3V
2.8V/2.5V
uvlo
VOUT
TSD
ot
disable
1.0V
0.5V
disable
Vref1R2
(1.2V%
LDO with OPC
0.022µF
Vref
VOUT-5
(1.0V 1ꢀ%
FB
IN
V1 (Normal operation%
=1.0V to VIN
V2 (Tracking operaton%
=0V to VIN
ot
uvlo
tout
Vout-5
V1
or
V2
L/S
Vout-5
+
+
+
pwm Control
Logic
22µH
SW
4.7µF
+
VREG
+
du_sel
disable
SBD
PGND
LGND
0.01µF at 1.25ms
OCP
R
tout
S Q
uvlo
DU_SEL
GND/
OPEN
L/S
du_sel
V
=2.9 to 3.1V
V
+
DD
DD
vdd
0.1µF
VrefR2
×0.8
×0.4
+
+
+
disable
disable
uvlo
OPC_SEL
+
Vref1R2
Vref
GND/OPEN: ×0.8
REG_O: ×0.4
TRAC_IN
SS
0.033µF at 3.3ms
pin heap 17 pin
ONOFF
Sample Application Circuit 2 (Step-up)
100kΩ at 1MHz
RT
0.1µF
REG_O
UVLO
VIN=4.5~10V
VIN
disable
1µF
BIAS
VREF
VREG
3.3V
OSC
2.8V/2.5V
uvlo
VOUT
TSD
ot
disable
1.0V
0.5V
disable
Vref1R2
(1.2V%
VOUT1 (Normal operation%
=5.3V to 14V
LDO with OPC
Vref
VOUT2 (Tracking operaton%
=VIN or more
(1.0V 1ꢀ%
FB
IN
ot
uvlo
tout
Vout-5
VOUT-5
4.7µF
VOUT1
or
VOUT2
L/S
Vout-5
+
+
+
pwm Control
Logic
10µH
+
SW
VREG
+
du_sel
disable
0.01µF at 1.25ms
OCP
R
PGND
tout
S Q
uvlo
LGND
DU_SEL
REG_O
L/S
du_sel
V
=2.9~3.1V
V
+
DD
DD
vdd
0.1µF
VrefR2
×0.8
×0.4
+
+
+
disable
disable
uvlo
OPC_SEL
+
Vref1R2
Vref
GND/OPEN: ×0.8
REG_O: ×0.4
TRAC_IN
SS
0.033µF at 3.3ms
pin heap 17 pin
ONOFF
No.A1277-5/9
LV5256GP
Pin Functions
Pin No.
Pin Name
Description
Equivalent Circuit
1
2
6
3
NC
No connection. Must be kept open.
ONOFF
ON/OFF signal input pin.
V
DD
Threshold level is TTL level.
Maximum withstand voltage is V
DD.
3
4
5
VIN
Power supply pin of the IC. Apply the input voltage.
DU_SLE
Step-up/down switching pin. The IC goes in step-up mode
by connecting this pin to REG_O pin, and in step-down
mode by connecting this pin to GND or leaving this pin
open. An internal pull-down resistor (200kΩ) is provided
between DU_SEL and GND pins.
V
DD
5
200kΩ
7
8
PGND
SW
Power ground pin. The source of the output transistor
(Nch-MOSFET) is connected.
Switching element. A 0.7Ω (typ) Nch switch is inserted
between this pin and PGND, and a 0.7Ω (typ) Pch switch is
connected between this pin and VOUT. In step-down
mode, insert an inductor between the switching node and
power supply output, and in step-up mode insert an
inductor between this pin and power supply input.
VOUT
8
9
VOUT
VOUT-5
OCP
Source potential of the internal Pch-MOSFET. In
step-down mode, apply the input voltage. In step-up mode,
apply the power supply voltage.
10
11
Internal Pch-MOSFET gate suplly voltage generation pin.
Used to generate a voltage with a level equal to VOUT pin
voltage-5V by the internal LDO with OCP.
Overcurrent detection timer setup pin. Connect a capacitor
between this pin and ground to define the time interval
between the beginning of the overcurrent state and the IC
latches off. The capacitor is charged by the 10µA internal
constant current source. If the OCP_SEL pin is kept open
or connected to GND, the IC identifies a short-circuit and
starts the timer counter when the voltage at the IN pin falls
below 0.8 times the voltage of Vref, TRAC_IN or SS,
whichever is lower. If the OCP_SEL pin is connected to
REG_O, the IC compares the voltage at the IN pin with 0.4
times the voltage. When the voltage at this pin goes
beyond 1.25V, the IC latches off. The latch-off state is
reset by the off signal at the ON/OFF pin or the UVLO lock.
3.3V regulator output pin.
REG_O
VIN
10µA
10kΩ
500Ω
11
1kΩ
12
REG_O
VIN
50Ω
12
32kΩ
20kΩ
Continued on next page.
No.A1277-6/9
LV5256GP
Continued from preceding page.
Pin No.
13
Pin Name
Description
Equivalent Circuit
SS
Capacitor connection pin for soft start. The capacitor
connected to this pin is charged by the internal 10µA
constant current. The interval during which this voltage
reaches Vref is called the soft start period. The voltage is
clipped to approx. 2V after the soft start. This pin is pulled
down to the ground level when ONOFF/UVLO lock mode.
REG_O
VIN
10µA
10kΩ
13
500Ω
REG_O
1.25V
14
TRAC_IN
Reference voltage input pin for tracking power supply
operating. A voltage from 0V up to Vref applied to this pin
serves as the reference voltage for determining the output
voltage. This pin must be connected to the SS pin when it
is not to be used.
REG_O
VIN
14
1kΩ
REG_O
15
FB
Error amplifier output pin. Connect a phase compensation
component between this pin and IN pin.
REG_O
VIN
100µA
400Ω
15
1.25V
1kΩ
16
IN
Output voltage input pin. Apply the resistor divided output
voltage to this pin.
REG_O
VIN
SS TRAC_IN Vref
1kΩ
16
REG_O
17
OCP_SEL
OCP detection voltage switching pin, A 100kΩ pull-down
resistor is provided between OCP_SEL and GND. The IC
enters the 0.8 times detection mode when this pin is
connected to GND or kept open and enters the 0.4 times
detection mode when the pin is connected to the REG_O
pin.
V
DD
17
100kΩ
Continued on next page.
No.A1277-7/9
LV5256GP
Continued from preceding page.
Pin No.
Pin Name
Description
Equivalent Circuit
18
RT
Oscillation frequency setting pin. Connect a resistor
between this pin and GND. A 100kΩ resistor causes the
oscillator to oscillate at 1MHz (typ.).
V
DD
500Ω
10kΩ
18
19
20
V
DD
Logic system power supply. Apply 3.0V±0.1V to this pin
from an external source.
LGND
Logic system ground pin. All voltages are measured with
respect to this voltage level.
Startup Sequence
V
DD
ONOFF
VIN
ONOFF:H
REG_O startup
REG_O
VOUT-5
UVLO release
VOUT-5 startup
VOUT-5 normal judgment
SS start
SS
SW
Power supply operation beginning
* Be sure to set the ONOFF to 0V when starts or stops V . And apply voltage to VIN after V
DD DD
started up.
No.A1277-8/9
LV5256GP
Output Voltage Setting Method
The LV5256GP can produce any arbitrary output voltage. The output voltage is set by the resistor inserted between the
IN pin (pin 16) and GND, and IN pin and output voltage.
The calculating formula for setting the output voltage by using the output voltage setup lower-side resistor R1 and the
output voltage setup upper-side resistor R2 is as follows:
Output voltage
(Step-down) V1 or V2
(Step-up) VOUT1 or VOUT2
R2
IN
R1
R2
R1
R2
R1
(Output voltage) = 1+
×Vref =1+
QVref =1.00(typ)
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
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mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of August, 2008. Specifications and information herein are subject
to change without notice.
PS No.A1277-9/9
相关型号：
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