LA6242H_09 [SANYO]
For CD Player 4-channel Bridge (BTL) Driver; 对于CD播放器4通道桥接（ BTL ）驱动器
| 型号： | LA6242H_09 |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | For CD Player 4-channel Bridge (BTL) Driver |
| 文件： | 总9页 (文件大小：154K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : EN7814D
Monolithic Linear IC
For CD Player
LA6242H
4-channel Bridge (BTL) Driver
Overview
The LA6242H is a 4-channel motor driver IC for home and car CD players. It provides a pin for switching the channel 1
input.
Functions
• Four bridge-connected (BTL) power amplifier circuits
• I max: 1A
O
• Built-in level shifter circuits
• Muting circuit (on/off control for all outputs)
• High output voltage (dynamic range): 6.5V (typical, channel 1 only)
• Built-in input operational amplifier (channel 1 only)
• Channel 1 input operational amplifier switching function
• Built-in regulator that uses an external PNP transistor and is set by the value of an external resistor.
• Built-in overheat protection (Thermal shutdown) circuit (Design guarantee)
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Supply voltage
Symbol
Conditions
Ratings
Unit
V
V
V
V
S
∗1
14
CC
CC
P*
V
P1, V P2 ∗1
CC CC
14
V
Maximum input voltage
Maximum output current
MUTE pin voltage
B
13
V
IN
I
max
Each output
1
13
A
O
V
V
MUTE
Allowable power dissipation
Pd max
Independent IC
0.8
W
W
°C
°C
Mounted on the specified board ∗2
1.8
Operating temperature
Storage temperature
Topr
Tstg
-40 to +85
-55 to +150
*1: All of the power supply pins, V S, V P1, and V P2, must be connected to the power supply system externally to the IC.
CC CC CC
*2: Specified board: 114.3mm × 76.1mm × 1.6mm, glass epoxy board.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
equipment.
's products or
21809 MS 20090209-S00004 / 91207 MS 20070828-S00002 / D2506 MS PC 20060623-S00005 / 81004TN (OT) No.7814-1/9
61009 MS 20090522-S00006 /
LA6242H
Recommended Operating Conditions at Ta = 25°C
Parameter
Supply voltage
Symbol
Conditions
Ratings
Unit
V
V
5 to 13
CC
Electrical Characteristics at Ta = 25°C,V S = V P1 = V P2 = 8 V, VREF = 2.5 V, MUTE = 5 V
CC
CC
CC
Ratings
typ
Parameter
Symbol
Conditions
Unit
min
max
Overall
Quiescent current 1
I
I
-ON
All channel outputs on, MUTE pin: high
30
5
45
10
mA
mA
V
CC
Quiescent current 2
-OFF
All channel outputs off, MUTE pin: low
CC
Muting function on voltage
Muting function off voltage
Thermal shutdown
V
V
-ON
MUTE ∗1
MUTE ∗1
*4
2
MUTE
-OFF
0.5
V
MUTE
TSD
150
175
200
°C
BTL Amplifier (Channel 1) (Output Amplifier Block)
Input amplifier offset voltage
Output voltage
I/O gain
V
_OP-AMP Channel 1, input operational amplifiers A and B
OFF
-50
6.2
5.4
+50
mV
V
V
1
R
= 8Ω ∗2
6.5
6
O
L
VG1
∗3
6.6
Times
V/µs
Slew rate
SR1
With the amplifier operating independently, twice
0.5
the value measured between outputs ∗3,∗4
Input Operational Amplifier
Output offset voltage
OP-AMP_SINK
V
1
Input operational amplifiers A and B
Input operational amplifier sink current
Input operational amplifier source current
-10
2
+10
0.5
mV
mA
µA
OFF
OP_SINK
OP-AMP_SOURCE
OP_SOURCE
300
500
Input Operational Amplifier Switching
Input amplifier switching voltage 1
V
1-SW
1-SW
Channel 1, with input operational amplifier B
selected ∗5
Channel 1, with input operational amplifier A
selected ∗5
V
V
IN
Input amplifier switching voltage 2
V
2
IN
BTL Amplifier (Channels 2 to 4) (Output Amplifier Block)
Output offset voltage
Output voltage
V
V
2
Between the + and - outputs for each channel
-50
5
+50
mV
V
OFF
2
R
= 8Ω, between the + and - outputs for each
5.4
6
O
L
channel ∗2
I/O gain
VG2
SR2
5.4
6.6
Multip
lier
V/µs
Slew rate
Amplifier independently, twice the value
0.5
measured between outputs ∗3,∗4
Regulator Voltage
VREG output voltage
REG-IN sink current
Line regulation
VREG
∗6
1.21
5
1.26
10
1.31
V
REG-IN-SINK
The base current of the external PNP transistor
mA
mV
mV
∆V LN
6V ≤ V
CC
5mA ≤ I ≤ 200mA
≤ 12V, I = 200mA
20
150
200
O
O
Load regulation
∆V LD
50
O
O
*1: When the MUTE pin is high, the outputs will be on, and when low, the outputs will be off. (In the amplifier output off state, the outputs are in the
high-impedance state.) This operation applies to all channels.
*2: The voltage across the load terminals when an 8Ω load is connected across the outputs. With the input either high or low. With the output in the saturated
state.
*3: The channel 1 input operational amplifier has a 0dB gain, i.e. it is a buffer amplifier.
*4: Design guarantee value
*5: When V 1-SW is high, operational amplifier A operates, and when low, operational amplifier B operates.
IN
*6: For testing, short the REGOUT to the collector of the external PNP-transistor.
No.7814-2/9
LA6242H
Package Dimensions
unit : mm (typ)
3234B
15.2
(6.2)
28
15
14
1
0.25
2.0
0.8
0.3
(0.8)
2.7
SANYO : HSOP28HC(375mil)
Pd max -- Ta
Specified board: 114.3×76.1×1.6mm3
glass epoxy boaard.
2.5
2.0
1.8
With specified board
1.5
1.0
0.8
0.94
0.42
Independent IC
0.5
0
-40
-20
0
20
40
60
80
100
Ambient temperature, Ta -- °C
No.7814-3/9
LA6242H
Block Diagram
"H"
"L"
−
1 A
V
V
1
2
3
4
5
6
7
28 V
1
IN
IN
V
1-SW
IN
−
+
"H": OP-AMP_A
"L": OP-AMP_B
+
−
1 A
27 V 1 B
IN
IN
−
+
+
V
P1
CC
26 V 1 B
IN
66KΩ
66KΩ
66KΩ
66KΩ
22KΩ
11KΩ
−
+
11KΩ
Signal
GND
+
V
1
22KΩ
22KΩ
22KΩ
22KΩ
22KΩ
22KΩ
22KΩ
−
+
25 SGND
O
−
+
−
V
1
24 V 1-SW
IN
O
ON/OFF of all output
H: ON
L: OFF
−
+
+
V
2
MUTE 23 MUTE
22 VREFIN
O
O
−
+
−
V
2
−
+
Power
GND
Power
GND
FR FR
FR FR
66KΩ
66KΩ
66KΩ
66KΩ
Signal
Power supply
22KΩ
22KΩ
22KΩ
22KΩ
22KΩ
22KΩ
22KΩ
22KΩ
−
+
+
V
V
V
V
3
8
9
21 V
S
CC
O
(V
)
CC
−
+
REGIN
−
+
−
3
20 REGOUT
19 REGIN
O
−
+
REGOUT
+
4
10
11
O
−
+
−
4
18 V 2G
IN
O
11KΩ
11KΩ
11KΩ
11KΩ
V
P2 12
−
+
17 V
2
IN
CC
11KΩ
11KΩ
V
4 13
IN
−
16 V 3G
IN
+
V
4G 14
−
+
15 V
3
IN
IN
No.7814-4/9
LA6242H
Pin Functions
Pin No.
Pin name
Pin description
−
1
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
1 A
Channel 1 input amplifier A inverting input
IN
+
2
1 A
Channel 1 input amplifier A non-inverting input
Channels 1 and 2: power stage power supply
Channel 1 output (+)
IN
3
P1
CC
+
−
+
−
+
−
+
−
4
1
1
2
2
3
3
4
4
O
O
O
O
O
O
O
O
5
Channel 1 output (−)
6
Channel 2 output (+)
7
Channel 2 output (−)
8
Channel 3 output (+)
9
Channel 3 output (−)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Channel 4 output (+)
Channel 4 output (−)
P2
CC
Channels 3 and 4: power stage power supply
Channel 4 input
4
IN
IN
IN
IN
IN
IN
4G
3
Channel 4 input (gain adjustment)
Channel 3 input
3G
2
Channel 3 input (gain adjustment)
Channel 2 input
2G
Channel 2 input (gain adjustment)
Base connection of external PNP transistor
Regulator error amplifier input (+)
Signal system power supply
Reference voltage input
REGIN
REGOUT
V
S
CC
VREFIN
MUTE
Output on/off control
V
1-SW
Channel 1 input operational amplifier switching
Signal system ground
IN
SGND
+
V
V
V
1 B
Channel 1 amplifier B non-inverting input
Channel 1 amplifier B inverting input
IN
IN
IN
−
1 B
1
Channel 1 input and input operational amplifier output
Note: • The center frame (FR) is used as the power system ground (P-GND). Along with the signal system ground (SGND), this level must be the lowest
potential in the system.
• The V S (signal system power supply), V P1, and V P2 (output stage power supplies) must be shorted together externally.
CC
CC
CC
No.7814-5/9
LA6242H
Pin Description
Pin No. Pin name
Function
Input
(channel 1)
Description
Equivalent circuit
−
1
V
V
V
V
V
1 A
+
Inputs
IN
IN
IN
IN
IN
V
1-*
IN
V
1
IN
2
1 A
The total gain is set by setting the gain of
the input amplifier.
V
S
CC
+
26
27
28
1 B
−
1 B
1
V
1+*
IN
300Ω
300Ω
SGND
+
−
4
5
V
V
1
1
Output
(channel 1)
Channel 1 output
O
O
V
S
CC
V
P
CC
V
1
O
SGND
+
−
+
−
+
−
6
7
8
9
10
11
V
V
V
V
V
V
2
2
3
3
4
4
Output
(channels 2 to 4)
Channel 2 to 4 outputs
O
O
O
O
O
O
V
S
CC
V
P
CC
V
O
SGND
23
MUTE
MUTE
Controls the on/off states of the
corresponding channel output.
MUTE = high: Output on
V
S
CC
MUTE = low: Output off
∗: When the MUTE pin is open, the
outputs will be off. (The same as when
the MUTE pin is low.)
MUTE
SGND
24
V
1-SW
Channel 1 input
amplifier
switching
Channel 1 input operational amplifier
switching function. Either amplifier A or
amplifier B is selected according to the
voltage applied to the VIN1-SW pin.
IN
V
S
CC
High: V _A
IN
Low: V _B
IN
V
1-SW
IN
2kΩ
2kΩ
SGND
Continued on next page.
No.7814-6/9
LA6242H
Continued from preceding page.
Pin No. Pin name Function
Description
Equivalent circuit
17
18
15
16
13
14
V
V
V
V
V
V
2
2G
3
3G
4
4G
Input
(channels 2 to 4)
Inputs
IN
IN
IN
IN
IN
IN
11kΩ
V
IN
V
G
IN
V
S
CC
300Ω
Vref
SGND
22
VREFIN
VREF
Reference voltage
V
S
CC
VREFIN
SGND
300Ω
19
20
REGIN
REGOUT
REG
Regulator block
V
S
CC
REGIN
300Ω
REGOUT
SGND
No.7814-7/9
LA6242H
MUTE, VIN1-SW
• Relationship between the MUTE pin and the outputs
Outputs
MUTE
CH1
CH2
CH3
CH4
H
L
on
off
Note ∗1: When the outputs are off, they are in the high-impedance state.
∗2: The muting function applies to all channels.
• V 1-SW and the channel 1 input operational amplifier
IN
V
1-SW
Channel 1 input operational amplifier
IN
H
L
AMP_A
AMP_B
OP-AMP B
is used
OP-AMP A
is used
OP-AMP A or OP-AMP B is selected
by V 1-SW
IN
V
1-SW
IN
0.5V
2V
• Muting
MUTE
Output amplifiers
L
H
off
on
Overview of the input/output relationship
66kΩ
66kΩ
22kΩ
22kΩ
11kΩ
V
−
+
IN
+
V
V
1
11kΩ
−
O
O
V
−
+
IN
−
+
+
V
IN
−
+
−
1
−
+
VREFIN
−
+
Note: Only channel 1 has an added input operational amplifier.
No.7814-8/9
LA6242H
Application Circuit Example
SLED
INPUT
−
1
2
3
4
5
6
7
V
V
V
V
V
V
V
1 A
V
1 28
IN
IN
LOADING
INPUT
+
−
1 B 27
1 A
V
V
IN
IN
+
1 B 26
P1
CC
IN
LOADING/SLED
M
+
−
+
−
1
1
2
2
SGND 25
O
O
O
O
V
1-SW 24
IN
H:SLED
L:LOADING
SPINDLE
M
MUTE 23
VREFIN 22
FR FR
FR FR
+
−
+
−
8
9
V
V
3
3
4
4
V
S 21
CC
O
O
O
O
FOCUS
REGOUT 20
REGIN 19
10 V
11 V
TRACKING
V
CC
(
(
)
V
2G 18
IN
12 V P2
CC
V
2 17
IN
)
13 V
4
V
3G 16
IN
IN
TRACKING
INPUT
(
)
14 V 4G
IN
V
15
IN3
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
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limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
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Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
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intellctual property rights which has resulted from the use of the technical information and products mentioned
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This catalog provides information as of June, 2009. Specifications and information herein are subject
to change without notice.
PS No.7814-9/9
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