LA6245P [SANYO]
Monolithic Linear IC For CD Player 4ch Bridge (BTL) Motor Driver; 单片线性IC，用于CD播放器4通道桥接（ BTL ）电机驱动器
| 型号： | LA6245P |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | Monolithic Linear IC For CD Player 4ch Bridge (BTL) Motor Driver |
| 文件： | 总10页 (文件大小：309K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA0332
Monolithic Linear IC
For CD Player
LA6245P
4ch Bridge (BTL) Motor Driver
Overview
The LA6245P is a 4channel motor driver IC for home and car CD players. It provides a pin for switching the channel 1
input.
Functions and Features
• Four bridge-connected (BTL) power amplifier circuits.
• I max: 1A.
O
• Built-in level shifter circuits.
• Muting circuit (on/off control for all outputs).
• Independent operational amplifier.
• Variable regulator (uses an external pnp transistor for output).
• Regulator includes an on/off switching function.
• Thermal shutdown operation monitor pin.
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
Supply voltage
V
_S
∗1
∗1
∗1
14
14
CC
V
P
V
P1, V P2
V
CC
CC CC
V
REG
14
V
CC
Pd max
Allowable power dissipation
Independent IC
0.8
2.0
13
W
W
V
Mounted on the specified PCB
∗2
Maximum input voltage
Maximum output current
MUTE pin voltage
V
B
IN
I
max
Channel 1 to 4 output
1.0
13
A
O
V
V
MUTE
Topr
Operating temperature
Storage temperature
−40 to +85
°C
°C
Tstg
−55 to +150
Note ∗1: All of the power supply pins, V _S, V P1, V P2, and V REG must be connected to the power supply system externally to the IC.
CC
CC
CC
CC
Note ∗2: Mounted on the specified PCB 114.3×76.1×1.6mm3, glass epoxy board.
Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft's control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before using any SANYO Semiconductor products described or contained herein in such
applications.
SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
92706 / 31006 MS OT 20051226-S00012 No.A0332-1/10
LA6245P
Recommended Operating Conditions at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
V
Supply voltage
V
5 to 13
CC
Electrical Characteristics at Ta = 25°C, V _S = V P1 = V P2 = V REG = 8V, V = 2.5V, MUTE = 5V
REF
CC
CC
CC
CC
Ratings
Parameter
Symbol
Conditions
Unit
min
typ
max
[Overall]
Quiescent current 1
Quiescent current 2
Muting function on voltage
Muting function off voltage
Switch on voltage
I
-ON
All channel outputs on, MUTE pin: high
All channel outputs off, MUTE pin: low
30
45
10
mA
mA
V
CC
I
-OFF
5
CC
MUTE-ON
MUTE-OFF
SW-ON
2.5
0.5
0.5
0.5
50
V
2.5
2.5
V
Switch off voltage
SW-OFF
REG-ON
REG-OFF
V
REGSW on voltage
REGSW off voltage
V
V
[BTL Amplifier] (Channel 1 to 4) (Output Amplifier Block)
Input amplifier offset voltage
Output voltage
I/O gain
V
1
∗2
∗1
∗2
∗3
−50
5.7
5.4
mV
V
OFF
V
1
1
R
= 8Ω
6.2
6
O
L
V
6.6
Multiplier
V/µs
G
Slew rate
SR1
With the amplifier operating independently,
between outputs
2.0
[Front End Operational Amplifier]
OP-AMP_SINK 1
OP_SINK
Input operational amplifier sink current
Input operational amplifier source current
2
mA
µA
µA
V
OP-AMP_SOURCE 1
Input bias current
OP_SOURCE
300
500
I OP
B
300
5
Input voltage range
V
0.5
7.5
IN
High-level output voltage
Low-level output voltage
[VREF-IN Amplifier]
V
OP
7.8
0.2
V
OH
V
OP
0.5
4
V
OL
Input voltage range
V
_V
1.3
V
REF IN
[Independent Operational Amplifier]
Output offset voltage
OP-AMP_SINK
OP_VOFF
OP_SINK
OP_SOURCE
IBOP
−6
2
6
mV
mA
µA
µA
V
Input operational amplifier sink current
Input operational amplifier source current
OP-AMP_SOURCE
Input bias current
300
500
300
Input voltage range
OP_V
IN
0
V
CC
−1.5
High-level output voltage
Low-level output voltage
V
OP
OP
7.5
7.8
0.2
V
V
OH
V
0.5
OL
[Power Supply Block] (uses an external pnp transistor: 2SB632K)
Power supply output
REG-IN sink current
Line regulation
V
I
= 200mA
O
1.2
5.0
1.25
10
1.3
V
OUT
REG-IN-SINK
∆V LN
The base current of the external PNP transistor
mA
mV
mV
6V ≤ V REG ≤ 12V, I = 200mA
10
50
50
O
CC
5mA ≤ I ≤ 200mA
O
Load regulation
∆V LD
10
O
O
Note ∗1: The channel 1 input operational amplifier has a 0dB gain, i.e. it is a buffer amplifier.
∗2: With the output in the saturated state.
∗3: Design guarantee value
No.A0332-2/10
LA6245P
Package Dimensions
unit : mm
3251
17.8
(6.2)
36
19
1
18
(0.5)
2.0
0.3
0.8
0.25
2.7
SANYO : HSOP36R(375mil)
Pin Assignment
No.A0332-3/10
LA6245P
Pin Functions
Pin No.
Symbol
Pin description
−
1
V
3
Front end amplifier, channel 3 Input (−)
IN
2
V
3
Front end amplifier, channel 3 Output
Reference voltage input
Muting control
IN
3
VREF-IN
MUTE
4
5
TSD
This pin outputs a low level when the thermal shutdown circuit operates.
Switches between the loading and sled inputs.
Regulator system ground
6
SW
7
GNDREG
REGSW
GNDS
8
Regulator on/off control
9
Signal system ground
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
REG-IN
REG-OUT
VCCREG
OPOUT
Connection for the voltage divider output used to set the regulator voltage
Base connection of external PNP transistor
Regulator power supply
Independent operational amplifier output pin
Independent operational amplifier (−)
Independent operational amplifier (+)
Front end amplifier, channel 2 Output
Front end amplifier, channel 2 Input (−)
Signal system power supply
−
OP
OP
V
+
2
IN
−
2
V
IN
V
V
_S
CC
1LD
Front end amplifier for the loading system input
Front end amplifier, channel 1 Output
Front end amplifier, channel 1 Input (−)
Power stage power supply for channels 1 and 2
No connection
IN
V
1
IN
−
1
V
IN
V
P1
CC
NC
+
−
+
−
+
−
+
−
V
V
V
V
V
V
V
V
1
1
2
2
3
3
4
4
Channel 1 output (+)
O
O
O
O
O
O
O
O
Channel 1 output (−)
Channel 2 output (+)
Channel 2 output (−)
Channel 3 output (+)
Channel 3 output (−)
Channel 4 output (+)
Channel 4 output (−)
NC
NC
No connection
No connection
V
P2
CC
Channels 3 and 4 : power stage power supply
Front end amplifier, channel 4 Input (1)
Front end amplifier, channel 4 Output
−
4
V
IN
V
4
IN
Note: • The center frame (FR) is used as the power system ground (GNDP). Along with the signal system ground (GNDS), this level must be the lowest
potential in the system.
• The V _S (signal system power supply), V P1, and V P2 (output stage power supplies) must be shorted together externally.
CC CC CC
No.A0332-4/10
LA6245P
Block Diagram
No.A0332-5/10
LA6245P
Pin Functions
Pin No.
Symbol
Pin description
Channel 1 to 4 inputs
Equivalent circuit
−
1
21
20
17
16
1
V
IN
IN
IN
IN
−
V
1
IN
V
1
IN
V
_S
V
1
CC
IN
−
V
2
V
2
IN
−
300Ω
V
3
2
V
3
IN
−
35
36
V
4
V
4
IN
300Ω
GNDS
24
25
26
27
28
29
30
31
V
V
V
V
V
V
V
V
1+
1−
2+
2−
3+
3−
4+
4−
Channel 1 to 4 outputs
O
O
O
O
O
O
O
O
V
_S
CC
V
P1
CC
5kΩ
V
1
O
FR
4
6
MUTE
SW
MUTE pin
SW pin
V
_S
CC
MUTE
SW
40kΩ
30kΩ
GNDS
3
V
-IN
REF
Reference voltage
V
-IN
REF
V
_S
CC
300Ω
300Ω
GNDS
Continued on next page.
No.A0332-6/10
LA6245P
Continued from preceding page.
Pin No.
5
Symbol
TSD
Pin description
Thermal shutdown detection
Equivalent circuit
During normal operation: the transistor will be in the off
state
When the thermal shutdown circuit operates:
the transistor will be in the on state
TSD
300Ω
50kΩ
GNDS
19
V
1LD
Loading system input
IN
V
1LD
IN
20kΩ
V
_S
CC
10kΩ
300Ω
GNDS
+
−
15
14
13
OP
OP
Independent operational amplifier
+
−
OP
OP
OPOUT
V
_S
CC
Operation is not controlled by the muting function.
OPOUT
300Ω
300Ω
GNDS
8
REGSW
V REG
CC
REG-IN
REG-OUT
GNDREG
Variable regulator
V
REG
CC
12
10
11
7
Connect the REG-OUT pin to the base of the external
pnp transistor.
10kΩ
REGSW
REG-OUT
Connect the output of the external voltage divider to
REG-IN.
100Ω
10kΩ
40kΩ
REG-IN
30kΩ
GNDREG
No.A0332-7/10
LA6245P
Relationship between the MUTE pin and SW
MUTE
SW
H
ch1
LD ON
ch2 to ch4
H
H
L
MUTE = OFF
MUTE = OFF
MUTE = ON
MUTE = ON
L
SLED ON
LD ON
H
L
L
MUTE = ON
The MUTE = off state is the operating state (play), and the MUTE = on state is the stopped state.
Internal reference voltage are external reference voltage
External reference
voltage
Internal reference voltage
(1.3V (TYP))
SLED = ON
LD = ON
SW
0.5V
1.5V
2.5V
Overview of the input/output relationship
30kΩ
30kΩ
V
IN
R2
10kΩ
10kΩ
−
+
V
V
1+
1−
R1
O
−
+
V
−
IN
−
+
−
+
O
VREF-IN
−
+
The resistors R1 and R2 in the V 1LD input block are internal to the IC.
IN
REGSW Pin Operation
REGSW
REG
H
L
REG = ON
REG = OFF
No.A0332-8/10
LA6245P
Sample Application Circuit
No.A0332-9/10
LA6245P
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the
performance, characteristics, and functions of the described products in the independent state, and are
not guarantees of the performance, characteristics, and functions of the described products as mounted
in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an
independent device, the customer should always evaluate and test devices mounted in the customer's
products or equipment.
SANYO Semiconductor Co., Ltd. strives to supply high-quality high-reliability products. However, any
and all semiconductor products fail with some probability. It is possible that these probabilistic failures
could give rise to accidents or events that could endanger human lives, that could give rise to smoke or
fire, or that could cause damage to other property. When designing equipment, adopt safety measures
so that these kinds of accidents or events cannot occur. Such measures include but are not limited to
protective circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO Semiconductor products (including technical data,services) described
or contained herein are controlled under any of applicable local export control laws and regulations, such
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Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO Semiconductor product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
guaranteed for volume production. SANYO Semiconductor believes information herein is accurate and
reliable, but no guarantees are made or implied regarding its use or any infringements of intellectual
property rights or other rights of third parties.
This catalog provides information as of March, 2006. Specifications and information herein are subject
to change without notice.
PS No.A0332-10/10
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