ENA0654 [SANYO]

Monolithic Linear IC IF Signal Processing (VIF+SIF) IC that Supports the PAL Video Standard for TV Sets and VCRs; 单片线性IC中频信号处理( VIF + SIF) IC ,支持PAL视频标准的电视机和录像机
ENA0654
型号: ENA0654
厂家: SANYO SEMICON DEVICE    SANYO SEMICON DEVICE
描述:

Monolithic Linear IC IF Signal Processing (VIF+SIF) IC that Supports the PAL Video Standard for TV Sets and VCRs
单片线性IC中频信号处理( VIF + SIF) IC ,支持PAL视频标准的电视机和录像机

录像机 电视
文件: 总12页 (文件大小:135K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Ordering number : ENA0654  
Monolithic Linear IC  
IF Signal Processing (VIF+SIF) IC  
that Supports the PAL Video  
Standard for TV Sets and VCRs  
LA75520KVA  
Overview  
The LA75520KVA is a fully adjustment-free VIF + SIF signal processing IC for TV sets and VTRs that supports the PAL  
video standard. It supports 38.0MHz, 38.9MHz, and 39.5MHz as the IF frequencies, as well as PAL sound multi-system  
(M/N, B/G, I and D/K), and contains an on-chip sound carrier trap. The IC employs a 4MHz frequency (which can be  
switched to 4.43MHz) as the reference frequency of the adjustment free circuit, and controls the VCO, AFT, and sound  
filter using an external input signal.  
Features  
Internal VCO adjustment free circuit eliminating the need for an external VCO coil.  
Internal sound carrier trap enables easy configuration of PAL sound multi-system at low cost.  
Considerably reduces the number of required peripheral parts.  
Use of digital AFT eliminates a problem of AFT tolerance.  
Package: SSOP24 (225mil)  
Functions  
VIF amplifier  
EQAMP  
Adjustment-free VCO and PLL detector circuit  
Digital AFT circuit  
RF AGC  
Internal sound carrier trap  
First SIF detector circuit  
PLL-FM detector circuit  
Buzz canceller  
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to  
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,  
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be  
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace  
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety  
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case  
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee  
thereof. If you should intend to use our products for applications outside the standard applications of our  
customer who is considering such use and/or outside the scope of our intended standard applications, please  
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our  
customer shall be solely responsible for the use.  
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate  
the performance, characteristics, and functions of the described products in the independent state, and are not  
guarantees of the performance, characteristics, and functions of the described products as mounted in the  
customer's products or equipment. To verify symptoms and states that cannot be evaluated in an independent  
device, the customer should always evaluate and test devices mounted in the customer  
's products or  
equipment.  
80807 MS PC 20061214-S00006 No.A0654-1/12  
LA75520KVA  
Specifications  
Maximum Ratings at Ta = 25°C  
Parameter  
Maximum supply voltage  
Allowable power dissipation  
Operating temperature  
Storage temperature  
Symbol  
Conditions  
Ratings  
Unit  
V
V
6
640  
CC  
Pd max  
Topr  
Ta 70°C, Mounted on a substrate.*  
mW  
°C  
-20 to +70  
-55 to +150  
Tstg  
°C  
* Mounted on a substrate : 76.1×114.3×1.6mm3, glass epoxy board.  
Operating Conditions at Ta = 25°C  
Parameter  
Symbol  
Conditions  
Ratings  
Unit  
V
Recommended supply voltage  
Operating supply voltage  
V
5.0  
CC  
V
op  
4.5 to 5.5  
V
CC  
Electrical Characteristics at Ta = 25°C, V  
= 5.0V, fp = 38.9MHz  
CC  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
No.  
Unit  
min  
max  
VIF block  
Circuit current  
I
V1  
V2  
75  
4.0  
0.0  
26  
85  
95  
5.0  
1.0  
38  
mA  
V
4
Max RF AGC voltage  
Min RF AGC voltage  
Input sensitivity  
V
H
L
4.5  
0.5  
32  
14  
V
V3  
V
14  
V
Video out 2  
V4  
dBμV  
dB  
i
AGC range  
GR  
V5  
58  
63  
Max allowable input  
Quiescent video output voltage  
Sync signal edge voltage  
Video output level  
Black noise threshold voltage  
Black noise clamp voltage  
Video S/N  
V max  
i
V6  
95  
100  
2.5  
1.0  
1.2  
0.8  
1.5  
50  
dBμV  
V
V
5
V7  
2.2  
0.8  
1.0  
0.5  
1.2  
46  
2.8  
1.2  
1.4  
1.1  
1.8  
V
tip  
V8  
V
5
V
V9  
Vp-p  
V
O
V
V10  
V11  
V12  
V13  
V14  
V15  
V16  
V17  
V18  
V19  
V20  
V21  
V22  
V23  
V24  
V25  
V26  
V27  
V28  
V29  
V30  
V31  
V32  
V33  
V34  
V35  
V36  
BTH  
BCL  
V
V
S/N  
IC-S  
DG  
B/G  
P/S = 10dB  
= 80dBμ  
dB  
C-S best  
38  
43  
dB  
Differential gain  
V
3
6.5  
5
%
IN  
Differential phase  
Quiescent AFT voltage  
Max AFT voltage  
DP  
3
deg  
V
V
15pin to V  
CC  
2.0  
4
2.5  
4.5  
0.5  
12.5  
2.4  
-2.4  
6
3.0  
5
12  
V
H
LOAD 22kΩ/22kΩ  
LOAD 22kΩ/22kΩ  
LOAD 22kΩ/22kΩ  
V
12  
Min AFT voltage  
V
L
0
1
V
12  
AFT sensitivity  
SF  
8.5  
2.0  
16.5  
mV/kHz  
MHz  
MHz  
kHz/mV  
kΩ  
pF  
APC pull-in range (U)  
APC pull-in range (L)  
VCO control sensitivity  
VIF input resistance  
VIF input capacity  
N trap1 (4.5M)  
Fpu  
Fpl  
β
-2.0  
12  
1.5  
6
3
R
C
38.9MHz  
38.9MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
wrt 1MHz  
1.0  
3
i
i
NT1  
NT2  
-30  
-19  
-27  
-20  
-25  
-15  
-25  
30  
-35  
-24  
-32  
-25  
-30  
-20  
-30  
80  
dB  
N trap2 (4.8M)  
dB  
BG trap1 (5.5M)  
BT1  
dB  
BG trap2 (5.85M)  
BT2  
dB  
I trap1 (6.0M)  
IT1  
dB  
I trap2 (6.55M)  
IT2  
dB  
DK trap1 (6.5M)  
DT1  
dB  
Group delay 1 NTSC (3.0M)  
Group delay 1-1 NTSC (3.5M)  
Group delay 2 BG (4M)  
Group delay 2-1 BG (4.4M)  
Group delay 3 I (4M)  
NGD1  
NGD1-1  
BGD2  
BGD2-1  
IGD3  
145  
290  
210  
280  
130  
ns  
110  
50  
200  
130  
200  
80  
ns  
ns  
120  
0
ns  
ns  
Continued on next page.  
No.A0654-2/12  
LA75520KVA  
Continued from preceding page.  
Ratings  
typ  
Parameter  
Symbol  
Conditions  
No.  
Unit  
min  
max  
160  
Group delay 3-1 I (4.4M)  
Group delay 4 DK (4M)  
Group delay 4-1 DK (4.4M)  
Video f characteristics MN1  
Video f characteristics MN2  
Video f characteristics MN3  
Video f characteristics BG1  
Video f characteristics BG2  
Video f characteristics BG3  
Video f characteristics I1  
Video f characteristics I2  
Video f characteristics I3  
Video f characteristics DK1  
Video f characteristics DK2  
Video f characteristics DK3  
Group delay 2-2 BG shift (4M)  
Group delay 2-3 BG shift (4.4M)  
1st SIF Block  
IGD3-1  
DGD4  
wrt 1MHz  
V37  
V38  
V39  
V40  
V41  
V42  
V43  
V44  
V45  
V46  
V47  
V48  
V49  
V50  
V51  
V52  
V53  
80  
10  
30  
120  
ns  
ns  
wrt 1MHz  
30  
60  
50  
90  
DGD4-1  
VFMN1  
VFMN2  
VFMN3  
VFBG1  
VFBG2  
VFBG3  
VFI1  
wrt 1MHz  
ns  
M/N 1 to 2MHz  
M/N 2 to 3MHz  
M/N 3.58MHz  
B/G 1 to 3MHz  
B/G 3 to 4MHz  
B/G 4.43MHz  
I 1 to 3MHz  
I 3 to 4MHz  
I 4.43MHz  
-1.0  
-1.0  
-3.0  
-1.0  
-1.5  
-2.5  
-1.0  
-1.0  
-1.5  
-1.0  
-1.0  
-1.5  
50  
0.0  
0.0  
-1.5  
0.0  
0.0  
-1.0  
0.0  
0.0  
0.0  
0.0  
0.0  
0.0  
100  
180  
1.0  
1.0  
0.0  
1.5  
1.5  
0.5  
1.0  
1.5  
1.5  
1.0  
1.5  
1.5  
150  
250  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
dB  
ns  
VFI2  
VFI3  
VFDK1  
VFDK2  
VFDK3  
BGD2-2  
BGD2-3  
D/K 1 to 3MHz  
D/K 3 to 4MHz  
D/K 4.43MHz  
wrt 1MHz  
wrt 1MHz  
110  
ns  
SIF carrier output level 1  
SIF carrier output level 2  
1st SIF max input  
So1  
So2  
V = 1mV  
i
F1  
F2  
F3  
F4  
F5  
21  
21  
43  
43  
120  
2
86  
86  
mVrms  
mVrms  
dBμV  
kΩ  
V = 10mV  
i
Si max  
Ris  
110  
1st SIF input resistance  
1st SIF input capacity  
33.4MHz  
33.4MHz  
2.4  
6
Cis  
3
pF  
SIF Block  
Limiting sensitivity (SPLIT)  
Limiting sensitivity (INTER)  
FM detection output voltage  
AM removal ratio  
V (lim) (SP)  
P = 80dBμ CW  
S1  
S2  
S3  
S4  
S5  
S6  
S7  
S8  
S9  
20  
29  
25  
35  
560  
60  
0.3  
60  
6
30  
41  
dBμV  
dB  
i
V (lim) (IN)  
P = 80dBμ P/S  
i
V
(FM)  
f = 5.5MHz, ΔF = 30kHz  
390  
50  
730  
mVrms  
dB  
O
AMR  
THD  
Distortion factor  
0.8  
%
FM detection output S/N  
PAL/NT audio voltage gain difference  
PAL De-emphasis  
S/N (FM)  
GD  
P = 80dBμ CW  
55  
dB  
dB  
Pdeem  
Ndeem  
-3  
dB  
NT De-emphasis  
-3  
dB  
Control Block  
SIF system SW threshold voltage A/B  
38MHz/38.9MHz threshold voltage  
38.9MHz/39.5MHz threshold voltage  
Inter-carrier system  
V7_9th  
V10th1  
V10th2  
V13th  
C1  
C2  
C3  
C4  
C5  
2.2  
0.7  
3.7  
2.5  
1.0  
4.0  
2.8  
1.3  
4.3  
0.3  
1.3  
V
V
V
V
V
AFT mute level/SIF trap shift  
threshold voltage 1  
V15th1  
0.7  
2.2  
3.7  
1.0  
2.5  
4.0  
AFT mute level/SIF trap shift  
threshold voltage 2  
V15th2  
V15th3  
C6  
C7  
2.8  
4.3  
V
V
AFT mute level/SIF trap shift  
threshold voltage 3  
Others  
Ref clock input level  
Reflev  
R11  
4.0MHz  
O1  
O2  
83  
90  
95  
dBμV  
kΩ  
Reference frequency SW threshold  
resistance  
150  
270  
Continued on next page.  
No.A0654-3/12  
LA75520KVA  
Package Dimensions  
unit : mm (typ)  
3287  
Pd max -- Ta  
1400  
Specified board : 76.1×114.3×1.6mm3  
glass epoxy  
6.5  
1200  
1000  
24  
13  
When mounted on a board  
800  
600  
400  
12  
1
0.5  
0.22  
0.15  
(0.5)  
200  
0
20  
0
20  
40  
60  
70  
80  
Ambient temperature, Ta – °C  
SANYO : SSOP24(225mil)  
No.A0654-4/12  
LA75520KVA  
System changeover  
a. SIF system SW  
The SIF system can be changed over by setting A (pin 7) and B (pin 9) to GND and OPEN respectively.  
FM DET  
A
B
BG  
I
DK  
O
MN  
O
De-emphasis  
LEVEL  
6dB  
GND  
GND  
GND  
OPEN  
GND  
75μs  
50μs  
50μs  
50μs  
0dB  
OPEN  
OPEN  
O
0dB  
OPEN  
O
0dB  
Note : Circles mean that the system indicated with a circle is selected  
b. IF system SW  
The IF frequency becomes 38.9MHz when pin 10 is open.  
The IF frequency becomes 38.0MHz when pin 10 is set to GND.  
The IF frequency becomes 39.5MHz when pin 10 is set to V  
.
CC  
c. Split/inter carrier SW  
Inter-carrier is selected by setting the 1st SIF input (pin 13) to GND.  
d. Reference frequency changeover SW  
The reference frequency becomes 4.43MHz when pin 11 is OPEN.  
The reference frequency becomes 4.0MHz when 270kΩ is connected between pin 11 and GND.  
e. AFT mute level, trap point shift SW  
By changing the pin 15 voltage, the potential and TRAP point at which AFT is muted can be set to either just or shift  
(about +220kHz).  
Pin 15 potential  
to 4V  
AFT mute potential  
TRAP point shift  
V
MIDDLE (V /2)  
CC  
Just  
Shift  
Just  
Shift  
CC  
4V to 2.5V  
2.5V to 1V  
1V to GND  
MIDDLE (V /2)  
CC  
HI (V  
)
CC  
CC  
HI (V  
)
* V =5V  
CC  
f. FM detector function not used  
To stop FM detection VCO without using the SIF circuit, short-circuit pin 1 – GND with resistance of 1kΩ or less.  
No.A0654-5/12  
LA75520KVA  
Pin Assignment  
DE-EMPHASIS C  
SIF AGC FILTER  
FM PLL FILTER  
1
2
3
4
5
6
7
8
9
24 AUDIO OUTPUT  
23 FILTER CONTROL C  
22 AUDIO BIAS FILTER  
21 SIF CARRIER OUTPUT  
20 RF AGC VR  
V
CC  
VIDEO OUTPUT  
EQ FILTER  
19 GND  
LA75520KVA  
SIF SYSTEM SW A  
APC FILTER  
18 VIF IN1  
17 VIF IN2  
SIF SYSTEM SW B  
16 VIF AGC FILTER  
15 AFT MUTE LEVEL  
14 RF AGC OUTPUT  
13 1st SIF INPUT  
VIF FREQUENCY SW 10  
REFERENCE CP INPUT 11  
AFT OUTPUT 12  
Top View  
Block Diagram and Sample Application  
VIF/SIF  
INPUT  
RF AGC  
SOUND CARRIER  
OUTPUT  
SW10 VIF FREQUENCY  
OUTPUT  
V4  
V3  
V2  
V1  
39.5MHz  
38.9MHz  
38.0MHz  
SW15  
V3  
AUDIO  
OUTPUT  
V2  
V1  
SAWF(P)  
SAWF  
(S)  
SW13  
SW11  
OPEN  
REFERENCE  
4.43MHz  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
SHORT  
4.0MHz  
RF  
AGC  
SW13  
OPEN  
SYSTEM  
SPLIT  
VIF  
AMP  
1 stSIF  
AMP  
DE-  
EMP  
TRAP  
SHORT  
INTER  
IF  
AGC  
AGC  
VIDEO  
DET  
COM  
SW15 ATF MUTE LEVEL B/G TRAP SHIFT  
SPLI  
INT  
V4  
V3  
V2  
V1  
0
AMP  
AMP  
VCO  
MIDDLE(V /2)  
CC  
+250kHz  
0
HI(V  
)
CC  
OMD  
PHASE  
CTL  
FM  
DET  
+250kHz  
AFT  
TRAP  
SW  
Pin7  
Pin9 SIF SYSTEM  
APC  
Hi  
Hi  
Hi  
Lo  
Hi  
B/G  
I
SIF  
MODE  
CTRL  
AMP  
EQ  
Lo  
Lo  
D/K  
M
AMP  
AGC  
Lo  
1
2
3
4
5
6
7
8
9
10  
11  
12  
AFT OUTPUT  
SW10  
V3  
V2  
V1  
V
(5V)  
CC  
SYSTEM SW  
A
SYSTEM SW  
B
VIF FREQ.  
4.43/4MHz  
VIDEO  
OUTPUT  
PCA01178  
No.A0654-6/12  
LA75520KVA  
Input Impedance Test Circuit (VIF and first SIF input impedance)  
Impedance analyzer  
VIF IN  
1st SIF IN  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
LA75520KVA  
1
2
3
4
5
6
7
8
9
10  
11  
12  
V
CC  
No.A0654-7/12  
LA75520KVA  
Pin Functions  
Pin No.  
Pin name  
Function  
Equivalent Circuit  
1
DE-EMPHASIS C  
De-emphasis capacitor connection pin  
This is used to switch the equivalent resistance  
(5kΩ or 7.5kΩ) internally in the IC to select the time  
constant.  
4kΩ  
This switching is linked to the SIF input switch.  
To disable de-emphasis, disconnect the capacitor.  
Connection of an external capacitance of 0.01μF  
enables switching between 50 and 75μs.  
When the FM detector circuit is not to be used, the  
FM VCO can be stopped by connecting it to ground  
with a resistor of 1kΩ or less.  
1
0.01μF  
2
SIF AGC FILTER  
AGC filter pin for SIF carrier  
0.01μF is recommended for C1.  
2kΩ  
2
C1  
3
FM PLL FILTER  
PLL filter pin of FM detector  
This is used to configure an external lag lead filter.  
Example: Connect 330pF in parallel with the filter on  
the left (0.033μF + 3.3kΩ).  
8kΩ  
3
0.033μF  
330pF  
3.3kΩ  
3
4
V
Power supply  
CC  
5
6
EQ OUT  
Equalizer circuit. This circuit is used to correct the  
video signal frequency characteristics.  
EQ FILTER  
Notes on equalizer amplifier design  
The equalizer amplifier is designed as a voltage  
follower amplifier with a gain of about 0 dB. When  
used for frequency characteristics correction, a  
capacitor, inductor, and resistor must be  
2kΩ  
R1:1kΩ  
5
connected in series between pin 6 and ground.  
R1  
Z
Equalizer amplifier gain AV =  
+ 1  
R1 is the IC internal resistance, and is 1kΩ. In the  
application design, simply select Z to correspond  
to the desired characteristics. However, since the  
EQ amplifier gain will be maximum at the resonant  
point defined by Z, care is required to assure that  
distortion does not occur.  
6
C
L
Z
R
Continued on next page.  
No.A0654-8/12  
LA75520KVA  
Continued from preceding page.  
Pin No.  
Pin name  
Function  
Equivalent Circuit  
7
9
SIF SYSTEM SW A  
SIF system selection switch pins. Combining the  
settings of these two pins supports four systems.  
In M/N mode, the audio output level is increased by  
6dB.  
The internal trap is also linked to these switches.  
The truth-values are as follows.  
7
9
Pin7  
H
Pin9  
H
MODE  
B/G  
I
H
L
L
H
D/K  
M/N  
L
L
8
APC FILTER  
PLL APC filter connection pin. The APC count is  
switched internally in the IC.  
The VCO is normally controlled by route A.  
When unlocked and during weak field reception, the  
VCO is controlled by route B and the loop gain is  
increased.  
from  
APC  
DET  
A
1kΩ 1kΩ  
For this APC filter we recommend a resistor of 51Ω  
and capacitor of 0.47μF.  
The buzz characteristics can be improved by  
connecting a capacitor of 100pF or so between pins  
5 and 8.  
B
8
10  
VIF FREQUENCY  
SW  
Switch pin for selecting the IF frequency  
When this pin is open, 1/2V  
CC  
exists.  
50kΩ  
V
: 39.5MHz  
10  
CC  
11kΩ  
50kΩ  
Open : 38.9MHz  
GND : 38.0MHz  
11  
REFERENCE CP  
INPUT  
Reference signal input pin necessary for adjusting  
the internal sound carrier trap, AFT, etc.  
Either 4.0 or 4.43 MHz can be selected. Use the  
configuration shown in example 1 when using  
4.43MHz and configuration shown in example 2  
when using 4.0MHz.  
Since no oscillator can be configured simply by  
connecting the X’tal resonator to pin 11, input the  
reference signal from an external source without  
fail.  
Example 1  
Example 2  
11  
11  
1000pF  
1000pF  
270kΩ  
11  
4.43MHz  
4.0MHz  
Continued on next page.  
No.A0654-9/12  
LA75520KVA  
Continued from preceding page.  
Pin No.  
12  
Pin name  
Function  
Equivalent Circuit  
AFT OUTPUT  
AFT output pin. The AFT center voltage is  
generated by an external bleeder resistor. The AFT  
gain is increased by increasing the resistance of this  
external bleeder resistor.  
R
For the resistor we recommend a resistance equal  
to or greater than 22kΩ.  
For the filter C1 we recommend a capacitance of  
0.1μF.  
12  
R
C1  
13  
1st SIF INPUT  
First SIF input pin. A DC cut capacitor must be used  
in the input circuit.  
(a) If a SAW filter is used :  
The first SIF sensitivity can be increased by  
inserting an inductor between the SAW filter and the  
IC to neutralize the SAW filter output capacitance  
and the IC input capacitance.  
2kΩ  
(b) When used in an intercarrier system :  
Connect this pin to ground.  
13  
14  
14  
RF AGC OUTPUT  
RF AGC output pin. This output controls the tuner  
RF AGC.  
V
CC  
This is the open collector output and a protective  
200Ω resistor is inserted. Determine the external  
bleeder resistor value in accordance with the  
specifications of the tuner.  
200Ω  
15  
AFT MUTE LEVEL  
A switch pin for selecting the mute potential when  
muting is applied to the AFT due to PLL unlock, etc.  
At the same time, it is used to control the trap point  
shift of the audio trap (in the B/G mode). When the  
frequency characteristics of the video band are to  
be made as flat as possible with the split input, the  
trap can be shifted to the high range although the  
attenuation of the sound carrier will drop. Therefore,  
when used in combination with the SAW filter, verify  
that the level is high enough before use.  
66kΩ  
15  
Voltage  
ATF MUTE  
Voltage  
TRAP SHIFT  
34kΩ  
V
to 4V  
V
/2  
0
CC  
CC  
CC  
4V to 2.5V  
2.5V to 1V  
1V to GND  
V
/2  
+250kHz  
0
V
CC  
V
+250kHz  
CC  
* When V  
CC  
= 5 V  
Continued on next page.  
No.A0654-10/12  
LA75520KVA  
Continued from preceding page.  
Pin No.  
16  
Pin name  
IF AGC  
Function  
Equivalent Circuit  
IF AGC filter connection pin.  
The signal peak-detected by the built-in AGC  
detector is converted to the AGC voltage at pin 16.  
Additionally, a second AGC filter (a lag-lead filter)  
used to create the dual time constants is provided  
internally in the IC.  
5kΩ  
1kΩ  
1kΩ  
Use a 0.022μF capacitor as the external capacitor  
(C1), and adjust the value according to the sag,  
AGC speed, and other characteristics.  
16  
C1  
17  
18  
VIF IN2  
VIF IN1  
VIF amplifier input pin  
The input circuit is a balanced circuit, and the input  
impedance is as follows:  
R 1.0kΩ  
17  
18  
19  
20  
GND  
RF AGC VR  
RF AGC volume connection pin  
This pin sets the tuner RF AGC operating point.  
Also, the FM output and the video output can both  
be muted at the same time by connecting this pin to  
ground.  
20  
21  
SIF CARRIER OUT  
First SIF output pin  
This is an emitter-follower output with a 200Ω  
resistor attached in series.  
21  
200Ω  
22  
AUDIO BIAS  
FILTER  
Connection pin for a filter used to hold the FM  
detector output DC voltage fixed. Normally, a 1μF  
electrolytic capacitor should be used. The  
capacitance (CI) should be increased if the low  
band (around 50Hz) frequency characteristics need  
to be improved.  
300Ω  
300Ω 40kΩ  
40kΩ  
22  
+
C1  
Continued on next page.  
No.A0654-11/12  
LA75520KVA  
Continued from preceding page.  
Pin No.  
23  
Pin name  
Function  
Equivalent Circuit  
FILTER CONTROL  
C
Internal filter (trap) control pin  
Connect a capacitor with a capacitance between  
0.47 to 1μF, depending on the video S/N as well as  
the levels of the AM and PM noise.  
23  
24  
AUDIO OUTPUT  
Sound output pin  
Emitter follower output  
24  
1kΩ  
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using  
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition  
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.  
products described or contained herein.  
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all  
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or  
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise  
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt  
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not  
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural  
design.  
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are  
controlled under any of applicable local export control laws and regulations, such products may require the  
export license from the authorities concerned in accordance with the above law.  
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or  
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,  
without the prior written consent of SANYO Semiconductor Co.,Ltd.  
Any and all information described or contained herein are subject to change without notice due to  
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the  
SANYO Semiconductor Co.,Ltd. product that you intend to use.  
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed  
for volume production.  
Upon using the technical information or products described herein, neither warranty nor license shall be granted  
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third  
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's  
intellctual property rights which has resulted from the use of the technical information and products mentioned  
above.  
This catalog provides information as of August, 2007. Specifications and information herein are subject  
to change without notice.  
PS No.A0654-12/12  

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