ENA0692 [SANYO]
For CCD Vertical Clock Driver; 对于垂直CCD时钟驱动器
| 型号： | ENA0692 |
| 厂家： | 
SANYO SEMICON DEVICE |
| 描述： | For CCD Vertical Clock Driver |
| 文件： | 总8页 (文件大小：127K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Ordering number : ENA0692
Bi-CMOS LSI
For CCD
LV5609LP
Vertical Clock Driver
Overview
The LV5609LP is vertical clock driver for CCD.
Functions
• Ternary output ×2ch
• Binary output ×2ch
• SHT output ×1ch
• Output ON resistance : 30Ω typ
Specifications
Absolute Maximum Ratings at Ta = 25°C, V = VM = 0V
SS
Parameter
Symbol
Conditions
Ratings
Unit
V
Maximum supply voltage
V
max
6
20
DD
VH max
V
VL max
VH-VL max
Pd max
Topr
-10
V
24
V
Allowable power dissipation
Operating temperature
Storage temperature
with specified substrate *
0.8
W
°C
°C
-20 to +80
-40 to +125
Tstg
* : Specified substrate : 40×50×0.8mm3, glass epoxy four-layer (2S2P) board
Allowable Operating Ratings at Ta = 25°C, V = VM = 0V
SS
Ratings
typ
Parameter
Supply voltage
Symbol
Conditions
Unit
min
max
5.5
17
V
2.0
3.3
V
V
V
V
V
V
DD
VH
VL
15
-8.5
-7.5
-4
VH-VL
23.5
CMOS input High voltage
CMOS input Low voltage
V
H
0.8V
V
IN
DD
-0.1
DD
V
L
0.4
IN
Any and all SANYO Semiconductor products described or contained herein do not have specifications
that can handle applications that require extremely high levels of reliability, such as life-support systems,
aircraft's control systems, or other applications whose failure can be reasonably expected to result in
serious physical and/or material damage. Consult with your SANYO Semiconductor representative
nearest you before using any SANYO Semiconductor products described or contained herein in such
applications.
SANYO Semiconductor assumes no responsibility for equipment failures that result from using products
at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor
products described or contained herein.
32207 MS PC 20060719-S00002 No.A0692-1/8
LV5609LP
Electrical Characteristics at Ta = 25°C, V
DD
= 3.3V, V = 0V, VH = 15V, VL = -7.5V, VM = 0V,
SS
Unless otherwise specified
Ratings
typ
Parameter
Static current drain
Symbol
Conditions
Unit
min
max
I
I
V
pin
1
10
1
μA
μA
μA
mA
mA
mA
Ω
DD
IH
DD
VH pin
VL pin
IL
Dynamic current drain
Output ON resistance
V
pin See *1 and *2.
1
DD
IH
DD
VH pin See *1 and *2.
VL pin See *1 and *2.
2.4
4.5
5
IL
3
20
30
30
30
RL
I
I
I
I
= +10mA
30
O
O
O
O
RM
=
10mA
45
Ω
RH
= -10mA
= -10mA
40
Ω
RSHT
TPLM
TPMH
TPLH
TPML
TPHM
TPHL
TTLM
40
Ω
Propagation delay time
No load
200
200
200
200
200
200
800
800
800
200
800
800
800
200
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
No load
No load
No load
No load
No load
Rise time
Fall time
VL → VM V1, V3 See *1.
VL → VM V2, V4 See *1.
VM → VL V1, V3 See *1.
VL → VH SHT See *1.
VM → VL V1, V3 See *1.
VM → VL V2, V4 See *1.
VH → VM V1, V3 See *1.
VH → VL SHT See *1.
TTMH
TTLH
TTML
TTHM
TTHL
*1 : Refer to the CCD equivalent load shown below.
*2 : Refer to the timing waveform on Page 7.
2000pF
2000pF
1000pF
V1
V4
(Ternary)
(Ternary)
SHT
3000pF
3000pF
1600pF
1000pF
V2
V3
(Binary)
(Binary)
2000pF
2000pF
No.A0692-2/8
LV5609LP
Package Dimensions
unit : mm (typ)
3322
Pd max – Ta
1.0
0.8
0.6
0.4
Specified circuit board : 40×50×0.8mm3, glass epoxy
SIDE VIEW
TOP VIEW
3.5
BOTTOM VIEW
(0.125)
four-layer (2S2P) board
With specified substrate
13
18
12
7
(C0.116)
19
24
0.36
6
1
(0.5)
0.5
0.2
0.15
SIDE VIEW
0.25
Independent IC
0.07
0
–
20
0
20
40
60
80
100
SANYO : VCT24(3.5X3.5)X01
Ambient temperature, Ta – °C
No.A0692-3/8
LV5609LP
Pin Assignment
24
23
22
21
20
19
VL
SHT
V4
1
2
3
4
5
6
18 XSHT
17 XV4
16 XSG3
15 XV3
V3
V2
14 XV2
V1
13 XSG1
7
8
9
10
11
12
Top view
Pin Function
Pin No.
Name
Mode
1
VL
Lo power for output (-7.5V system)
Level shift output (binary VH, VL)
Level shift output (binary VM, VL)
2
SHT
V4
3
4
V3
Level shift output (ternary VH, VM, VL)
Level shift output (binary VM, VL)
Level shift output (ternary VH, VM, VL)
GND for output
5
V2
6
V1
7
VM
8
NC
9
VH
Hi power supply for output (15V system)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
NC
NC
XV1
XSG1
XV2
XV3
XSG3
XV4
XSHT
NC
V1 transfer pulse input
V1 read pulse input
V2 transfer pulse input
V3 transfer pulse input
V3 read pulse input
V4 transfer pulse input
SHT pulse input
V
Power supply for input buffer (3.3V system)
GND for input buffer
DD
V
SS
NC
NC
NC
No.A0692-4/8
LV5609LP
Block Diagram
V
DD
VH
Level Shift
& Output Buffer
20
9
Input Buffer
1μF
0.1μF
12
13
XV1
30
30
6 V1
XSG1
XV2 14
5
7
4
V2
VM
15
16
XV3
30
30
V3
XSG3
17
XV4
3 V4
XSHT 18
30
2
1
SHT
VL
V
SS
21
1μF
Logical Function Table
Input
Output
XV1
XV3
XSG1
XSG3
XV2
XV4
V1
V3
V2
V4
XSHT
SHT
L
L
L
H
L
X
X
X
X
L
X
X
X
X
X
X
L
VH
VM
VL
VL
X
X
X
X
X
H
H
X
X
X
X
X
X
H
X
X
X
X
X
X
VM
VL
X
X
H
X
X
X
X
X
VH
VL
H
X
X
No.A0692-5/8
LV5609LP
Timing Chart
V
V
DD
XV1 to XV4
50%
50%
V
SS
XSG1
XSG3
DD
TPHM
50%
TTHM
V
SS
TPMH
TTMH
VH
VM
VL
TTML
TTML
TTLM
90%
TPLM
TPLM
TPML
V1
V3
10%
90%
10%
TTLM
TPML
VM
VL
V2
V4
90%
10%
V
DD
XSHT
50%
50%
V
SS
TTLH
TTHL
TPLH
TPHL
VH
VL
90%
10%
SHT
No.A0692-6/8
LV5609LP
CCD Equivalent Load Measurement Timing Waveform
63.5μs
127μs
2μs
XV1
XV2
XV3
XV4
XSG1
2.5μs
XSG3
XSHT
63.5μs
2.5μs
2μs
16.7ms
Enlarged View of overlapped portion
XV1
XV2
XV3
XV4
0μs 0.7μs 1.4μs 2.1μs 2.8μs 3.5μs 4.2μs 4.9μs
No.A0692-7/8
LV5609LP
Specifications of any and all SANYO Semiconductor products described or contained herein stipulate the
performance, characteristics, and functions of the described products in the independent state, and are
not guarantees of the performance, characteristics, and functions of the described products as mounted
in the customer's products or equipment. To verify symptoms and states that cannot be evaluated in an
independent device, the customer should always evaluate and test devices mounted in the customer's
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so that these kinds of accidents or events cannot occur. Such measures include but are not limited to
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for the SANYO Semiconductor product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not
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This catalog provides information as of March, 2007. Specifications and information herein are subject
to change without notice.
PS No.A0692-8/8
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