S3C9654 [SAMSUNG]
MICROCONTROLLER; 微控制器
| 型号： | S3C9654 |
| 厂家： | 
SAMSUNG |
| 描述： | MICROCONTROLLER |
| 文件： | 总27页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
S3C9654/C9658/P9658
PRODUCT OVERVIEW
1
PRODUCT OVERVIEW
SAM88RCRI PRODUCT FAMILY
Samsung's SAM88RCRI family of 8-bit single-chip CMOS microcontrollers offer fast and efficient CPU, a wide
range of integrated peripherals, and supports OTP device.
A dual address/data bus architecture and bit- or nibble-configurable I/O ports provide a flexible programming
environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating
modes are included to support real-time operations.
S3C9654/C9658/P9658 MICROCONTROLLER
The S3C9654/C9658/P9658 microcontroller with USB function can be used in a wide range of general purpose
applications. It is especially suitable for mouse or joystick controller and is available in 16, 18, 20-pin DIP and
SOP package.
The S3C9654/C9658/P9658 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is
built around the powerful SAM88RCRI CPU core.
Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register
space, the size of the internal register file was logically expanded. The S3C9654/C9658/P9658 has 4/8 Kbytes of
program memory on-chip (S3C9654/C9658), and 208 bytes of RAM including 16 bytes of working register.
Using the SAM88RCRI design approach, the following peripherals were integrated with the SAM88RCRI core:
— Three configurable I/O ports (14 pin, at 20 pin)
— 14-bit programmable pins for external interrupts (at 20 pin)
— 8-bit timer/counter with two operating modes
OTP
The S3C9654/C9658 microcontroller is also available in OTP (One Time Programmable) version. S3P9658
microcontroller has an on-chip 4/8 Kbyte one-time-programmable EPROM instead of masked ROM. The
S3P9658 is comparable to S3C9654/C9658, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW
S3C9654/C9658/P9658
FEATURES
CPU
Timer/Counter
·
SAM88RCRI CPU core
·
One 8-bit basic timer for watchdog function and
programmable oscillation stabilization interval
generation function
Memory
·
One 8-bit timer/counter with Compare/Overflow
counter
·
·
4-K byte internal program memory
(ROM S3C9654)
8-K byte internal program memory
(ROM S3P9658/C9658)
USB Serial Bus
·
Compatible to USB low speed (1.5 Mbps) device
1.0 specification.
·
·
208-byte RAM
16 bytes of working register
·
Serial bus interface engine (SIE)
— Packet decoding/generation
Instruction Set
— CRC generation and checking
— NRZI encoding/decoding and bit-stuffing
Two 8-byte receive/transmit USB buffer
·
·
41 instructions
IDLE and STOP instructions added for power-
down modes
·
Instruction Execution Time
0.66 ms at 6 MHz fOSC
Operating Temperature Range
·
° °
– 0 C to + 85 C
·
Interrupts
Operating Voltage Range
· 4.0 V to 5.25 V
·
·
·
·
14 interrupt sources with one vector (20 pin)
12 interrupt sources with one vector (18 pin)
10 interrupt sources with one vector (16 pin)
One level, one vector interrupt structure
Package Types
·
·
16, 18, 20 pin DIP
16, 18, 20 pin SOP
Oscillation Circuit Options
Comparator
·
·
·
·
6 MHz crystal/ceramic oscillator
External clock source
·
·
·
6-channel mode, 32 step resolution
5-channel mode, external reference
Low EMI design
RC oscillator
Embedded oscillation capacitor (XI, XO, 33pF)
Low Voltage Reset
General I/O
·
·
Low voltage Reset
Power on Reset
·
·
·
14 bit-programmable I/O pins (20 pin)
12 bit-programmable I/O pins (18 pin)
10 bit-programmable I/O pins (16 pin)
High Sink Current Pin for LED
P0.0 (VOL: 0.4 V, 50mA)
·
Sub Oscillator
·
·
Internal RC sub oscillator
Auto interrupt wake-up
1-2
S3C9654/C9658/P9658
PRODUCT OVERVIEW
BLOCK DIAGRAM
TEST
P1.0/CIN0/INT1
P1.1/CIN0/INT1
P1.2/CIN0/INT1
P1.3/CIN0/INT1
P1.4/CIN0/INT1
P1.5/CIN0/INT1
RESET
Port 1/
Compa
-rator
Port I/O and
Interrupt Control
XIN
OSC
XOUT
SUB
OSC
P0.0/INT0
P0.1/INT0
SAM88RCRI CPU
(note)
Basic
Timer
P0.2/INT0
P0.3/INT0
Port 0
(note)
(note)
P0.4/INT0
P0.5/INT0
(note)
Timer 0
LVR
8K (4K)
ROM
208 Byte
RAM
P2.1/D+/INT2
P2.0/D-/INT2
USB
SIE
NOTE:
16, 18, 20 DIP and SOP.
Figure 1-1. Block Diagram
1-3
PRODUCT OVERVIEW
S3C9654/C9658/P9658
PIN ASSIGNMENTS
P0.2/INT0
VSS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
P0.3/INT0
VDD
P0.0/INT0
P2.0/D-/INT2
P2.1/D+/INT2
RESET
P1.0/COM0/INT1
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
P0.4/INT0
S3C9654/
S3C9658
XIN
XOUT
TEST
P0.1/INT0
P0.5/INT0
Figure 1-2. Pin Assignment (20 Pin)
1-4
S3C9654/C9658/P9658
PRODUCT OVERVIEW
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
P0.3/INT0
VDD
P0.2/INT0
VSS
P2.0/D-/INT2
P2.1/D+/INT2
RESET
XIN
P0.0/INT0
P1.0/COM0/INT1
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
S3C9654/
S3C9658
XOUT
TEST
P0.1/INT0
Figure 1-3. Pin Assignment (18 Pin)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VDD
VSS
P0.0/INT0
P2.0/D-/INT2
P2.1/D+/INT2
RESET
XIN
P1.0/COM0/INT1
P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
S3C9654/
S3C9658
XOUT
TEST
P0.1/INT0
Figure 1-4. Pin Assignment (16 Pin)
1-5
PRODUCT OVERVIEW
S3C9654/C9658/P9658
Table 1-1. Signal Descriptions
Pin Description
Pin Names
Pin
Type
Circuit
Number
Pin
Numbers
Share
Pins
P0.0
I/O
I/O
I/O
Bit-programmable I/O port for Schmitt trigger
input or n-ch open drain output (50 mA).
Pull-up resistor is assignable to input pin by
software and is automatically disabled for
output pin. Port 0 can be individually configured
as external interrupt input.
SK
3
INT0
P0.1–P0.5
P1.0–P1.5
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors
individually assignable to input pins by software
and are automatically disabled for output pins.
Port 0 can be individually configured as
external interrupt inputs.
D
1, 10, 11,
12, 20
INT0
Bit-programmable I/O port for Schmitt trigger
input or push-pull output. Pull-up resistors are
individually assignable to input pins by
software. Port 1 can be configured as
comparator input or external interrupt inputs.
Pull-down resistors are individually assignable.
(in comparator input)
CP
4–9
CIN0-5
INT1
P2.0/D-
–
P2.1/D+
I/O
Bit-programmable I/O port for Schmitt trigger
input or n-ch open drain output. Pull-up
resistors are individually assignable to input
pins by software and are automatically disabled
for output pins. Port 2 can be individually
configured as external interrupt inputs. Also it
can be configured as an USB ports.
CP
17, 18
14, 15
INT2
XOUT, XIN
–
I
System clock input and output pin
(crystal/ceramic oscillator, or external clock
source)
–
–
INT0
External interrupt for bit-programmable port 0
D
1, 3, 10,
Port 0
11, 12, 20
INT1
INT2
VDD
I
I
External interrupt for bit-programmable port 1
External interrupt for bit-programmable port 2
Power input pin
D
D
–
4–9
17, 18
19
Port 1
Port 2
–
–
VSS
VSS is a ground power for CPU core.
–
1
–
–
2
–
–
Reset input pin (Pull-up register embedded)
16
RESET
1-6
S3C9654/C9658/P9658
PRODUCT OVERVIEW
Table 1-2. Pin Circuit Assignments for the S3C9654/C9658/P9658
Circuit Number
Circuit Type
S3C9654/C9658/P9658 Assignments
C
D
O
I/O
I/O
I/O
Port 0.1–5, INT0, INT1, INT2
SK
CP
Port 0.0
Port 1, Port 2
NOTE: Diagrams of circuit types C–D, and F-8 are presented below.
VDD
V
DD
Pull-up
Enable
P-Channel
Out
Data
Data
Circuit
Type C
I/O
N-Channel
Output
Output
DIsable
DIsable
Data
Figure 1-6. Pin Circuit Type D
Figure 1-5. Pin Circuit Type C
1-7
PRODUCT OVERVIEW
S3C9654/C9658/P9658
VDD
Pull-up
Registor
Pull-up Enable
Output
Disable
I/O
Output
Data
VSS
D0
D1
Input
Data
MUX
Mode
Input Data
Output
Input
D0
D1
Figure 1-7. Pin Circuit Type SK
VDD
Pull-up
Enable
Data
Circuit
I/O
Type C
Output
DIsable
Data
Input
Enable
Analog/
External VREF
Input D+/D-
Figure 1-8. Pin Circuit Type CP
1-8
S3C9654/C9658/P9658
PRODUCT OVERVIEW
S3C9654/
S3C9658/S3P9658
Button
Button
SW1
SW3
15 XI
P0.1/INT0 12
14
19
XOUT
VDD
VSS
VSS
VDD
1
P0.2/INT0
Button
+
C_BULK
-
SW2
T_X
R_XY
D_X
VSS
VDD
D-
2
20
VSS
P0.3/INT0
17
18
P2.1/D+/INT2
P2.0/D-/INT2
To
Host
D+
VSS
4
5
P1.0/COM0/INT1
P1.1/COM1/INT1
TEST
RESET
13
16
VDD
(note)
VSS
T_Y
D_Y
6
7
P1.2/COM2/INT1
P1.3/COM3/INT1
VDD
10
11
P0.4/INT0
P0.5/INT0
VDD
R_Z
D_Z
T_Z
8
9
P1.4/COM4/INT1
P1.5/COM5/INT1
3
P0.0/INT0
NOTE:
RESET Pin is connected to internal Pull-up register after power on reset.
If RESET Pin is low, S3C9654/C9658/P9658 goes to reset.
Figure 1-9. USB Mouse Circuit Diagram
1-9
S3C9654/C9658/P9658
ELECTRICAL DATA
15 ELECTRICAL DATA
OVERVIEW
In this section, the following S3C9654/C9658/P9658 electrical characteristics are presented in tables and graphs:
— Absolute maximum ratings
— D.C. electrical characteristics
— I/O capacitance
— A.C. electrical characteristics
— Oscillator characteristics
— Operating voltage range
— Oscillation stabilization time
— Clock timing measurement points at XIN
— Data retention supply voltage in Stop mode
— Stop mode release timing when initiated by a RESET
— Stop mode release timing when initiated by an external interrupt
— Characteristic curves
— Comparator Electrical Characteristics
15-1
ELECTRICAL DATA
S3C9654/C9658/P9658
Table 15-1. Absolute Maximum Ratings
°
(TA = 25 C)
Parameter
Supply voltage
Input voltage
Symbol
VDD
VI
Conditions
Rating
Unit
V
–
– 0.3 to + 6.5
– 0.3 to VDD + 0.3
– 0.3 to VDD + 0.3
– 18
All ports
V
VO
Output voltage
Output current high
All output ports
V
IOH
One I/O pin active
mA
All I/O pins active
– 60
IOL
Output current low
One I/O pin active (except P0.0)
+ 30
mA
Total pin current for ports 0, 1, 2
(except P0.0)
+ 100
P0.0
+ 50
TA
°
C
Operating
–
0 to + 85
temperature
TSTG
Storage
–
– 60 to + 150
temperature
15-2
S3C9654/C9658/P9658
ELECTRICAL DATA
Table 15-2. D.C. Electrical Characteristics
(TA = 0 C to + 85 C, VDD = 4.0 V to 5.25 V)
°
°
Parameter
Symbol
VIH1
Conditions
Min
Typ
Max
VDD
Unit
All input pins except VIH2, D+, D–
0.8 VDD
VDD – 0.5
Input high voltage
–
V
VIH2
XIN
VDD
VIL1
All input pins except VIL2, D+, D–
XIN
0.2 VDD
Input low voltage
–
–
–
–
–
VIL2
0.4
–
VOH
VDD = 4.0 V–5.25 V
VDD – 1.0
Output high voltage
IOH = – 200 mA
All output ports except D+, D–
VOL
VDD = 4.0 V–5.25 V
IOL = 2 mA
All output ports except D+, D–, P0.0
Output low voltage
Output low Current
–
–
–
0.4
3
50(4)
–
mA
µA
IOL
VOL = 0.4 V
ILIH1
VIN = VDD
All inputs except ILIH2
except D+, D–, XOUT
Input high leakage
current
ILIH2
ILIL1
VIN = VDD, XIN
–
–
–
–
20
VIN = 0 V
All inputs except ILIL2
except D+, D–, XOUT
Input low leakage
current
– 3
ILIL2
ILOH
VIN = 0 V, XIN
–
–
–
–
– 20
3
VOUT = VDD
All output pins except D+, D–
Output high leakage
current
ILOL
VOUT = 0 V
All output pins except D+, D–
XOUT, P0.0
Output low leakage
current
–
–
– 3
RL1
RL2
IDD1
VIN = 0 V, VDD = 5.0 V,
Port 0, Port 1
Pull-up resistors
Supply current
25
–
50
4.3
6.5
100
–
KW
VIN = 0 V, VDD = 5.0 V,
Port 2
Normal operation mode,
VDD = 4.0 V–5.25 V
–
15
mA
6 MHz, CPU clock
IDD2
IDLE mode
VDD = 4.0 V–5.25 V
6 MHz, CPU clock
–
–
2
4
IDD3
Stop mode, oscillator stop
VDD = 4.0 V–5.25 V
13
25
mA
NOTES:
1. Supply current does not include current drawn through internal pull-up resistors or external output current load.
2. This parameter is guaranteed, but not tested (include D+, D–).
3. Only in 4.0 V to 5.25 V, D+ and D– satisfy the USB spec 1.0.
4. P0.0 designed for direct LED current sink, see the SNKCON resistor and Figure 1-9 (Page 1-9).
15-3
ELECTRICAL DATA
S3C9654/C9658/P9658
Table 15-3. Input/Output Capacitance
°
°
(TA = 0 C to + 85 C, VDD = 0 V)
Parameter
Input
capacitance
Symbol
Conditions
Min
Typ
Max
Unit
CIN
f = 1 MHz; unmeasured pins
are connected to VSS
–
–
10
pF
COUT
Except XIN, XOUT
Output
capacitance
CIO
CXI, CXO XIN, XOUT
I/O capacitance
XI/XO capacitance
–
33
–
Table 15-4. A.C. Electrical Characteristics
°
°
(TA = 0 C to + 85 C, VDD = 4.0 V to 5.25 V)
Parameter
Noise filter
Symbol
Conditions
P1 (RC delay)
Min
Typ
Max
Unit
tNF1H, tNF1L
100
–
200
ns
tNF1L
tNF1H
tNF2
0.8 VDD
0.2 VDD
0.5 VDD
Figure 15-1. Nose Filter Timing Measurement Points
15-4
S3C9654/C9658/P9658
ELECTRICAL DATA
Table 15-5. Oscillator Characteristics
°
°
(TA = 0 C + 85 C)
Oscillator
Clock Circuit
Test Condition
Min
Typ
Max
Unit
Main crystal Main
ceramic
Oscillation frequency
VDD = 4.0 V–5.25 V
–
6.0
–
MHz
X
X
IN
(fOSC
)
OUT
External clock
RC oscillator
Oscillation frequency
VDD = 4.0 V–5.25 V
–
6.0
–
MHz
MHz
X
X
IN
OUT
Oscillation frequency
VDD = 5.0 V
XIN
–
–
–
1.0
2.0
4.0
–
–
–
R = 22.6 K
R = 8.8 K
R = 3.2 K
R
XOUT
Table 15-6. Oscillation Stabilization Time
°
°
(TA = 0 C + 85 C, VDD = 4.0 V to 5.25 V)
Oscillator
Main crystal
Test Condition
Min
Typ
Max
Unit
VDD = 4.0 V to 5.25 V, fOSC > 6.0 MHz
–
–
10
ms
(Oscillation stabilization occurs when VDD is
equal to the minimum oscillator voltage range.)
Main ceramic
216/fOSC
–
t
t
stop mode release time by a reset
Oscillator
–
–
–
–
WAIT
WAIT
stabilization wait
time
stop mode release time by an interrupt
NOTE: The oscillator stabilization wait time, t
, when it is released by an interrupt, is determined by the setting in the
WAIT
basic timer control register, BTCON.
15-5
ELECTRICAL DATA
S3C9654/C9658/P9658
1/fOSC
t
XL
tXH
V
DD - 0.5 V
0.4 V
X
IN
Figure 15-2. Clock Timing Measurement Points at XIN
Table 15-7. Data Retention Supply Voltage in Stop Mode
°
°
(TA = 0 C to + 70 C)
Parameter
Symbol
Conditions
Stop mode
Min
Typ
Max
Unit
VDDDR
Data retention
supply voltage
2.0
–
6
V
IDDDR
Stop mode; VDDDR = 2.0 V
Data retention
supply current
–
–
5
µA
15-6
S3C9654/C9658/P9658
ELECTRICAL DATA
IDLE Mode
(Basic Timer Active)
Stop Mode
Data Retention Mode
VDDDR
VDD
Normal
Operating
Mode
Execution Of
Stop Instrction
External
Interrupt
0.8 VDD
0.2 VDD
tWAIT
Figure 15-3. Stop Mode Release Timing When Initiated by an External Interrupt
Table 15-8. Comparator Electrical Characteristics
°
°
(T = 0 C to + 85 C, VDD = 4.0 V to 5.25 V)
A
Parameter
Symbol
Conditions
Min
Typ
Max
Unit
Conversion time (1)
tCON
–
–
–
fCPU
6 ´ 12
or
6 ´ 192
VICN
RCN
VREF
ICIN
VSS
2
VDD
–
VDD
3
Comparator input
voltage
–
–
–
–
1000
–
V
MW
V
Comparator input
impedance
Comparator
reference voltage
1.8
– 3
– 3
–
VDD = 5 V
VDD = 5 V
Comparator input
current
–
mA
mA
IREF
ICOM
Reference input
current
–
3
VDD = 5.5 V
VDD = 4.5 V
Comparator block
current (2)
1
2
1
mA
mA
nA
0.5
100
VDD = 5 V
500
(when power down mode)
NOTES:
1. Conversion time is the time required from the moment a conversion operation starts until it ends.
2. is an operating current during conversion.
I
COM
15-7
ELECTRICAL DATA
S3C9654/C9658/P9658
Table 15-9. Low Speed Source Electrical Characteristics (USB)
(TA = 0°C to + 85°C, Internal Voltage Regulator Output V33OUT = 2.8 V to 3.6 V, typ 3.3 V)
Parameter
Transition Time:
Symbol
Conditions
Min
Max
Unit
Rise Time
Tr
Tf
CL = 200 pF
75
–
–
ns
CL = 650 pF
CL = 200 pF
CL = 650 pF
(Tr/Tf) CL = 50 pF
CL = 50 pF
300
–
Fall Time
75
–
300
125
2.0
3.6
Rise/Fall Time Matching
Trfm
Vcrs
80
1.3
2.8
%
V
Output Signal Crossover Voltage
V33OUT VDD = 4.0 – 5.25 V
Internal Voltage Regulator Output
Voltage
V
Test
Point
V33OUT
90 %
90 %
Measurement
Points
S/W
D-/D+
R2
10 %
10 %
D. U. T
R1
C2
Tr
Tf
R1 = 15 K
R2 = 1.5 K
CL = 200 pF - 650 pF
W
W
DM: S/W ON
DP: S/W OFF
Figure 15-4. USB Data Signal Rise and Fall Time
3.3 V
DP
MAX: 2.0 V
VCRS
MIN: 1.3 V
0 V
DM
Figure 15-5. USB Output Signal Crossover Point Voltage
15-8
S3C9654/C9658/P9658
MECHANICAL DATA
16 MECHANICAL DATA
OVERVIEW
This section contains the following information about the device package:
— Package dimensions in millimeters
— Pad diagram
#20
#11
0-15
20-DIP-300A
#1
#10
26.80 MAX
26.40 ± 0.20
0.46
1.52
±
±
0.10
0.10
2.54
(1.77)
NOTE: Dimensions are in millimeters.
Figure 16-1. 20-DIP 300A Package Dimensions
16-1
MECHANICAL DATA
S3C9654/C9658/P9658
#20
#11
20-DIP-300A-SG
#1
#10
28.85
0.56
1.63
2.54
(2.92)
Figure 16-2. 20-DIP-300A-SG Package Dimensions
16-2
MECHANICAL DATA
0-8
#20
#11
20-SOP-300
+ 0.10
0.203 - 0.05
#1
#10
MAX
0.10 MAX
1.27
(0.66)
+ 0.10
0.40 - 0.05
NOTE: Dimensions are in millimeters.
Figure 16-3. 20-SOP-300 Package Dimensions
16-3
MECHANICAL DATA
S3C9654/C9658/P9658
#18
#10
18-DIP-300A-SG
#1
#9
23.50
0.56
1.63
2.54
(1.53)
Figure 16-4. 18-DIP-300A-SG Package Dimensions
16-4
S3C9654/C9658/P9658
MECHANICAL DATA
0-8
#18
#10
18-SOP-BD300-AN
0.29
#1
#9
0.32
18.06
1.27BSC
0.48
Figure 16-5. 18-SOP-BD300-AN Package Dimensions
16-5
MECHANICAL DATA
S3C9654/C9658/P9658
#16
#9
16-DIP-300A-SG
#1
#8
19.23
0.56
1.63
2.54
(0.53)
Figure 16-6. 16-DIP-300A-SG Package Dimensions
16-6
S3C9654/C9658/P9658
MECHANICAL DATA
0-8
#16
#9
16-SOP-BD300-SG
0.30
#1
#8
0.32
10.56
1.27BSC
0.48
Figure 16-7. 16-SOP-BD300-SG Package Dimensions
16-7
S3C9654/C9658/P9658
S3P9658 OTP
17 S3P9658 OTP
OVERVIEW
The S3P9658 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the S3P9658
microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by serial data
format.
The S3P9658 is fully compatible with the S3P9658, both in function and in pin configuration. Because of its
simple programming requirements, the S3P9658 is ideal for use as an evaluation chip for the S3P9658.
P0.2/INT0
VSS/VSS
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
P0.3/INT0
VDD
P0.0/INT0
P2.0/D-/INT2
P2.1/D+/INT2
RESET/RESET
XIN
SCLK/P1.0/COM0/INT1
SDAT/P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
P0.4/INT0
S3P9658
XOUT
TEST/TEST
P0.1/INT0
P0.5/INT0
NOTE:
The bold is indicate an OTP pin name.
Figure 17-1. S3P9658 Pin Assignments (20 Pin)
17-1
KS86P6504/P6508 OTP
S3C9654/C9658/P9658
18
17
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
9
P0.3/INT0
VDD/VDD
P0.2/INT0
VSS/VSS
P2.0/D-/INT2
P0.0/INT0
P2.1/D+/INT2
RESET/RESET
XIN
SCLK/P1.0/COM0/INT1
SDAT/P1.1/COM1/INT1
P1.2/COM2/INT1
S3P9658
XOUT
P1.3/COM3/INT1
TEST/TEST
P0.1/INT0
P1.4/COM4/INT1
P1.5/COM5/INT1
NOTE:
The bold is indicate an OTP pin name.
Figure 17-2. S3P9658 Pin Assignments (18 Pin)
16
15
14
13
12
11
10
9
1
2
3
4
5
6
7
8
VDD/VDD
VSS/VSS
P0.0/INT0
P2.0/D-/INT2
P2.1/D+/INT2
RESET/RESET
XIN
SCLK/P1.0/COM0/INT1
SDAT/P1.1/COM1/INT1
P1.2/COM2/INT1
P1.3/COM3/INT1
P1.4/COM4/INT1
P1.5/COM5/INT1
S3P9658
XOUT
TEST/TEST
P0.1/INT0
NOTE:
The bold is indicate an OTP pin name.
Figure 17-3. S3P9658 Pin Assignments (16 Pin)
17-2
S3C9654/C9658/P9658
Main Chip
S3P9658 OTP
Table 17-1. Descriptions of Pins Used to Read/Write the EPROM
During Programming
Pin Name Pin Name Pin Number (20 DIP)
I/O
Function
P1.0
SDAT
5
I/O
Serial Data Pin (Output when reading, Input when
writing) Input and Push-pull Output Port can be
assigned
P1.1
SCLK
4
I/O
I
Serial Clock Pin (Input Only Pin)
RESET
16
0 V : OTP write and test mode
5 V : Operating mode
RESET
TEST
VPP
13
I
I
Chip Initialization and EPROM Cell Writing Power
Supply Pin (Indicates OTP Mode Entering) When
writing 12.5 V is applied and when reading.
(TEST)
VDD/VSS
VDD/VSS
19/2
Logic Power Supply Pin.
Table 17-2. Comparison of S3P9658 and S3C9654/C9658 Features
Characteristic S3P9658 S3C9654/C9658
8 K-byte EPROM
Program Memory
4/8 K-byte mask ROM
4.0 V to 5.25 V
Operating Voltage (VDD
)
4.0 V to 5.25 V
VDD = 5 V, VPP (TEST) = 12.5 V
OTP Programming Mode
Pin Configuration
20/18/16 DIP, 20/18/16 SOP
User Program 1 time
20/18/16 DIP, 20/18/16 SOP, 16SSOP
Programmed at the factory
EPROM Programmability
OPERATING MODE CHARACTERISTICS
When 12.5 V is supplied to the VPP (RESET) pin of the S3P9658, the EPROM programming mode is entered.
The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in
Table 14-3 below.
Table 17-3. Operating Mode Selection Criteria
VDD
Address (A15-A0)
R/W
Mode
VPP (RESET)
REG/MEM
5 V
5 V
0
0
0
1
0000H
0000H
0000H
0E3FH
1
0
1
0
EPROM read
12.5 V
12.5 V
12.5 V
EPROM program
EPROM verify
EPROM read protection
NOTE: "0" means Low level; "1" means High level.
17-3
相关型号：
S3C9654XX-DK
Microcontroller, 8-Bit, MROM, SAM88RCRI CPU, 6MHz, CMOS, PDIP20, 0.300 INCH, DIP-20
SAMSUNG
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