SA2007HSA [SAMES]

Single Phase Bidirectional Dual Element Power/Energy Metering IC with Pulse Output; 单相双向双单元功率/电能计量IC,具有脉冲输出
SA2007HSA
型号: SA2007HSA
厂家: SAMES    SAMES
描述:

Single Phase Bidirectional Dual Element Power/Energy Metering IC with Pulse Output
单相双向双单元功率/电能计量IC,具有脉冲输出

脉冲 光电二极管
文件: 总10页 (文件大小:156K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Single Phase Bidirectional Dual Element  
Power/Energy Metering IC with Pulse Output  
SA2007H  
ssames  
FEATURES  
+
+
+
+
+
Two current sensor inputs  
+
+
+
+
+
Protected against ESD  
Dual pulse and energy direction outputs  
No external crystal or resonator required  
Performs bi-directional power and energy measurement  
Meets the IEC 521/1036 Specification for Class 1 AC Watt  
hourmeters  
Total power consumption rating below 25mW  
Adaptable to different types of sensors  
Operates over a wide temperature range  
Precision voltage reference on-chip  
DESCRIPTION  
The SAMES SA2007H is a single phase bidirectional dual  
element energy metering integrated circuit. It provides a  
simple analog interface to a micro-controller and is specifically  
designed for meter manufacturers to have full control over the  
meter functionality.  
For each current sensor input the SA2007H integrated circuit  
has a corresponding pulse output, each generating a pulse  
rate with a frequency proportional to the power consumption  
measured on the specific channel.  
The SA2007H performs active power measurement and takes  
the power factor into account. Energy consumption can be  
determined by the power measurement being integrated over  
time. The energy flow direction information is also available for  
each channel.  
The SA2007H has two current sensor inputs. The power  
consumption on both inputs are continuously measured. A  
typical application would be to monitor Live and Neutral lines  
for tamper detection.  
IIP1  
P1  
CURRENT  
POWER TO  
POWER 1  
X
CHANNEL 1  
PULSE RATE  
IIN1  
D1  
OMODE  
IVP  
OUTPUT  
VOLTAGE  
RP  
CONTROL  
AGND  
INT  
IIP2  
P2  
CURRENT  
POWER TO  
POWER 2  
X
CHANNEL 2  
PULSE RATE  
IIN2  
D2  
FMO  
VOLTAGE  
REF.  
OSC  
TIMING  
dr-01623  
VDD  
VSS  
VREF  
TCLK TEST  
Figure 1: Block diagram  
1/10  
SPEC-0116 (REV. 1)  
PRELIMINARY  
15-01-01  
SA2007H  
ssaammeess  
ELECTRICAL CHARACTERISTICS  
#
(V = 2.5V, V = -2.5V, over the temperature range -10°C to +70°C , unless otherwise specified.)  
SS  
DD  
Symbol  
Typ  
Parameter  
Min  
Max  
Unit  
Condition  
Operating temp. Range  
T
-25  
+85  
2.75  
-2.25  
6
°C  
V
O
Supply Voltage: Positive  
V
DD  
2.25  
-2.75  
Supply Voltage: Negative  
Supply Current: Positive  
Supply Current: Negative  
Current Sensor Inputs (Differential)  
V
SS  
V
I
DD  
5
5
mA  
mA  
I
SS  
6
Input Current Range  
I
II  
µA  
-25  
+25  
Peak value  
Voltage Sensor Input (Asymmetrical)  
I
IV  
µA  
-25  
+25  
Peak value  
Input Current Range  
Pin VREF  
With R = 24kW  
µA  
V
-I  
45  
50  
55  
R
Ref. Current  
Ref. Voltage  
connected to V  
SS  
1.1  
V
1.3  
R
Reference to V  
SS  
Digital I/O  
Pins P1, P2, D1, D2, FMO, INT  
Output High Voltage  
V
V
OH  
I
= -2mA  
V -1  
DD  
V
V
OH  
V +1  
SS  
Output Low Voltage  
OL  
I
OL  
= 5mA  
Pins TCLK, TEST, OMODE, RP  
Input High Voltage  
V
V
V
IH  
V -1  
DD  
V
IL  
V +1  
SS  
Input Low Voltage  
Hz  
Hz  
Hz  
At rated input conditions  
Specified linearity  
Pulse Rate P1, P2  
f
p
1360  
5
0
1600  
3000  
Min and Max frequency  
µs  
µs  
t
71.55  
143.1  
Pulse Width P1, P2  
pp  
Positive energy flow  
Negative energy  
t
pn  
µA  
I
IL  
48  
110  
Pins TCLK, TEST, RP, OMODE  
Pull down current  
V V  
1 =  
DD  
#Extended Operating Temperature Range available on request.  
ABSOLUTE MAXIMUM RATINGS*  
Parameter  
Symbol  
Min  
Max  
6.0  
Unit  
V
mA  
°C  
Supply Voltage  
V -V  
DD  
-0.3  
-150  
-40  
SS  
Current on any pin  
Storage Temperature  
Operating Temperature  
I
PIN  
+150  
+125  
+85  
T
STG  
T
O
-25  
°C  
*Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress  
rating only. Functional operation of the device at these or any other condition above those indicated in the operational sections of  
this specification, is not implied. Exposure to Absolute Maximum Ratings for extended periods may affect device reliability.  
2/10  
http://www.sames.co.za  
PRELIMINARY  
SA2007H  
ssaammeess  
PIN DESCRIPTION  
Designation  
PIN  
Description  
Analog Ground. The voltage to this pin should be mid-way between V and V .  
SS  
20  
AGND  
DD  
Positive supply voltage. The voltage to this pin is typically +2.5V if a shunt resistor is used for  
current sensing or in the case of a current transformer a +5V supply can be applied.  
V
DD  
8
Negative supply voltage. The voltage to this pin is typically -2.5V if a shunt resistor is used for  
current sensing or in the case of a current transformer a 0V supply can be applied.  
V
SS  
14  
Analog Input for Voltage. The current into the A/D converter should be set at 14µA at  
RMS  
19  
IVP  
nominal mains voltage. The voltage sense input saturates at an input current of ±25µA peak.  
Inputs for current sensor - Channel 1 and Channel 2. The shunt resistor voltage from each  
1, 2,  
3, 4  
IIN1, IIP1  
IIN2, IIP2  
channel is converted to a current of 16µA at rated conditions. The current sense input  
RMS  
saturates at an input current of ±25µA peak.  
This pin provides the connection for the reference current setting resistor. A 24kW resistor  
5
VREF  
connected to V sets the optimum operating condition.  
SS  
This logic input is used to select between latched or unlatched condition for the pulse and  
direction outputs.  
6
7
9
OMODE  
RP  
A logic input is used to reset the latched outputs which is required after an interrupt has  
occurred.  
FMO  
The zero crossover of the voltage sense input is signaled on this pin.  
Configure / Test inputs. For normal operations these pins must be connected to V .  
SS  
10, 15  
12  
TCLK, TEST  
INT  
This logic output will indicate a change in status of the pulse or direction outputs.  
Pulse outputs. The P1 and P2 outputs give instantaneous pulse outputs of channel 1 and  
channel 2 respectively. The pulse is active low with a pulse width of 71.5µs for positive energy  
and doubles for reverse energy.  
17, 13  
P1, P2  
D1, D2  
NC  
Direction output. These outputs indicate the energy flow direction of each channel.  
No Connection.  
18, 16  
11  
ORDERING INFORMATION  
IIN1  
IIP1  
1
20 AGND  
Part Number  
SA2007HPA  
SA2007HSA  
Package  
DIP-20  
IVP  
2
19  
IIN2  
IIP2  
3
18 D1  
SOIC-20  
P1  
17  
4
VREF  
OMODE  
RP  
D2  
5
16  
15  
14  
13  
12  
11  
TEST  
6
VSS  
7
VDD  
P2  
8
INT  
FMO  
9
TCLK  
NC  
10  
DR-01620  
Figure 2: Pin connections: Package: DIP-20, SOIC-20  
3/10  
http://www.sames.co.za  
PRELIMINARY  
SA2007H  
ssaammeess  
POWER CALCULATION  
FUNCTIONAL DESCRIPTION  
In Figure 8, the voltage drops across the current transformers  
terminating resistors are converted to currents for each  
current sense input, by means of resistors R and R (channel  
The SA2007H is a CMOS mixed signal analog/digital  
integrated circuit, which performs power/energy calculations  
across a power range of 1000:1, to an overall accuracy of  
better than Class 1.  
10  
11  
1) as well as R and R (channel 2). The current sense input  
13.  
12  
saturates at an input current of ±25µA peak.  
The integrated circuit includes all the required functions for 1-  
phase power and energy measurement such as oversampling  
A/D converters for the voltage and current sense inputs, power  
calculation and energy integration. Internal offsets are  
eliminated through the use of cancellation procedures.  
The mains voltage (230VAC) is divided down through a divider  
to 14V . The current into the A/D converter input is set at  
RMS  
14µA at nominal mains voltage, via resistor R (1MW).  
7
RMS  
In this configuration, with a mains voltage of 230V and a  
current of 80A, the output frequency measured on P1 or P2 pin  
is 1360Hz. In this case the energy associated with a single  
pulse is 18.4kW/1360Hz = 13.5Ws per pulse.  
Referring to the block diagram (figure 1) the SA2007H has two  
current sense channels and a voltage sense channel. The  
voltage measured is multiplied with the current measured on  
the two channels. The multiplied signals from each current  
channel is fed to separate power to pulse rate blocks.  
ANALOG INPUT CONFIGURATION  
The input circuitry of the current and voltage sensor inputs are  
illustrated in figure 3. These inputs are protected against  
electrostatic discharge through clamping diodes.  
The power to pulse rate blocks generate pulses at a frequency  
proportional to the instantaneous active power measured.  
Pulses on output P1 represent energy measured on current  
channel 1. The pulses on output P2 represent energy  
measured on current channel 2. Counting the pulses  
generated represents the energy measured.  
The feedback loops from the outputs of the amplifiers A and A  
I
V
generate virtual shorts on the signal inputs. Exact duplications  
of the input currents are generated for the analog signal  
processingcircuitry.  
A typical application would be to simultaneous measure  
energy/power consumption in both Live and Neutral lines. A  
meter tamper condition could be detected when an imbalance  
exists between the live and neutral energy/power measured.  
ELECTROSTATIC DISCHARGE (ESD)  
PROTECTION  
The SA2007H integrated circuit's input's/outputs are protected  
againstESD.  
Two modes of operation is available on the SA2007H, in one  
mode the device is functionally the same as two SA2002H  
devices sharing a common voltage channel. Alternatively the  
pulse output is latched and an interrupt is generated on any  
change of the pulse outputs.  
POWER CONSUMPTION  
The power consumption rating of the SA2007H integrated  
circuitislessthan30mW.  
V
DD  
IIP  
V
SS  
CURRENT  
SENSOR  
INPUTS  
AI  
V
DD  
IIN  
V
SS  
V
DD  
IVP  
VOLTAGE  
SENSOR  
INPUT  
V
SS  
A
V
GND  
DR-01288  
Figure 3: Analog input internal configuration  
4/10  
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PRELIMINARY  
SA2007H  
ssaammeess  
OUTPUT SIGNALS  
INPUT SIGNALS  
Pulse outputs (P1, P2)  
Voltage reference (VREF)  
The output on P1 and P2 is a pulse density signal representing  
the instantaneous power/energy measurement as shown in  
A bias resistor of 24kW sets optimum bias conditions on chip.  
Calibration of the SA2007H should be done in the micro-  
controllers software.  
figure 4. The pulse width t on P1 and P2 change with the  
p
direction of energy measurement t is 71.5µs for positive  
p
energy and doubles (143µS) if negative energy is measured.  
The output frequency may be calculated using the following  
formula:  
Output Mode (OMODE)  
The output behavior of the SA2007H is selectable between  
fixed width outputs or latched outputs. In fixed width mode the  
P1 and P2 output pulses stay at a fixed width. In latched mode  
the status of P1 and P2 are cleared with a logic 1 on the RP pin.  
2
f = 11.16 x FOUT x ( I x I ) / I  
R
I
V
Where:  
FOUT= Typical rated output frequency (1360Hz)  
Refer to the “Output signals in latched mode” section (Page 6)  
for further information.  
I
I
I
=
=
=
Input current on current sense input (16µA at rated  
conditions)  
Input current on voltage sense input (14µA at rated  
conditions)  
I
Description  
OMODE  
V
0
Fixed width mode  
ReferencecurrentonVREFtypically50µA  
R
Latched mode  
1
An integrated anti-creep function does not allow output pulses  
onP1orP2ifnopowerismeasuredbythedevice.  
Clear Interrupt (RP)  
A logic 1 on the RP input is used to clear the interrupt  
generated by the SA2007H when a pulse is generated on P1  
or P2, while operating in latched mode. By clearing the  
interrupt in latched mode the status of the pulse outputs will  
also be cleared.  
v
MAINS  
t
Test Inputs (TEST, TCLK)  
For normal operations these pins must be connected to V .  
SS  
POWER  
V x I  
t
FOUT  
t
DR-01282  
t
P
Figure 4: FOUT instantaneous pulse output  
Direction indication (D1, D2)  
The SA2007H provides information about the energy flow  
direction of both current channels separately on pins D1 and  
D2.  
Logic 0 on pin D1 or D2 indicates reverse energy flow of that  
particular channel. Reverse energy flow is defined as the  
condition where the voltage sense input and current sense  
input are out of phase (greater than 90 degrees).  
5/10  
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PRELIMINARY  
SA2007H  
ssaammeess  
Interrupt (INT)  
Positive energy flow, when voltage sense and both current  
While the SA2007H is operating in latched mode (see Output  
mode description) an interrupt is generated with the falling  
edge of the pulse outputs P1 and P2 (see figure 7). INT is  
cleared with a logic 1 on the RP input.  
sense input are in phase, is indicated on pin D1 or D2 as a logic  
1.  
Figure 5 shows the behavior of D1 and D2, when energy  
reversal takes place. The time period for the direction signal to  
OUTPUT SIGNALS IN LATCHED MODE  
change state, t , is the time it takes for the internal integrator  
DIR  
Latched mode is selected by setting the OMODE input to logic  
1. This mode is used with a micro controller to ensure that any  
simultaneous pulses on P1 and P2 are not missed. The  
functionality of the latched mode is shown in figure 7.  
to count (down) from its present value to zero. Thus the energy  
consumption rate determines the speed of change on the  
direction outputs.  
An interrupt is generated with a falling edge on any of the pulse  
output signals P1 and P2. The micro controller needs to scan  
the status of the pulse outputs as well as the direction signals  
D1 and D2 during its interrupt service routine. The micro  
controller clears the interrupt by setting the RP input to a logic  
1. The pulse outputs P1 and P2 are cleared along with the  
interrupt. Note that energy pulses are inhibited when the  
interrupt output is set (during latched mode).  
I
t
V
t
FMO  
D1, D2  
t
DR-01283  
P1  
t
DIR  
Figure 5: Measured energy direction on D1 or D2  
P2  
Mains zero crossing indication (FMO)  
INT  
The square wave signal of FMO indicates the polarity of the  
mains voltage. Due to comparator offsets, the FMO low to high  
transition can occur within a range as shown in figure 6. The  
time between successive low to high transitions will be equal to  
the mains voltage period.  
RP  
dr-01621  
Figure 7: Output signals in latched mode  
V
t
FMO  
t
t
MAINS  
DR-01284  
Figure 6: Mains zero crossing on FMO  
6/10  
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PRELIMINARY  
SA2007H  
ssaammeess  
TYPICAL APPLICATION  
Voltage Divider  
The analog (metering) interface shown in figure 8, is designed  
for measuring 230V/60A with precision better than Class 1.  
The most important external components for the SA2007H  
integrated circuit are the current sense resistors, the voltage  
sense resistors and the bias setting resistor. The resistors  
used in the metering section should be of the same type so  
temperature effects are minimized.  
The voltage divider is calculated for a voltage drop of 14V.  
Equations for the voltage divider are:  
RA = R1 + R2 + R3  
RA = R7 || (R5 + P1)  
Combining the two equations gives:  
(RA + RB) / 230V = RB / 14V  
Current Input IIN1, IIP1, IIN2, IIP2  
Values for resistors R4 = 10W, R5 - 22kW and R7 - 1MW is  
chosen.  
Two current transformers are used to measure the current in  
the live and neutral phases. The output of the current  
transformer is terminated with a low impedance resistor. The  
voltage drop across the termination resistor is converted to a  
current that is fed to the differential current inputs of the  
SA2007H.  
Substituting the values result in:  
RB = 21.526kW  
RA = RB x (230V / 14V -1)  
RA = 332.12kW.  
CT Termination Resistor  
The voltage drop across the CT termination resistor at rated  
current should be at least 20mV. The CT’s have low phase shift  
and a ratio of 1:2500. The CT’s are terminated with a 3.6W  
resistor giving a voltage drop of 86.4mV across each  
Standard resistor values for R1, R2 and R3 are chosen to be  
100kW, 100kWand 120kW.  
The capacitor C1 is used to compensate for phase shift  
between the voltage sense inputs and the current sense inputs  
of the device, in cases where CTs with phase errors are used.  
The phase shift caused by the CT may be corrected by  
inserting a capacitor in the voltage divider circuit. To  
compensate for a phase shift of 0.18 degrees the capacitor  
value is calculated as follows:  
termination resistor at rated conditions (I for the meter).  
max  
Current Sensor Input Resistors  
The resistors R10, R11 and R12, R13 define the current level  
into the current sense inputs of the SA2007H. The resistor  
values are selected for an input current of 16µA at rated  
conditions. For a 60A meter and a CT Ratio of 2500:1 the  
resistor values are calculated as follows:  
C = 1 / (2 xp x Mains frequency x R5 x tan (Phase shift angle))  
C = 1 / ( 2 xp x 50 x 1MW tan (0.18 degrees ))  
C = 1.013µF  
R10 = R11 = ( I/ 16µA ) x R / 2  
SH  
= 60A / 2500 / 16µA x 3.6W / 2  
=2.7kW  
Reference Voltage Bias resistor  
I =Line current  
L
R6 defines all on chip and reference currents. With R6 = 24kW  
optimum conditions are set. Calibration should be done in the  
micro controller software.  
R = CT Termination resistor  
SH  
2500 = CT ratio  
The two current channels are identical so R10 = R11 = R12 =  
R13.  
Voltage Input IVP  
The voltage input of the SA2007H (IVP) is driven with a current  
of 14µA at nominal mains voltage. This voltage input saturates  
at approximately 17µA. At a nominal voltage current of 14µA  
allows for 20% overdriving. The mains voltage is divided with a  
voltage divider to 14V that is fed to the voltage input pins via a  
1MW resistor.  
7/10  
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PRELIMINARY  
SA2007H  
ssaammeess  
NEUTRAL  
VDD  
U1  
Vin  
3
1
Vout  
LIVE  
D1  
D3  
R4  
L
R14  
C2  
T1  
GND  
TZ1  
C5  
C6  
+
+
p
s
R15  
D2  
D4  
C3  
GND  
R5  
VSS  
R1  
R2  
R3  
14V  
C1  
CT2  
R7  
U2  
IIN1  
R8  
R10  
1
2
3
4
5
6
7
8
9
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
GND  
R11  
R12  
R13  
IIP1  
IIN2  
IIP2  
IVP  
D1  
CT1  
GND  
Energy Dir CH1  
Energy Pulse CH1  
Energy Dir CH1  
R9  
P1  
VREF  
OMODE  
RP  
D2  
VDD  
TEST  
VSS  
P2  
GND  
Micro  
Controller  
VSS  
Energy Pulse CH2  
Inrerrupt  
VDD  
R6  
FMO  
INT  
C4  
10  
TCLK  
SA2007H  
VSS  
LIVE  
VSS  
Zero Crossings  
RST Interrupt  
NEUTRAL  
Figure 8: Application circuit showing metering section  
8/10  
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PRELIMINARY  
SA2007H  
ssaammeess  
Parts List for Application Circuit: Figure 8  
Symbol  
Item  
1
Detail  
Description  
DIP-20/SOIC-20  
or Similar  
U2  
D1  
D2  
D3  
D4  
SA2007H  
2
Diode, Silicon 1N4148  
Diode, Silicon 1N4148  
Diode, Silicon 1N4148  
Diode, Silicon 1N4148  
Resistor, 100k, 1/4W, 1%, metal  
or Similar  
3
or Similar  
4
or Similar  
5
6
R1  
7
R2  
Resistor, 100k, 1/4W, 1%, metal  
Resistor, 120k, 1/4W, 1%, metal  
Resistor, 10W, 2W, Wire wound  
Resistor, 24k, 1/4W, 1%, metal  
Resistor, 24k, 1/4W, 1%, metal  
Resistor, 1M, 1/4W, 1%, metal  
Resistor, 3.6W, 1/4W, 1%, metal  
Resistor, 3.6W, 1/4W, 1%, metal  
Resistor, 2.7k, 1/4W, 1%, metal  
8
R3  
9
R4  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
R5  
R6  
R7  
R8  
Note 2  
R9  
Note 2  
Note 1  
R10  
R11  
R12  
R13  
R14  
R15  
Resistor, 2.7k, 1/4W, 1%, metal  
Resistor, 2.7k, 1/4W, 1%, metal  
Resistor, 2.7k, 1/4W, 1%, metal  
Note 1  
Note 1  
Note 1  
Resistor, 1k, 1/4W  
Resistor, 1k, 1/4W  
Capacitor  
C1  
C2  
C3  
C4  
C5  
C6  
Note 4  
Capacitor, 220nF  
Capacitor, 220nF  
Capacitor, 820nF  
Note 3  
Capacitor, 2200µF, 25V, electrolytic  
Capacitor, 100µF, 16V, electrolytic  
Current Transformer  
CT1  
CT2  
T1  
Current Transformer  
Transformer, 230V/9V  
U1  
78LC05, Voltage regulator  
400V, Metal oxide varistor  
TZ1  
Note 1: Resistor (R10, R11, R12 and R13) values are dependent upon the selected value of R8 and R9  
Note 2: See TYPICAL APPLICATION when selected the value of R8 and R9.  
Note 3: Capacitor (C4) to be positioned as closed to Supply Pins (V & V ) of U-1, as possible.  
SS  
DD  
Note 4: Capacitor (C1) selected to minimize phase error introduced by current transformer (typically 1.5µF for normal CTs)  
9/10  
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PRELIMINARY  
SA2007H
ssaammeess  
DISCLAIMER:  
The information contained in this document is confidential and proprietary to South African Micro-Electronic Systems (Pty) Ltd  
("SAMES") and may not be copied or disclosed to a third party, in whole or in part, without the express written consent of SAMES. The  
information contained herein is current as of the date of publication; however, delivery of this document shall not under any  
circumstances create any implication that the information contained herein is correct as of any time subsequent to such date.  
SAMES does not undertake to inform any recipient of this document of any changes in the information contained herein, and SAMES  
expressly reserves the right to make changes in such information, without notification, even if such changes would render  
information contained herein inaccurate or incomplete. SAMES makes no representation or warranty that any circuit designed by  
reference to the information contained herein, will function without errors and as intended by the designer.  
Any sales or technical questions may be posted to our e-mail address below:  
energy@sames.co.za  
For the latest updates on datasheets, please visit our web site:  
http://www.sames.co.za.  
SOUTH AFRICAN MICRO-ELECTRONIC SYSTEMS  
DIVISION OF LABAT TECHNOLOGIES (PTY) LTD  
Tel: (012) 333-6021  
Tel: Int +27 12 333-6021  
Fax: (012) 333-8071  
Fax: Int +27 12 333-8071  
33 ELAND STREET  
KOEDOESPOORT INDUSTRIAL AREA  
PRETORIA  
P O BOX 15888  
33 ELAND STREET  
LYNN EAST 0039  
REPUBLIC OF SOUTH AFRICA  
REPUBLIC OF SOUTH AFRICA  
10/10  
http://www.sames.co.za  
PRELIMINARY  

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