BU1924FS [ROHM]
Consumer Circuit, CMOS, PDSO16, SSOP-16;
| 型号： | BU1924FS |
| 厂家： | 
ROHM |
| 描述： | Consumer Circuit, CMOS, PDSO16, SSOP-16 解码器 消费电路 商用集成电路 光电二极管 |
| 文件： | 总5页 (文件大小：83K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
BU1924 / BU1924F
Audio ICs
RDS / RBDS decoder
BU1924 / BU1924F
The BU1924 and BU1924F are RDS / RBDS decoders that employ a digital PLL and have a built-in anti-aliasing filter and
an eight-stage BPF (switched-capacitor filter). Linear CMOS circuitry is used for low power consumption.
!Applications
RDS / RBDS compatible FM receivers for American and European markets, car stereos, high-fidelity stereo systems and
components, and FM pagers.
!Features
1) Low current.
2) Two-stage anti-aliasing filter (LPF).
3) 57kHz band-pass filter.
4) DSB demodulation (digital PLL).
5) Quality indication output for demodulated data.
!Absolute maximum ratings (Ta = 25°C)
Parameter
Symbol
Limits
−0.3~+7.0
−0.3~VDD+0.3
4.0
Unit
V
Conditions
Power supply voltage
Maximum input voltage
Maximum output voltage
Power dissipation
V
DD
Max.
Max.
V
DD1
V
DD2
V
V
All input pins
I
mA
mW
°C
°C
All output pins
∗
350
Pd
−
−
−
Operating temperature
Storage temperature
Topr
Tstg
−40~+85
−55~+125
∗Reduced by 3.5mW for each increase in Ta of 1°C over 25°C.
!Recommended operating conditions (Ta = 25°C)
Parameter
Symbol
Min.
4.5
Typ.
−
Max.
5.5
Unit
V
DD1
V
V
Power supply voltage
VDD2
4.5
−
5.5
BU1924 / BU1924F
Audio ICs
!Block diagram
560p
CMP
(7)
(8)
100kΩ
100kΩ
MUX
270p
(4)
V
SS3
120kΩ
8th Switched
capacitor filter
comparator
anti-aliasing
filter
(3)
(5)
Vref
RCLK
QUAL
(16)
(1)
2.2µF
V
DD1
∗1
Analog
Power supply
(6)
V
SS1
DD2
RDATA
PLL
57kH
RDS/ARI
(2)
Bi-phase
decoder
PLL
1187.5Hz
Differential
decoder
Z
(12)
∗1
V
∗2
Digital
Power supply
(11)
V
SS2
Measurement
circuit
Reference
clock
(13)
(14)
(10)
T1
(9)
T2
XI
XO
4.332MH
Z
∗1 : VDD1 and VDD2 are separated within the IC.
∗2 : Have VDD2 (digital power supply) of a sufficiently low impedance.
∗3 : Match the capacitor constants with the crystal manufacturer.
33pF
33pF
∗3
∗3
9
16
15
14
13
12
11
10
1
2
4
6
8
3
5
7
BU1924 / BU1924F
Audio ICs
!Pin descriptions
Pin No.
Symbol
Pin name
Functions
Input/Output type
1
2
QUAL Demodulator quality Good data : High, bad data : Low
Type C
−
Refer to output data timing
Reference voltage 1/2 V D1 (refer to input/output circuits)
Input Composite signal input (refer to input/output circuits)
RDATA
Vref
Demodulator data
3
D
Type E
4
MUX
Type D
5
V
D
D1
Analog power supply 4.5V to 5.5V
−
6
V
S
S
S1
7
V
S3
GND
−
−
8
CMP
T2
Comparator input
Test input
Type D
C-junction (refer to input/output circuits )
9
Open or connected to ground
Type B
−
10
11
12
13
14
15
16
T1
V
DD2
Digital power supply 4.5V to 5.5V
V
S
S2
XI
Connects to 4.332MHz oscillator
(refer to input/output circuits)
Crystal oscillator
Type A
XO
(N.C.)
RCLK
−
−
−
Type C
Demodulator clock 1187.5Hz clock (refer to the timing diagram)
!Input / Output circuits
Type A
Type C
Type B
10MΩ
Type D
Type E
+
+
−
BU1924 / BU1924F
Audio ICs
!Electrical characteristics (unless otherwise noted, Ta = 25°C, VDD1 = VDD2 = 5.0V, VSS1 = VSS2 = 0.0V)
Parameter
Operating current
Reference voltage
Input current 1
Symbol
Min.
−
Typ.
Max.
7.0
−
Unit
mA
V
Conditions
I
DD
4.5
IDD1+IDD2
Vref
−
1/2VDD1
Pin 3
MUX
MUX
XI
I
IN1
OUT1
IN2
OUT2
−
−
−
−
−
1.0
1.0
1.0
1.0
µA
µA
µA
µA
V
V
IN=VDD1
IN=VDD1
Output current 1
Input current 2
I
I
−
I
−
V
V
IN=VDD2
IN=VDD2
XI
Output current 2
−
V
−1.0
DD2
V
−0.3
DD2
V
OH1
Output high level voltage 1
−
V
V
RCLK RDATA QUAL
RCLK RDATA QUAL
I
I
O
O
=−1.0mA
=1.0mA
Output low level voltage 1
〈Filter block〉
OL1
−
0.2
1.0
V
Center frequency
Gain
FC
GA
56.5
20
18
65
35
30
−
57.0
23
22
80
50
40
−
57.5
26
kHz
dB
F=57.0kHz
57kHz 4kHz
38kHz
Attenuation 1
ATT1
ATT2
ATT3
SN
dB
−
−
Attenuation 2
dB
Attenuation 3
dB
67kHz
−
S / N ratio
dB
57kHz VIN=3mVrms
−
Maximum input level
VMAX1
500
mVrms
〈Demodulator〉
RDS detector sensitivity
RDS input level
SRDS
MRDS
SARI
−
1.0
−
0.5
−
1.0
300
3.0
−
mVrms
mVrms
mVrms
Hz
ARI detector sensitivity
Data rate
1.5
DRATE
CT
−
1187.5
4.3
Clock transient vs. data
−
−
µs
Not designed for radiation resistance.
!Output data timing
RCLK
RDATA
T
1
T
5
T
1
T
3
T
4
T
2
T
6
T2
T
1=T
2=4.3µS
T
3=T
4=421µS
T
5=T
6=416.7µS
The clock (RCLK) frequency is 1187.5Hz. Depending on the state of the internal PLL clock, the data (RDATA) is replaced
in synchronous with either the rising or falling or falling edge of the clock. To read the data, you may choose either the
rising or falling edge of the clock as the reference. The data is valid for 416.7µs. after the reference clock edge.
QUAL pin operation : Indicates the quality of the demodulated data.
(1) Good data : HI
(2) Poor data : LO
BU1924 / BU1924F
Audio ICs
!Electrical characteristic curves
30
20
10
0
−10
−20
−30
−40
−50
−60
−70
10 20 30 40 50 60 70 80 90 100
FREQUENCY : f (kHz)
Fig.1 Band-pass filter characteristics
!External dimensions (Units : mm)
BU1924
BU1924F
10.0 0.2
19.4 0.3
16
1
9
8
16
1
9
7.62
8
2.54
0.5 0.1
0°~15°
1.27 0.4 0.1
0.3Min.
0.15
DIP16
SOP16
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