BD9833KV_11 [ROHM]
Silicon Monolithic Integrated Circuit; 硅单片集成电路
| 型号： | BD9833KV_11 |
| 厂家： | 
ROHM |
| 描述： | Silicon Monolithic Integrated Circuit |
| 文件： | 总5页 (文件大小：246K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1/4
STRUCTURE
TYPE
Silicon Monolithic Integrated Circuit
8 Channel Switching Regulator Controller and 1 Series Regulator for DVC
PRODUCT SERIES
FEATURES
ＢＤ９８３３ＫＶ
・ 8 DC/DC controller,1 Series Regulator
・ DC/DC controller: FET direct driver (Pch driver:7ch, Nch driver:1ch)
・ Series Regulator: Variable output voltage
stable with Ceramic Output Capacitor
・ Package: VQFP48C(0.5mm pitch)
○Absolute maximum ratings （Ta=25℃）
Parameter
Symbol
VCC,VIN2345,VIN6789
VIN1
Limits
12
Units
V
Power Supply Voltage1
Power Supply Voltage2
12
V
600(*1)
950(*2)
mW
mW
Power Dissipation
Pd
-25～+85
℃
℃
Operating Temperature
Storage Temperature
Topr
Tstg
-55～+125
(*1) Without external heat sink, the power dissipation degrades by 6.0mW/℃ above 25℃.
(*2) Power dissipation degrades by 9.5mW/℃ above 25℃, when mounted on a PCB (70.0mm×70.0mm×1.6mm).
○Recommended operating conditions（Ta=-25～+75℃）
Parameter
Symbol
Spec.
Units
V
4.0～10
2.8～10
VCC,VIN2345,VIN6789
VIN1
Power Supply Voltage
Oscillator Frequency
100kHz～1.2MHz
fosc
Status of this document
REV.B
2/4
○Electrical characteristics（Ta=25℃，VCC=7V, VIN1=7V STB=3V, unless otherwise specified）
Spec.
Units
Parameter
Symbol
Conditions.
Min.
Typ.
Max
■DC/DC controller
【Reference Voltage】
Reference Voltage
Line Regulation
Vref
2.475
-
2.500
-
2.525
10
V
Vcc=4.0V～10V
DVLi
mV
Iref=-0.1mA～
-1.0mA
Load Regulation
DVLo
Ios
-
-
10
-5
mV
mA
Short-Circuit Output Current
-40
-12
Vref=0V
【Load Regulation】
Short-Circuit Output
Current1(VCC)
Vstd1
3.55
3.65
3.75
V
VCC monitor
Sweep down
ΔVst1
Hysteresis width (VCC)
Threshold Voltage 2(VREF)
【Soft start】
0.6
2.2
0.11
2.3
0.16
2.4
V
V
Vstd2
VREF monitor
Soft standby voltage
Input Source Current
【Protection Circuit】
Vsso1
-
10
100
-0.5
mV
μA
ISOFT1
-2.0
-1.0
CH2,3,4,5,6,7,
INV Voltage“L”
detect
INV Threshold Voltage
Vscpth
0.65
0.75
0.85
V
μA
V
SCP Output Current
Iscp
Vtsc
Vssc
-3.0
1.4
-
-2.0
1.5
10
-1.5
1.6
VSCP=0.75V
SCP Threshold Voltage
SCP Standby Voltage
【Triangular wave oscillator】
100
mV
Oscillator Frequency
Frequency Stability (Vcc)
RT Output Voltage
fosc
Df
580
-
680
0.3
780
2
kHz
%
RT=11kohm,CT=180pF
VCC=4.0～10V
VRT
0.95
1.00
1.05
V
■DC/DC controller
【Reference Voltage】
CH2,3,4,5,6,7
CH8,9
Vthea
VOFST
Ibias1
Ibias2
Ibias3
AV
0.980
-
1.00
-
1.020
10
150
-
V
Reference Voltage
Line Regulation
mV
nA
nA
nA
dB
CH2,3,4,5,6,7 INV pin
CH8,9 INV pin
CH8,9 NON pin
-150
-170
-170
50
0
Load Regulation
-40
-40
65
Short-Circuit Output Current
-
DC Design
Guarantee
80
【Load Regulation】
AV=0dB
Design Guarantee
Short-Circuit Output
Current1(VCC)
BW
0.5
1
2
MHz
Vfbh
Vref
-0.1
-
Hysteresis width (VCC)
-
-
V
Threshold Voltage 2(VREF)
Vfbl
Isink1
-
0.1
3.9
V
【Soft start】
1.3
3.4
-240
-280
0
2.6
6.7
-150
-190
-
mA
mA
μA
μA
V
Soft standby voltage
Input Source Current
【Protection Circuit】
Isink2
10
Isource1
Isource2
VCM
-90
-130
VCC-2
INV Threshold Voltage
【PWM Comparator】
Vt0
1.730
2.090
1.820
2.180
1.910
2.270
V
V
DUTY0%
Input Threshold Voltage
2,3,4,5,6,7,8,9
Vt100
DUTY100%
【FET Driver】
RonHI1
RonLO1
Isink1
Isource1
7
6
14
12
21
Ω
Ω
mA
mA
VG2,3,4,5,6,7,8,9 VG=”H”
VG2,3,4,5,6,7,8,9 VG=”L”
VG2,3,4,5,6,7,8,9 VG=”L”
VG2,3,4,5,6,7,8,9 VG=”H”
ON Resistance
18
70
170
-160
250
-80
Current Ability
-240
【Control】
STB Threshold Voltage
STB Input Current
STB5,6 Threshold Voltage
STB5,6 Input Current
【Circuit Current】
Vstb
Istb
1.0
-
1.5
-
2.0
30
V
μA
V
STB=3V
Vstb5,6
Istb5,6
1.0
-
1.5
-
2.0
30
μA
STB5,6=3V
STB=0V
Standby Current
Iccs
Icc
-
1
0
5
5
μA
mA
Circuit Current on Driving
10
【Series Regulator】
R1=200KΩ,R2=100KΩRefer to below
figure
Output Voltage
Vo1
2.94
3.00
3.06
V
Reference Voltage
VFB1
Io1
0.98
300
1.00
-
1.02
-
V
Output Current Ability
The Difference between Input voltage and
output voltage
mA
VIN1=VOUT1x0.97,
IOUT1=20mA
DV1
70
-
120
4
250
10
mV
mV
mV
VIN1=4V to10V
IOUT1=100mA
Line Regulation11
Line Regulation12
DVLi11
DVLi12
VIN1=3.5V to10V
IOUT1=10mA
-
4
10
Load Regulation1
DVLo1
DVLo2
Ios1
IVIN1
COUT
-
-
10
30
30
90
mV
mV
IOUT1=1mA to 100mA
IOUT1=1mA to 300mA
VOUT1=0V
Load Regulation2
Short-Circuit Output Current
Circuit Current
-140
40
-70
80
-35
160
－
mA
μA
μF
IOUT1=0mA
VOUT1 pin Connect Capacitor
2.2
－
REV. B
3/4
○Package Dimensions
○Pin Description
番号
端子名
INV5
FB5
機能
Error Amp inverted input（CH5)
1
Error Amp output (CH5)
2
Error Amp inverted input（CH6)
Error Amp output (CH6)
3
INV6
FB6
4
Error Amp inverted input（CH7)
Error Amp output (CH7)
5
INV7
FB7
6
Error Amp non-inverted input（CH8)
Error Amp inverted input（CH8)
Error Amp output (CH8)
7
NON8
INV8
FB8
8
9
Error Amp non-inverted input（CH9)
Error Amp inverted input（CH9)
Error Amp output (CH9)
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
NON9
INV9
FB9
FET Driver Output (CH9)
VG9
FET Driver Output (CH8)
VG8
Power supply for the output circuit (CH6,7,8,9)
Power Ground for the output circuit (CH6,7,8,9)
FET Driver Output (CH7)
VIN6789
PGND6789
VG7
VQFP48C （Unit:mm）
FET Driver Output (CH6)
VG6
FET Driver Output (CH5)
○Block Diagram
VG5
FET Driver Output (CH4)
VG4
Power supply for the output circuit (CH2,3,4,5)
Power Ground for the output circuit (CH2,3,4,5)
FET Driver Output (CH3)
VIN2345
PGND2345
VG3
FET Driver Output (CH2)
VG2
Error Amp output (CH2)
FB2
Error Amp inverted input（CH2)
Error Amp output (CH3)
INV2
FB3
Error Amp inverted input（CH3)
SW for CH2～9，Hi：Operating
Ground
INV3
STB
GND
Error Amp output (CH4)
FB4
Error Amp inverted input（CH4)
SW for CH5，Hi：Operating
SW for CH6，Hi：Operating
SW for CH1，Hi：Operating
Series Regulator Output
INV4
STB5
STB6
STB1
VOUT1
VIN1
FB1
Power supply for Series Regulator
Amp inverted input
Non-Connected pin
N.C.
SCP
A capacitor is placed to set up the delay time of the SCP
Soft start/This pin connects to a capacitor to
set up the start-up time
SOFT
VREF
VCC
Reference Voltage Output pin
Power supply for DC/DC
A capacitor is to set up the triangular-wave frequency
A resistor is to set up the triangular-wave frequency
Dead time control pin for CH5
CT
RT
DTC5
DTC6
DTC7
Dead time control pin for CH6
Dead time control pin for CH7.And this pin connects to a
capacitor to set up the start-up time.
REV. B
4/4
○Operation Notes
1) Absolute maximum ratings
Use of the IC in excess of absolute maximum ratings such as the applied voltage or operating temperature range may result in IC deterioration or
damage. Assumptions should not be made regarding the state of the IC (short mode or open mode) when such damage is suffered. A physical
safety measure such as a fuse should be implemented when use of the IC in a special mode where the absolute maximum ratings may be
exceeded is anticipated.
2) GND potential
Ensure a minimum GND pin potential in all operating conditions. In addition, ensure that no pins other than the GND pin carry a voltage lower than
or equal to the GND pin, including during actual transient phenomena.
3) Thermal design
Use a thermal design that allows for a sufficient margin in light of the power dissipation (Pd) in actual operating conditions.
4) Inter-pin shorts and mounting errors
Use caution when orienting and positioning the IC for mounting on printed circuit boards. Improper mounting may result in damage to the IC. Shorts
between output pins or between output pins and the power supply and GND pin caused by the presence of a foreign object may result in damage to
the IC.
5) Operation in a strong electromagnetic field
Use caution when using the IC in the presence of a strong electromagnetic field as doing so may cause the IC to malfunction.
6) Thermal shutdown circuit (TSD circuit)
This IC incorporates a built-in thermal shutdown circuit (TSD circuit). The TSD circuit is designed only to shut the IC off to prevent runaway thermal
operation. Do not continue to use the IC after operating this circuit or use the IC in an environment where the operation of the thermal shutdown
circuit is assumed.
7) Testing on application boards
When testing the IC on an application board, connecting a capacitor to a pin with low impedance subjects the IC to stress. Always discharge
capacitors after each process or step. Ground the IC during assembly steps as an antistatic measure, and use similar caution when transporting or
storing the IC. Always turn the IC's power supply off before connecting it to or removing it from a jig or fixture during the inspection process.
8) Common impedance
Power supply and ground wiring should reflect consideration of the need to lower common impedance and minimize ripple as much as possible (by
making wiring as short and thick as possible or rejecting ripple by incorporating inductance and capacitance).
9) Applications with modes that reverse VCC and pin potentials may cause damage to internal IC circuits.
For example, such damage might occur when VCC is shorted with the GND pin while an external capacitor is charged. It is recommended
to insert a diode for preventing back current flow in series with VCC or bypass diodes between VCC and each pin.
Bypass diode
Back current prevention diode
VCC
Output Pin
10) Timing resistor
Timing resistor connected between RT and GND, has to be placed near RT terminal (45pin). With the connection must be as short as
possible.
11) IC pin input
This monolithic IC contains P+ isolation and PCB layers between adjacent elements in order to keep them isolated.
P/N junctions are formed at the intersection of these P layers with the N layers of other elements to create a variety of parasitic elements.
For example, when a resistor and transistor are connected to pins as shown in follow chart,
the P/N junction functions as a parasitic diode when GND > (Pin A) for the resistor or GND > (Pin B) for the transistor (NPN).
Similarly, when GND > (Pin B) for the transistor (NPN), the parasitic diode described above combines with the N layer of other
adjacent elements to operate as a parasitic NPN transistor.
The formation of parasitic elements as a result of the relationships of the potentials of different pins is an inevitable result of the IC's
architecture. The operation of parasitic elements can cause interference with circuit operation as well as IC malfunction and damage. For
these reasons, it is necessary to use caution so that the IC is not used in a way that will trigger the operation of parasitic elements, such as
by the application of voltages lower than the GND (PCB) voltage to input and output pins.
Resistance
Transistor (NPN)
(PinA)
Ｂ
(PinA)
(PinB)
Ｅ
Parasitic diode
Ｃ
Ｇ Ｎ Ｄ
Ｇ Ｎ Ｄ
(PinB)
Ｎ
＋
Ｐ
＋
Ｐ
Ｎ
＋
＋
Ｐ
Ｎ
Ｐ
Ｐ
Ｎ
Ｐ
Ｎ
Ｎ
Ｎ
P substrate
P substrate
Ｃ
Ｅ
Ｂ
Ｇ Ｎ Ｄ
Ｇ Ｎ Ｄ
Parasitic diode
Parasitic elementals
Ｇ Ｎ Ｄ
Other adiacent components
Parasitic diode
REV. B
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However, should you incur any damage arising from any inaccuracy or misprint of such
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The technical information specified herein is intended only to show the typical functions of and
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R1120
A
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